EP0500693B1 - Process and device for activating a chip card - Google Patents

Process and device for activating a chip card Download PDF

Info

Publication number
EP0500693B1
EP0500693B1 EP90916993A EP90916993A EP0500693B1 EP 0500693 B1 EP0500693 B1 EP 0500693B1 EP 90916993 A EP90916993 A EP 90916993A EP 90916993 A EP90916993 A EP 90916993A EP 0500693 B1 EP0500693 B1 EP 0500693B1
Authority
EP
European Patent Office
Prior art keywords
voltage
control unit
accordance
chip card
value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
EP90916993A
Other languages
German (de)
French (fr)
Other versions
EP0500693A1 (en
Inventor
José I. RODRIGUEZ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Deutsche Thomson Brandt GmbH
Original Assignee
Deutsche Thomson Brandt GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche Thomson Brandt GmbH filed Critical Deutsche Thomson Brandt GmbH
Publication of EP0500693A1 publication Critical patent/EP0500693A1/en
Application granted granted Critical
Publication of EP0500693B1 publication Critical patent/EP0500693B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/468—Regulating voltage or current wherein the variable actually regulated by the final control device is dc characterised by reference voltage circuitry, e.g. soft start, remote shutdown

Definitions

  • the invention relates to a method for activating a chip card according to the preamble of the main claim, and a preferred device suitable for carrying out the method according to the invention according to the preamble of the first claim.
  • a method for activating a chip card according to the preamble of the main claim and a preferred device suitable for carrying out the method according to the invention according to the preamble of the first claim.
  • Such a method is known from US-A-3 890 461.
  • a card with an integrated circuit with contacts or "chip card” usually has a rectangular shape and has an integrated circuit with contacts on the surface at a fixed location. Such a device has a variety of uses: check or credit card, telephone, pay TV etc.
  • Such a card enables its owner to access a service or to operate an apparatus.
  • it is contemplated to use it for a pay TV system in which the encrypted television signal is received by a decryption device that recovers a decrypted signal when that device is connected to a smart card that contains authorization information.
  • the device for receiving and decoding the signals is for information exchange with the circuit of the card to check whether the holder has the authorization to receive the program. This information exchange or dialogue takes place via an interface circuit.
  • chip cards There are different types of chip cards and each type corresponds to a programming voltage.
  • the invention has for its object to provide a reliable method for activating a chip card and an easy to implement device that can be used as part of an apparatus whose full functionality is only guaranteed in connection with an active chip card.
  • a control unit of the apparatus receives a signal from a control unit of a chip card connected to the apparatus, which signal determines the value of an activation voltage.
  • the control unit of the apparatus controls further stages, which draw off the required activation voltage from the chip card.
  • the activation voltage with the desired voltage value enables the chip card to be used for further steps, for example for decoding information.
  • An embodiment of the invention defines the time sequence for the application of supply voltages to the control units mentioned.
  • the control unit present in the apparatus is thus supplied with a necessary first supply voltage immediately after the apparatus is switched on. Will the existence If a chip card is recognized, its control system is supplied with a second supply voltage which is delayed compared to the first supply voltage.
  • a preferred embodiment of the device according to the invention contains a DC voltage generator, which generates the required activation voltage for the chip card in a simple manner.
  • This is characterized in that it contains a generator for a regulated voltage, followed by an ohmic voltage divider which has resistors connected in parallel in a branch, at least one of which is connected in series with a switch which is dependent on the one to be supplied DC voltage is operated.
  • the voltage provided by the voltage divider can be used directly to activate the card.
  • the output voltage of the voltage divider represents a nominal voltage which controls a control circuit, for example with a ballast transistor, which supplies the programming with a sufficient current strength.
  • first DC voltage regulator 1 shows a first DC voltage regulator 1, to which a first unregulated DC voltage Vp1 is fed and which supplies a first regulated DC voltage VMB to a first electronic control unit 2 (Electronic Control Unit ECU1), which is assigned an apparatus, for example a decryption device.
  • ECU1 Electronic Control Unit
  • a second DC voltage regulator 3 is provided, to which a second unregulated DC voltage Vp2 is supplied and which outputs a second regulated DC voltage Vcc to a second electronic control unit 4 (ECU2) which is assigned to a chip card (not shown).
  • This chip card must be connected to the apparatus in direct or indirect connection in order to carry out decryption processes.
  • a DC voltage generator 5 receives a third unregulated DC voltage Vp3 and outputs a third regulated DC voltage Vpp, hereinafter also referred to as program DC voltage, to the second electronic control unit 4.
  • the first electronic control unit 2 contains on the one hand a signal CP which assumes the value 1 when the connection between the chip card and the apparatus is present and on the other hand an activation signal from the second electronic control unit 4.
  • the first electronic control unit 2 outputs a first control signal CMDVcc to the second voltage regulator 3, a second and a third control signal CMDVpp or CMMDVppn to the DC voltage generator 5 and a further signal to the second electronic control unit 4.
  • FIG. 1 The function of the preferred exemplary embodiment according to FIG. 1 of the device according to the invention will now be explained with the aid of the method according to the invention, the flow diagram of which is shown in FIG. 2.
  • the method starts with step 100, in which the apparatus is switched on and the unregulated voltages Vp, corresponding to Vp1, Vp2, Vp3, are present.
  • the first voltage regulator 1 generates the regulated DC voltage VMB in step 101, whereby the first electronic control unit 2 is switched on.
  • step 102 follows in which it is checked whether an encrypted broadcast is received.
  • the control signal CMDVpp which is sent from the first electronic control unit 2 to the direct voltage generator in step 105, outputs the voltage Vpp with a fixed value, in this example 5 volts, in step 105a.
  • step 106 the second electronic control unit 4 sends the activation signal to the first electronic control unit 2, which contains information about the value Vn of the programming DC voltage Vpp required for activation.
  • the first electronic control unit 2 sends the control signal CMDVppn to the DC voltage generator 5 in step 107, which then switches on the DC voltage Vpp with the desired value Vn, which is fed to the second electronic control unit (step 108).
  • step 109 This is followed by the end of the method in step 109, which also follows directly if it is determined in step 102 or step 103 that there is no encrypted mail suitable for the system or no connection between the chip card and the apparatus (CP not equal to 1).
  • the unregulated DC voltages Vp1, Vp2, Vp3 can be identical, so that the inputs of the voltage regulators 1, 3 and the DC voltage generator 5 are connected to one another. Furthermore, it is conceivable that the voltage regulator 3 is such that the amplitude of the voltage Vcc increases over time.
  • FIG. 3 A preferred embodiment of the DC voltage generator 5, the activation DC voltage Vpp, in the following also called programming voltage, outputs with desired values, is shown in Fig. 3.
  • the DC voltage generator shown in the figure consists of a DC voltage generator (not shown), which is the main supply and supplies the unregulated DC voltage Vp3 of 30 volts via a connection 11. This is connected to the output connection 12 via an on / off switch 13 which can be controlled by the control signal CMDVpp, a current limiter 14 and a ballast transistor 15 of NPN type, the conductivity of which is controlled in such a way that a DC programming voltage Vpp appears at the output 12, which makes it possible To write information permanently into a chip card (not shown).
  • the programming voltage Vpp can take one of the following values: 5 volts, 12.5 volts, 15 volts and 21 volts. The accuracy of this programming voltage is ⁇ 2.5%.
  • the ballast transistor 15 serves to set the DC voltage at the output 12 to the selected value and to regulate this output voltage.
  • the base of this transistor 15 is connected to the output of a comparator 16, at the one input 16 1 of which a voltage proportional to the output voltage Vpp is present via a voltage divider with the resistors 17 and 18 of the values 407 and 196 kOhm.
  • the comparator 16 At a second input 16, the comparator 16, the setpoint of the control is at the value desired at the output 12.
  • a regulated DC voltage source 19 which supplies a DC voltage signal of the value 12 volts.
  • the accuracy of this value is ⁇ 5%.
  • This voltage is passed on via a resistor 20 of the value 470 ohms to the connections of a zener diode 21, which supplies a DC voltage of 6.8 volts with an accuracy of ⁇ 2%.
  • a voltage divider 22 with an output 23 is provided, which is connected to the input 16 2 of the comparator 16.
  • the voltage divider 22 contains a control resistor 24 between the connection 23 and ground and a resistor 26 of the value 6.8 kOhm between the connection 23 and a conductor 25 connected to the cathode of the zener diode 21.
  • resistors 27 and 28 are turned on in parallel with resistor 26. Each of these resistors is connected in series with a switch 27 1 or 28 1 controlled by the control signal (MDVppn).
  • the resistors 27 and 28 have the values 1.82 kOhm and 1.37 Ohm, respectively.
  • the accuracy of the value of these resistors is ⁇ 1%.
  • the resistance between the terminal 23 and the conductor 25 has a different value.
  • Three of the values are available: the first when the two switches 27 1 and 28 1 are open, the second when the switch 27 1 is closed and the switch 28 1 is open, and the third when the switch 27 1 is open and the switch 28 1 is closed.
  • the switches 27 1 and 28 1 are controlled by the interface switch by means (not shown) which receive the information about the voltage required for their programming from the chip card. Each switch is controlled by an output of a micro actuator. It is conceivable to implement the switches 27 1 , 28 1 in the form of semiconductor components, such as transistors, which are controlled accordingly.
  • the comparator 16 supplies the base of the transistor 15 with an error signal which represents the difference between the actual value of the signal Vpp at the output 12 and the setpoint value which is present at the input 16 2 .
  • the value of the signal of the output 12 depends on the conduction state of the ballast transistor 15.
  • the ballast transistor 15 can be replaced by any other component whose conductivity can be controlled.
  • the circuit just described enables the generation of three DC voltages with the desired accuracy ( ⁇ 2.5%) and has an extremely simple structure.
  • the regulation of the value of the resistor 24 enables the advantageous range of the characteristic curve of the Zener diode 21 to be used.

Landscapes

  • Engineering & Computer Science (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Physics & Mathematics (AREA)
  • Credit Cards Or The Like (AREA)
  • Power Sources (AREA)
  • Polyesters Or Polycarbonates (AREA)
  • Polysaccharides And Polysaccharide Derivatives (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Selective Calling Equipment (AREA)
  • Dc-Dc Converters (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

A system for activating an apparatus upon the insertion of a chip card into the apparatus by an authorized user includes a first control unit arranged on the chip card for providing an actuation signal when the chip card is initially inserted into the apparatus. A second control within the apparatus receiving the actuation signal and provides a triggering signal. A regulated voltage generator is responsive to the triggering signal and provides a regulated voltage to the first control unit.

Description

Die Erfindung betrifft ein Verfahren zur Aktivierung einer Chipkarte gemäß dem Oberbegriff des Hauptanspruchs, sowie eine bevorzugte zur Durchführung des erfindungsgemäßen Verfahrens geeignete Vorrichtung gemäß dem Oberbegriff des ersten Sachanspruchs. Ein solches Verfahren ist aus US-A-3 890 461 bekannt.The invention relates to a method for activating a chip card according to the preamble of the main claim, and a preferred device suitable for carrying out the method according to the invention according to the preamble of the first claim. Such a method is known from US-A-3 890 461.

Eine Karte mit integriertem Schaltkreis mit Kontakten oder "Chipkarte" hat üblicherweise eine rechteckige Form und weist an einer festgelegten Stelle einen integrierten Schaltkreis mit Kontakten an der Oberfläche auf. Eine derartige Vorrichtung hat eine Vielzahl von Anwendungen: Scheck- oder Kreditkarte, Telefon, Pay-TV etc.A card with an integrated circuit with contacts or "chip card" usually has a rectangular shape and has an integrated circuit with contacts on the surface at a fixed location. Such a device has a variety of uses: check or credit card, telephone, pay TV etc.

Eine derartige Karte ermöglicht ihrem Besitzer den Zugang zu einer Dienstleistung oder das Betreiben eines Apparates. Es wird insbesondere in Betracht gezogen, sie für ein Pay-TV-System zu verwenden, in dem das verschlüsselte Fernsehsignal durch ein Entschlüsselungsgerät empfangen wird, das ein entschlüsseltes Signal wiederherstellt, wenn dieses Gerät mit einer Chipkarte verbunden wird, die Genehmigungsinformationen enthält. Das Gerät für Empfang und Entschlüsselung der Signale ist für den Informationsaustauch mit dem Schaltkreis der Karte zur Prüfung, ob der Inhaber die Genehmigung hat, die Sendung zu empfangen, vorgesehen. Dieser Informationsaustausch oder Dialog erfolgt über einen Interfaceschaltkreis. Dieser enthält insbesondere einen Programmiergleichspannungsgenerator, um Informationen auf Dauer in den integrierten Schaltkreis zu schreiben.Such a card enables its owner to access a service or to operate an apparatus. In particular, it is contemplated to use it for a pay TV system in which the encrypted television signal is received by a decryption device that recovers a decrypted signal when that device is connected to a smart card that contains authorization information. The device for receiving and decoding the signals is for information exchange with the circuit of the card to check whether the holder has the authorization to receive the program. This information exchange or dialogue takes place via an interface circuit. This contains, in particular, a programming DC voltage generator in order to write information permanently into the integrated circuit.

Es gibt verschiedene Arten von Chipkarten und jeder Art entspricht eine Programmierungsspannung.There are different types of chip cards and each type corresponds to a programming voltage.

Der Erfindung liegt die Aufgabe zugrunde, ein zuverlässiges Verfahren zur Aktivierung einer Chipkarte und eine einfach zu verwirklichende Vorrichtung zu schaffen, die als Teil eines Apparates eingesetzt werden können, dessen volle Funktionsfähigkeit nur in Verbindung mit einer aktiven Chipkarte gewährleistet ist.The invention has for its object to provide a reliable method for activating a chip card and an easy to implement device that can be used as part of an apparatus whose full functionality is only guaranteed in connection with an active chip card.

Erfindungsgemäß erhält eine Steuereinheit des Apparates, beispielsweise eines Entschlüsselungs-Gerätes, von einer Steuereinheit einer mit dem Apparat in Verbindung gebrachten Chipkarte ein Signal, das den Wert einer Aktivierungsspannung bestimmt. Aufgrund des genannten Signales steuert die Steuereinheit des Apparates weitere Stufen an, die an die Chipkarte die erforderliche Aktivierungsspannung abheben. Die Aktivierungsspannung mit dem gewünschten Spannungswert ermöglicht es, daß die Chipkarte für weitere Schritte, beispielsweise zur Dekodierung von Informationen verwendet werden kann.According to the invention, a control unit of the apparatus, for example a decryption device, receives a signal from a control unit of a chip card connected to the apparatus, which signal determines the value of an activation voltage. On the basis of the signal mentioned, the control unit of the apparatus controls further stages, which draw off the required activation voltage from the chip card. The activation voltage with the desired voltage value enables the chip card to be used for further steps, for example for decoding information.

Eine Ausgestaltung der Erfindung definiert den zeitlichen Ablauf für das Anlegen von Versorgungsspannungen an die genannten Steuereinheiten.An embodiment of the invention defines the time sequence for the application of supply voltages to the control units mentioned.

So wird die in dem Apparat vorhandene Steuereinheit sofort nach dem Einschalten des Apparates mit einer notwendigen ersten Versorgungsspannung versorgt. Wird das Vorhandensein einer Chipkarte erkannt, so wird deren Steuersystem mit einer zweiten Versorgungsspannung versorgt, die gegenüber der ersten Versorgungsspannung verzögert anliegt.The control unit present in the apparatus is thus supplied with a necessary first supply voltage immediately after the apparatus is switched on. Will the existence If a chip card is recognized, its control system is supplied with a second supply voltage which is delayed compared to the first supply voltage.

Eine bevorzugte Ausgestaltung der erfindungsgemäßen Vorrichtung enthält einen Gleichspannungsgenerator, der die geforderte Aktivierungsspannung für die Chipkarte auf einfache Weise erzeugt.A preferred embodiment of the device according to the invention contains a DC voltage generator, which generates the required activation voltage for the chip card in a simple manner.

Dieser ist dadurch gekennzeichnet, daß er einen Generator für eine geregelte Spannung enthält, gefolgt von einen, ohmschen Spannungsteiler, der in einem Zweig parallel geschaltete Widerstände aufweist, von denen mindestens einer mit einem Schalter in Reihe geschaltet ist, der in Abhängigkeit von der zu liefernden Gleichspannung betätigt wird.This is characterized in that it contains a generator for a regulated voltage, followed by an ohmic voltage divider which has resistors connected in parallel in a branch, at least one of which is connected in series with a switch which is dependent on the one to be supplied DC voltage is operated.

Die durch den Spannungsteiler zur Verfügung gestellte Spannung kann direkt zur Aktivierung der Karte verwendet werden.The voltage provided by the voltage divider can be used directly to activate the card.

In einer vorteilhaften Ausführungsform jedoch stellt die Ausgangsspannung des Spannungsteilers eine Sollspannung dar, die einen Regelkreis beispielsweise mit einem Ballasttransistor steuert, der die Programmierung mit ausreichender Stromstärke liefert.In an advantageous embodiment, however, the output voltage of the voltage divider represents a nominal voltage which controls a control circuit, for example with a ballast transistor, which supplies the programming with a sufficient current strength.

Andere Merkmale und Vorteile der Erfindung werden aus der Beschreibung einiger ihrer Ausführungsbeispiele hervorgehen, die unter Bezugnahme auf die Zeichnung erfolgt. Dabei zeigen

Fig. 1
ein bevorzugtes Ausführungsbeispiel der erfindungsgemäßen Vorrichtung,
Fig. 2
das Flußdiagramm eines bevorzugten Ausführungsbeispiels des erfindungsgemäßen Verfahrens und
Fig. 3
ein bevorzugtes Ausführungsbeispiel eines Aktivierungsgleichspannungs-Generators.
Other features and advantages of the invention will emerge from the description of some of its exemplary embodiments, which takes place with reference to the drawing. Show
Fig. 1
a preferred embodiment of the device according to the invention,
Fig. 2
the flow diagram of a preferred embodiment of the method according to the invention and
Fig. 3
a preferred embodiment of a Activation DC voltage generator.

Bevor auf die Beschreibung des Ausführungsbeispiels näher eingegangen wird, sei darauf hingewiesen, daß die in den Figuren einzeln dargestellten Blöcke lediglich zum besseren Verständnis der Erfindung dienen. Üblicherweise sind einzelne oder mehrere dieser Blöcke zu Einheiten zusammengefaßt. Diese können in integrierter oder Hypridtechnik oder als programmgesteuerter Mikrorechner, bzw. als Teil eines zu seiner Steuerung geeigneten Programmes realisiert sein.Before the description of the exemplary embodiment is discussed in more detail, it should be pointed out that the blocks shown individually in the figures serve only for a better understanding of the invention. Usually, one or more of these blocks are combined into units. These can be implemented in integrated or hybrid technology or as a program-controlled microcomputer, or as part of a program suitable for its control.

Weiterhin sei darauf hingewiesen, daß die in den einzelnen Stufen enthaltenen Vorrichtungen und Elemente auch getrennt ausgeführt werden können.Furthermore, it should be pointed out that the devices and elements contained in the individual stages can also be carried out separately.

Fig. 1 zeigt einen ersten Gleichspannungsregler 1, dem eine erste ungeregelte Gleichspannung Vp1 zugeführt wird und der eine erste geregelte Gleichspannung VMB an eine erste elektronische Steuereinheit 2 (Electronic Control Unit ECU1), die einen Apparat, beispielsweise einem Entschlüsselungsgerät, zugeordnet ist, zuführt.1 shows a first DC voltage regulator 1, to which a first unregulated DC voltage Vp1 is fed and which supplies a first regulated DC voltage VMB to a first electronic control unit 2 (Electronic Control Unit ECU1), which is assigned an apparatus, for example a decryption device.

Weiterhin ist ein zweiter Gleichspannungsregler 3 vorgesehen, dem eine zweite ungeregelte Gleichspannung Vp2 zugeführt wird und der eine zweite geregelte Gleichspannung Vcc an eine zweite elektronische Steuereinheit 4 (ECU2) abgibt, die einer nicht dargestellten Chipkarte zugeordnet ist. Diese Chipkarte muß zur Durchführung von Entschlüsselungs-Vorgängen mit dem Apparat in direkte oder indirekte Verbindung gebracht werden.Furthermore, a second DC voltage regulator 3 is provided, to which a second unregulated DC voltage Vp2 is supplied and which outputs a second regulated DC voltage Vcc to a second electronic control unit 4 (ECU2) which is assigned to a chip card (not shown). This chip card must be connected to the apparatus in direct or indirect connection in order to carry out decryption processes.

Ein Gleichspannungsgenerator 5 erhält eine dritte ungeregelte Gleichspannung Vp3 und gibt eine dritte geregelte Gleichspannung Vpp, im folgenden auch Programmgleichspannung genannt, an die zweite elektronische Steuereinheit 4 ab.A DC voltage generator 5 receives a third unregulated DC voltage Vp3 and outputs a third regulated DC voltage Vpp, hereinafter also referred to as program DC voltage, to the second electronic control unit 4.

Die erste elektronische Ste.iereinheit 2 enthält einerseits ein Signal CP, welches den Wert 1 annimmt, wenn die Verbindung zwischen der Chipkarte und dem Apparat vorhanden ist und andererseits ein Aktivierungssignal von der zweiten elektronischen Steuereinheit 4.The first electronic control unit 2 contains on the one hand a signal CP which assumes the value 1 when the connection between the chip card and the apparatus is present and on the other hand an activation signal from the second electronic control unit 4.

Die erste elektronische Steuereinheit 2 gibt ein erstes Steuersignal CMDVcc an den zweiten Spannungsregler 3, ein zweites und ein drittes Steuersignal CMDVpp bzw. CMMDVppn an den Gleichspannungsgenerator 5 sowie ein weiteres Signal an die zweite elektronische Steuereinheit 4 ab.The first electronic control unit 2 outputs a first control signal CMDVcc to the second voltage regulator 3, a second and a third control signal CMDVpp or CMMDVppn to the DC voltage generator 5 and a further signal to the second electronic control unit 4.

Die Funktion des bevorzugten Ausführungsbeispiels gemäß Fig. 1 der erfindungsgemäßen Vorrichtung wird nun mit Hilfe des erfindungsgemäßen Verfahrens erläutert, dessen Flußdiagramm in Fig. 2 dargestellt ist.The function of the preferred exemplary embodiment according to FIG. 1 of the device according to the invention will now be explained with the aid of the method according to the invention, the flow diagram of which is shown in FIG. 2.

Das Verfahren startet mit Schritt 100, in dem der Apparat eingeschaltet wird und die ungeregelten Spannungen Vp, entsprechend Vp1, Vp2, Vp3 anliegen. Der erste Spannungsregler 1 erzeugt in Schritt 101 die geregelte Gleichspannung VMB, wodurch die erste elektronische Steuereinheit 2 eingeschaltet wird.The method starts with step 100, in which the apparatus is switched on and the unregulated voltages Vp, corresponding to Vp1, Vp2, Vp3, are present. The first voltage regulator 1 generates the regulated DC voltage VMB in step 101, whereby the first electronic control unit 2 is switched on.

Erst nachdem diese in Betrieb ist, d.h. bei einem Mikroprozessor beispielsweise, daß erst eine sogenannte RESET-Routine durchgeführt werden muß, folgt ein Schritt 102, in dem überprüft wird, ob eine verschlüsselte Sendung empfangen wird.Only after this is in operation, i.e. in the case of a microprocessor, for example, that a so-called RESET routine must first be carried out, step 102 follows in which it is checked whether an encrypted broadcast is received.

Nachdem in Schritt 103 festgestellt wurde, daß eine Verbindung zwischen der Chipkarte und dem Apparat hergestellt ist (CP=1), wird in Schritt 104 das Steuersignal CMDVcc an den zweiten Spannungsregler 3 abgegeben. Dieser erzeugt daraufhin die geregelte Gleichspannung Vcc, wodurch die zweite elektronische Steuereinheit 4 eingeschaltet wird (Schritt 104a). Durch das Steuersignal CMDVpp, das von dem ersten elektronische Steuergerät 2 in Schritt 105 an den Gleichspannungsgenerator gegeben wird, gibt dieser in Schritt 105a die Spannung Vpp mit einem festen Wert, in diesem Beispiel mit 5 Volt ab.After it has been determined in step 103 that a connection has been established between the chip card and the apparatus (CP = 1), the control signal CMDVcc is output to the second voltage regulator 3 in step 104. This then generates the regulated DC voltage Vcc, which makes the second electronic control unit 4 is turned on (step 104a). The control signal CMDVpp, which is sent from the first electronic control unit 2 to the direct voltage generator in step 105, outputs the voltage Vpp with a fixed value, in this example 5 volts, in step 105a.

Die zweite elektronische Steuereinheit 4 gibt in Schritt 106 an die erste elektronische Steuereinheit 2 das Aktivierungssignal, das Informationen über den zur Aktivierung erforderlichen Wert Vn der Programmiergleichspannung Vpp enthält.In step 106, the second electronic control unit 4 sends the activation signal to the first electronic control unit 2, which contains information about the value Vn of the programming DC voltage Vpp required for activation.

Aufgrund des Aktivierungssignals gibt die erste elektronische Steuereinheit 2 in Schritt 107 das Steuersignal CMDVppn an den Gleichspannungsgenerator 5, der daraufhin die Gleichspannung Vpp mit dem gewünschten Wert Vn einschaltet, welche dem zweiten elektronischen Steuergerät zugeführt wird (Schritt 108).On the basis of the activation signal, the first electronic control unit 2 sends the control signal CMDVppn to the DC voltage generator 5 in step 107, which then switches on the DC voltage Vpp with the desired value Vn, which is fed to the second electronic control unit (step 108).

Anschließend folgt das Ende des Verfahrens in Schritt 109, der auch direkt folgt, wenn in Schritt 102 oder Schritt 103 festgestellt wird, daß keine für das System geeignete verschlüsselte Sendung bzw. keine Verbindung zwischen der Chipkarte und dem Apparat (CP ungleich 1) vorliegt.This is followed by the end of the method in step 109, which also follows directly if it is determined in step 102 or step 103 that there is no encrypted mail suitable for the system or no connection between the chip card and the apparatus (CP not equal to 1).

Bei Versionen der erfindungsgemäßen Vorrichtung gemäß Fig. 1 können die ungeregelten Gleichspannungen Vp1, Vp2, Vp3 identisch sein, so daß die Eingänge der Spannungsregler 1, 3 und des Gleichspannungsgenerators 5 miteinander verbunden sind. Weiterhin ist es denkbar, daß der Spannungsregler 3 dergestalt ist, daß die Amplitude der Spannung Vcc zeitlich ansteigt.1, the unregulated DC voltages Vp1, Vp2, Vp3 can be identical, so that the inputs of the voltage regulators 1, 3 and the DC voltage generator 5 are connected to one another. Furthermore, it is conceivable that the voltage regulator 3 is such that the amplitude of the voltage Vcc increases over time.

Ein bevorzugtes Ausführungsbeispiel des Gleichspannungsgenerators 5, der die Aktivierungsgleichspannung Vpp, im folgenden auch Programmierspannung genannt, mit gewünschten Werten abgibt, ist in Fig. 3 dargestellt.A preferred embodiment of the DC voltage generator 5, the activation DC voltage Vpp, in the following also called programming voltage, outputs with desired values, is shown in Fig. 3.

Es sei darauf hingewiesen, daß die angegebenen Werte für Spannungen und Bauelementdimensionierung lediglich ein bevorzugtes Ausführungsbeispiel charakterisieren, die Erfindung selbst aber nicht darauf beschränken. Der in der Figur dargestellte Gleichspannungsgenerator besteht aus einem Gleichspannungsgenerator (nicht dargestellt), der die Hauptversorgung darstellt und die ungeregelte Gleichspannung Vp3 von 30 Volt über einen Anschluß 11 liefert. Dieser ist mi dem Ausgangsanschluß 12 über einen durch das Steuersignal CMDVpp ansteuerbaren Ein-/ Ausschalter 13, einen Strombegrenzer 14 und einen Ballasttransistor 15 von NPN-Typ verbunden, dessen Leitfähigkeit derart gesteuert wird, daß am Ausgang 12 eine Programmiergleichspannung Vpp erscheint, die es ermöglicht, Informationen auf Dauer in eine Chipkarte (nicht dargestellt) zu schreiben. Die Programmierspannung Vpp kann einen der folgenden Werte annehmen: 5 Volt, 12,5 Volt, 15 Volt und 21 Volt. Die Genauigkeit dieser Programmierspannung beträgt ±2,5 %.It should be pointed out that the specified values for voltages and component dimensioning only characterize a preferred exemplary embodiment, but do not limit the invention itself to this. The DC voltage generator shown in the figure consists of a DC voltage generator (not shown), which is the main supply and supplies the unregulated DC voltage Vp3 of 30 volts via a connection 11. This is connected to the output connection 12 via an on / off switch 13 which can be controlled by the control signal CMDVpp, a current limiter 14 and a ballast transistor 15 of NPN type, the conductivity of which is controlled in such a way that a DC programming voltage Vpp appears at the output 12, which makes it possible To write information permanently into a chip card (not shown). The programming voltage Vpp can take one of the following values: 5 volts, 12.5 volts, 15 volts and 21 volts. The accuracy of this programming voltage is ± 2.5%.

Der Ballasttransistor 15 dient dazu, die Gleichspannung am Ausgang 12 auf den gewählten Wert einzustellen und diese Ausgangsspannung zu regeln.The ballast transistor 15 serves to set the DC voltage at the output 12 to the selected value and to regulate this output voltage.

Zu diesem Zweck ist die Basis dieses Transistors 15 mit dem Ausgang eines Vergleichers 16 verbunden, an dessen einem Eingang 161 über einen Spannungsteiler mit den Widerständen 17 und 18 der Werte 407 bzw. 196 kOhm eine Spannung proportional zur Ausgangsspannung Vpp anliegt. An einem zweiten Eingang 16, des Vergleichers 16 liegt der Sollwert der Regelung an der dem am Ausgang 12 gewünschten Wert entspricht.For this purpose, the base of this transistor 15 is connected to the output of a comparator 16, at the one input 16 1 of which a voltage proportional to the output voltage Vpp is present via a voltage divider with the resistors 17 and 18 of the values 407 and 196 kOhm. At a second input 16, the comparator 16, the setpoint of the control is at the value desired at the output 12.

Zur Erzeugung des Sollwertes wird eine geregelte Gleichspannungsquelle 19 vorgesehen, die ein Gleichspannungssignal des Wertes 12 Volt liefert. Die Genauigkeit dieses Wertes beträgt ±5 %. Diese Spannung wird über einen Widerstand 20 des Wertes 470 Ohm an die Anschlüsse einer Zenerdiode 21 weitergegeben, die eine Gleichspannung von 6,8 Volt mit einer Genauigkeit von ±2 % liefert.To generate the setpoint, a regulated DC voltage source 19 is provided, which supplies a DC voltage signal of the value 12 volts. The accuracy of this value is ± 5%. This voltage is passed on via a resistor 20 of the value 470 ohms to the connections of a zener diode 21, which supplies a DC voltage of 6.8 volts with an accuracy of ± 2%.

Parallel zur Zenerdiode 21 wird ein Spannungsteiler 22 mit Ausgang 23 vorgesehen, der mit dem Eingang 162 des Vergleichers 16 verbunden ist.In parallel to the zener diode 21, a voltage divider 22 with an output 23 is provided, which is connected to the input 16 2 of the comparator 16.

Der Spannungsteiler 22 enthält zwischen dem Anschluß 23 und Masse einen Regelwiderstand 24 und zwischen dem Anschluß 23 und einem mit der Kathode der Zenerdiode 21 verbundenen Leiter 25 einen Widerstand 26 des Wertes 6,8 kOhm.The voltage divider 22 contains a control resistor 24 between the connection 23 and ground and a resistor 26 of the value 6.8 kOhm between the connection 23 and a conductor 25 connected to the cathode of the zener diode 21.

Außerdem sind Widerstände 27 und 28 parallel zum Widerstand 26 eingeschaltet. Jeder dieser Widerstände ist mit einem durch das Steuersignal (MDVppn) gesteuerten Schalter 271 bzw. 281 in Reihe geschaltet.In addition, resistors 27 and 28 are turned on in parallel with resistor 26. Each of these resistors is connected in series with a switch 27 1 or 28 1 controlled by the control signal (MDVppn).

Die Widerstände 27 und 28 haben die Werte 1,82 kOhm bzw. 1,37 Ohm. Die Genauigkeit des Wertes dieser Widerstände beträgt ±1 %.The resistors 27 and 28 have the values 1.82 kOhm and 1.37 Ohm, respectively. The accuracy of the value of these resistors is ± 1%.

Ja nach dem Zustand (geöffnet/geschlossen) jedes der Schalter 271 und 281 hat der Widerstand zwischen dem Anschluß 23 und dem Leiter 25 einen anderen Wert. Drei der Werte stehen zur Verfügung: Der erste, wenn die beiden Schalter 271 und 281 geöffnet sind, der zweite, wenn der Schalter 271 geschlossen und der Schalter 281 geöffnet ist, und der dritte, wenn der Schalter 271 geöffnet und der Schalter 281 geschlossen ist.Depending on the state (open / closed) of each of the switches 27 1 and 28 1 , the resistance between the terminal 23 and the conductor 25 has a different value. Three of the values are available: the first when the two switches 27 1 and 28 1 are open, the second when the switch 27 1 is closed and the switch 28 1 is open, and the third when the switch 27 1 is open and the switch 28 1 is closed.

Die Steuerung der Schalter 271 und 281 erfolgt durch den Interfaceschalter mit Mitteln (nicht dargestellt), die von der Chipkarte die Information über die zu ihrer Programmierung erforderliche Spannung erhalten. Jeder Schalter wird durch einen Ausgang eines Mikrostellgliedes gesteuert. Denkbar ist eine Realisierung der Schalter 271, 281 in Form von Halbleiterbauelementen, wie Transistoren, die entsprechend angesteuert werden.The switches 27 1 and 28 1 are controlled by the interface switch by means (not shown) which receive the information about the voltage required for their programming from the chip card. Each switch is controlled by an output of a micro actuator. It is conceivable to implement the switches 27 1 , 28 1 in the form of semiconductor components, such as transistors, which are controlled accordingly.

Die Schaltung arbeitet folgendermaßen: Der Vergleicher 16 liefert der Basis des Transistors 15 ein Fehlersignal, das die Differenz zwischen dem tatsächlichen Wert des Signals Vpp am Ausgang 12 und dem Sollwert darstellt, der am Eingang 162 anliegt. Der Wert des Signals des Ausgangs 12 hängt vom Leitungszustand des Ballasttranistors 15 ab. Der Ballasttransistor kann 15 durch ein beliebiges anderes Bauteil ersetzt werden, dessen Leitfähigkeit steuerbar ist.The circuit works as follows: the comparator 16 supplies the base of the transistor 15 with an error signal which represents the difference between the actual value of the signal Vpp at the output 12 and the setpoint value which is present at the input 16 2 . The value of the signal of the output 12 depends on the conduction state of the ballast transistor 15. The ballast transistor 15 can be replaced by any other component whose conductivity can be controlled.

Die soeben beschriebene Schaltung ermöglicht die Erzeugung dreier Gleichspannungen mit der gewünschten Genauigkeit (±2,5 %) und hat einen extrem einfachen Aufbau. Durch Vergrößerung der Anzahl der zum Widerstand 26 parallel geschalteten Widerstände, wobei mit jedem dieser zusätzlichen Widerstände ein Schalter verbunden ist, kann die Anzahl der Spannungswerte, die dem Ausgang 12 geliefert werden können, erhöht werden. Es ist auch möglich, nur zwei Widerstände vorzusehen, beispielsweise die Widerstände 26 und 27. In diesem Fall stehen nur zwei mögliche Spannungswerte zur Verfügung.The circuit just described enables the generation of three DC voltages with the desired accuracy (± 2.5%) and has an extremely simple structure. By increasing the number of resistors connected in parallel with resistor 26, with a switch being connected to each of these additional resistors, the number of voltage values that can be supplied to output 12 can be increased. It is also possible to provide only two resistors, for example resistors 26 and 27. In this case only two possible voltage values are available.

Die Regelung des Wertes des Widerstandes 24 ermöglicht die Verwendung des vorteilhaften Bereiches der Kennlinie der Zenerdiode 21.The regulation of the value of the resistor 24 enables the advantageous range of the characteristic curve of the Zener diode 21 to be used.

Claims (16)

  1. Method of activating a chip card which comprises a second control unit and, when it is connected to an apparatus comprising a first control unit, of then allowing normal operation, characterised in that, the first control unit emits a first signal to the second control unit whereupon the latter controls further stages of the apparatus so that an activating voltage, whose values are predetermined by a second signal delivered by the chip card, is made available to the chip card.
  2. Method in accordance with Claim 1, characterised in that, a supply voltage for the second control unit is only made available a predetermined time after the apparatus is switched on.
  3. Method in accordance with Claim 2, characterised in that, the predetermined time is determined by the time which is required for the first control unit to become operational after the action of switching on.
  4. Method in accordance with Claim 1 to 3, characterised in that, the value of the activating voltage is time controlled and climbs from a predetermined starting value to a predetermined end value.
  5. Method in accordance with any of the Claims 1 to 4, characterised in that, the apparatus is constructed as a decoding device and the chip card contains items of information whereby a coded video signal can be decoded after the activating voltage has been made available to the chip card.
  6. Device for activating a chip card which comprises a second control unit (4) and then, when it is connected to an apparatus comprising a first control unit (2), allowing it to operate normally, characterised in that, the first control unit (2) is constructed in such a way that it emits a first signal to the second control unit (4) whereupon this controls further stages (5) of the apparatus which make an activating voltage (Vpp), whose values are predetermined by a second signal delivered by the chip card, available to the chip card.
  7. Device in accordance with Claim 6, characterised in that, there are provided first means (2, 3) which are effective to only make the supply voltage (Vcc) for the second control unit available a predetermined time after the apparatus is switched on.
  8. Device in accordance with Claim 7, characterised in that, the first means (2, 3) determine the predetermined time on the basis of the time which is required for the first control unit (2) to become operational after the action of switching on.
  9. Device in accordance with any of the Claims 6 to 8, characterised in that, there are provided further means (2, 5) which control the value of the activating voltage (Vpp) in timely manner so that it climbs from a predetermined starting value to a predetermined end value (Vn).
  10. Device in accordance with any of the Claims 6 to 9, characterised in that, the apparatus is constructed as a decoding device and the chip card contains items of information whereby a coded video signal can be decoded after the activating voltage (Vpp) has been made available to the chip card.
  11. Device in accordance with any of the Claims 6 to 10, characterised in that, there is provided a dc voltage generator (5) that is controllable by the first control unit (2) and which consists of a voltage divider (22) including resistors (24, 26) and comprises at least two parallel connected resistors (26, 27) in one branch, of which at least one resistor is connected in series with a controlled switch (27) whereby the value of the dc voltage delivered by the generator (5) is dependent on the state (open or closed) of the switch (27).
  12. Device in accordance with Claim 11, characterised in that, the voltage divider (22) comprises a resistor (26) to which there are connected in parallel, two resistors (27 and 28), of which each is connected in series with a corresponding controlled switch (271, 281).
  13. Device in accordance with Claim 11 or 12, characterised in that, the output signal from the voltage divider (22) is connected to the reference value input (162) of a control loop which delivers the wanted dc voltage (Vpp) at its output (12).
  14. Device in accordance with Claim 13, characterised in that, the control loop comprises a ballast transistor (15) or the like whose power state is regulated in dependence on the error signal from the regulating process i.e. on the deviation of the actual output value from the reference value.
  15. Device in accordance with Claim 14, characterised in that, it comprises a comparator (16) on whose first input the signal delivered by the voltage divider is present and on whose second input there is a signal representing the output signal (Vpp).
  16. Device in accordance with any of the Claims 11 to 15, characterised in that, a resistor (24) having an adjustable value is provided in a second branch of the voltage divider.
EP90916993A 1989-11-07 1990-11-03 Process and device for activating a chip card Expired - Lifetime EP0500693B1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR8914567 1989-11-07
FR8914567A FR2654232A1 (en) 1989-11-07 1989-11-07 CONTINUOUS VOLTAGE GENERATOR FOR SUPPLYING AN INTEGRATED CIRCUIT BOARD.
PCT/EP1990/001845 WO1991007056A1 (en) 1989-11-07 1990-11-03 Process and device for activating a chip card

Publications (2)

Publication Number Publication Date
EP0500693A1 EP0500693A1 (en) 1992-09-02
EP0500693B1 true EP0500693B1 (en) 1996-08-14

Family

ID=9387145

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90916993A Expired - Lifetime EP0500693B1 (en) 1989-11-07 1990-11-03 Process and device for activating a chip card

Country Status (15)

Country Link
US (1) US5265161A (en)
EP (1) EP0500693B1 (en)
JP (1) JP3194946B2 (en)
KR (1) KR100212381B1 (en)
AT (1) ATE141463T1 (en)
AU (1) AU639279B2 (en)
DE (1) DE59010455D1 (en)
ES (1) ES2091829T3 (en)
FI (1) FI922048A (en)
FR (1) FR2654232A1 (en)
HK (1) HK1000753A1 (en)
HU (1) HUT63288A (en)
NO (1) NO180179C (en)
SG (1) SG52445A1 (en)
WO (1) WO1991007056A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5768147A (en) * 1995-03-23 1998-06-16 Intel Corporation Method and apparatus for determining the voltage requirements of a removable system resource
ES2178456T3 (en) * 1998-07-29 2002-12-16 Infineon Technologies Ag DATA SUPPORT WITH REGULATION OF POWER ENTRY.
US6753758B2 (en) 2001-01-03 2004-06-22 Gerald Adolph Colman System and method for switching voltage
EP1447809A1 (en) * 2003-02-14 2004-08-18 SCHLUMBERGER Systèmes Card with multiple IC's
US7968018B2 (en) * 2007-04-18 2011-06-28 Coopervision International Holding Company, Lp Use of surfactants in extraction procedures for silicone hydrogel ophthalmic lenses
KR102170184B1 (en) * 2019-03-21 2020-10-26 진혜성 Arm warmers

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3890461A (en) * 1973-03-27 1975-06-17 Theatrevision Inc Ticket operated subscription television receiver
US4001550A (en) * 1975-12-04 1977-01-04 Schatz Vernon L Universal funds transfer and identification card
US4254439A (en) * 1979-12-26 1981-03-03 International Business Machines Corporation Facsimile mid-page restart
DE3071548D1 (en) * 1980-01-04 1986-05-22 Fanuc Ltd Reference voltage generating circuit in dc regulated power source apparatus
JPS5785109A (en) * 1980-11-14 1982-05-27 Seiko Epson Corp Driving circuit
JPS5785111A (en) * 1980-11-17 1982-05-27 Fujitsu Ltd Reference constant voltage power supply
JPS5785110A (en) * 1980-11-18 1982-05-27 Oki Electric Ind Co Ltd Dc stabilized power supply circuit
US4795898A (en) * 1986-04-28 1989-01-03 American Telephone And Telegraph Company Personal memory card having a contactless interface using differential data transfer
US4880097A (en) * 1987-04-16 1989-11-14 Pom Incorporated Park card system for electronic parking meter
DE3736985A1 (en) * 1987-10-31 1989-05-11 Grundig Emv METHOD FOR DETECTING CHARGES IN TELEVISION TELEVISION BROADCASTING
US4914742A (en) * 1987-12-07 1990-04-03 Honeywell Inc. Thin film orthogonal microsensor for air flow and method
JP2723296B2 (en) * 1989-06-06 1998-03-09 株式会社東芝 Portable media
FR2654235B1 (en) * 1989-11-07 1992-01-17 Europ Rech Electr Lab CARD READER WITH INTEGRATED CIRCUIT WITH CONTACTS.
US5149945A (en) * 1990-07-05 1992-09-22 Micro Card Technologies, Inc. Method and coupler for interfacing a portable data carrier with a host processor

Also Published As

Publication number Publication date
ATE141463T1 (en) 1996-08-15
ES2091829T3 (en) 1996-11-16
AU639279B2 (en) 1993-07-22
HK1000753A1 (en) 1998-04-24
JPH05501464A (en) 1993-03-18
DE59010455D1 (en) 1996-09-19
FI922048A0 (en) 1992-05-06
WO1991007056A1 (en) 1991-05-16
HU9201511D0 (en) 1992-08-28
NO180179C (en) 1997-02-26
US5265161A (en) 1993-11-23
JP3194946B2 (en) 2001-08-06
FI922048A (en) 1992-05-06
KR100212381B1 (en) 1999-08-02
NO180179B (en) 1996-11-18
NO921790L (en) 1992-05-06
AU6738590A (en) 1991-05-31
SG52445A1 (en) 1998-09-28
EP0500693A1 (en) 1992-09-02
FR2654232A1 (en) 1991-05-10
HUT63288A (en) 1993-07-28
NO921790D0 (en) 1992-05-06

Similar Documents

Publication Publication Date Title
DE4025457B4 (en) Standby / operating power supply and control circuit for a television set
DE4317297B4 (en) Power for normal and standby mode
EP1675757B1 (en) Device and method for controlling a d.c. voltage
DE3853650T3 (en) Device for controlling the reception of a television receiver.
EP1379108A1 (en) LED supply and identification unit
DE10296400T5 (en) Wake-up system for electronic components supported on a vehicle
WO1985002475A1 (en) Process for monitoring electronic computing elements, particularly microprocessors
DE69416719T2 (en) Programming device programming method and programming device
DE69015585T2 (en) Contact chip card reader.
DE3689986T2 (en) Low voltage monitoring circuit.
DE10330451B3 (en) Arrangement for waking up vehicle controller has pulse generation stage with center tap connected to control input of a first transistor connected to control input of second transistor with on locking
EP0500693B1 (en) Process and device for activating a chip card
EP1497703A1 (en) Circuit arrangement for voltage regulation by means of a voltage divider
DE3524158C2 (en)
EP0461432A2 (en) Device for connecting and disconnecting a load
EP1956711B1 (en) Electronic circuitry for a high frequency switch
EP1132802A1 (en) Supply voltage booster for electronic assemblies
DE4308928A1 (en) Power source switching circuit
EP0242640A1 (en) Circuit for monitoring electric voltages and/or currents
DE10211912B4 (en) Integrated circuit and method for controlling a power supply thereof
EP0530472A1 (en) Multiplex system
WO2000075794A1 (en) Interface for coupling a bus node to the bus line of a bus system
EP1208546B1 (en) Circuit and method for safeguarding electronic devices
EP0978025A1 (en) Electronic circuit
DE69527751T2 (en) Radio receiver with two receivers

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

17P Request for examination filed

Effective date: 19920430

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE CH DE DK ES FR GB GR IT LI LU NL SE

17Q First examination report despatched

Effective date: 19940502

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAH Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOS IGRA

GRAA (expected) grant

Free format text: ORIGINAL CODE: 0009210

AK Designated contracting states

Kind code of ref document: B1

Designated state(s): AT BE CH DE DK ES FR GB GR IT LI LU NL SE

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: NL

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 19960814

Ref country code: DK

Effective date: 19960814

Ref country code: GR

Free format text: LAPSE BECAUSE OF FAILURE TO SUBMIT A TRANSLATION OF THE DESCRIPTION OR TO PAY THE FEE WITHIN THE PRESCRIBED TIME-LIMIT

Effective date: 19960814

REF Corresponds to:

Ref document number: 141463

Country of ref document: AT

Date of ref document: 19960815

Kind code of ref document: T

ITF It: translation for a ep patent filed
REF Corresponds to:

Ref document number: 59010455

Country of ref document: DE

Date of ref document: 19960919

GBT Gb: translation of ep patent filed (gb section 77(6)(a)/1977)

Effective date: 19960911

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: AT

Effective date: 19961103

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: SE

Effective date: 19961114

ET Fr: translation filed
REG Reference to a national code

Ref country code: ES

Ref legal event code: FG2A

Ref document number: 2091829

Country of ref document: ES

Kind code of ref document: T3

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: BE

Effective date: 19961130

Ref country code: CH

Effective date: 19961130

Ref country code: LI

Effective date: 19961130

Ref country code: LU

Free format text: LAPSE BECAUSE OF NON-PAYMENT OF DUE FEES

Effective date: 19961130

ET1 Fr: translation filed ** revision of the translation of the patent or the claims
NLV1 Nl: lapsed or annulled due to failure to fulfill the requirements of art. 29p and 29m of the patents act
PLBE No opposition filed within time limit

Free format text: ORIGINAL CODE: 0009261

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: NO OPPOSITION FILED WITHIN TIME LIMIT

REG Reference to a national code

Ref country code: CH

Ref legal event code: PL

26N No opposition filed
REG Reference to a national code

Ref country code: GB

Ref legal event code: 746

Effective date: 19970808

REG Reference to a national code

Ref country code: FR

Ref legal event code: D6

REG Reference to a national code

Ref country code: GB

Ref legal event code: IF02

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: DE

Payment date: 20091118

Year of fee payment: 20

Ref country code: ES

Payment date: 20091201

Year of fee payment: 20

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: GB

Payment date: 20091124

Year of fee payment: 20

Ref country code: FR

Payment date: 20091208

Year of fee payment: 20

REG Reference to a national code

Ref country code: GB

Ref legal event code: PE20

Expiry date: 20101102

PGFP Annual fee paid to national office [announced via postgrant information from national office to epo]

Ref country code: IT

Payment date: 20091113

Year of fee payment: 20

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: GB

Free format text: LAPSE BECAUSE OF EXPIRATION OF PROTECTION

Effective date: 20101102

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: DE

Free format text: LAPSE BECAUSE OF EXPIRATION OF PROTECTION

Effective date: 20101103

REG Reference to a national code

Ref country code: ES

Ref legal event code: FD2A

Effective date: 20140826

PG25 Lapsed in a contracting state [announced via postgrant information from national office to epo]

Ref country code: ES

Free format text: LAPSE BECAUSE OF EXPIRATION OF PROTECTION

Effective date: 20101104