EP0457638B1 - Method for adjusting the brightness of display screens - Google Patents

Description

The invention relates to a method for controlling display screens, making it possible to increase the dynamic range for adjusting the brightness of these screens. The invention applies to screens of the internal memory type. By screens with internal memory, we mean screens whose cells which form the elementary image seals keep the "written" state in which they are likely to be activated, after the end of the state control signal " inscribed ", as is the case in particular for plasma panels and particularly those of the alternative type.

The use of display screens in very diverse lighting atmospheres can lead to adjusting their overall luminance according to the ambient brightness in which they are used. In fact, it is recommended that the screen brightness be comparable to that of the environment, otherwise the user will be tired.

The lighting conditions around the screen can vary by a factor of around 1,000 (from a few tens of lux indoors, with dimmed lighting, to a few tens of thousands of lux in an outdoor environment, in full sun) .

This poses the problem of the dynamic adjustment of the overall luminance of these screens, because to date this dynamic is much lower than that of ambient brightness, under the various possible conditions of use mentioned above.

Taking for example the case of plasma panels of the alternative type, the conventional method for adjusting the luminance of the screen consists in adjusting the frequency of signals. called maintenance signals, by which cells in the so-called "on" or "registered" state produce light.

The operation and structure of plasma panels of the alternative type (which have a memory effect), are in themselves well known: these panels are for example of the type with two crossed electrodes to define a discharge cell as described in a French patent in the name of THOMSON-CSF published with the number 2.417.848; these panels can also be of the coplanar maintenance type, in which for the same cell, addressing discharges and maintenance discharges are carried out between different electrodes, as described in particular in a European patent application EP-A-0135382 .

The operating principle of these alternating type plasma panels takes advantage of their memory property to temporarily separate the addressing functions of the cell (writing or erasing of information) from the functions which serve to produce useful light.

These panels include a plurality of cells generally arranged in rows and columns. The addressing of a given cell is carried out by the selection of two crossed electrodes to which one applies, at a given instant, appropriate voltages so that the potential difference causes between these electrodes a writing discharge or an erasing discharge .

A classic addressing method consists in operating line by line: in this case all the cells of a given line are controlled simultaneously (semi-selective operation), to be "registered" or "erased", erased for example and this operation is followed by a selective operation during which one or more selected cells of this same line are "registered".

The semi-selective operation followed by the selective operation is performed for each line, with an offset of time from one line to another which corresponds to the duration of a line cycle.

It should be noted that generally the addressing by semi-selective and selective operations is carried out by a method of superposition of addressing slots on basic slots, as explained for example in the French patent application FR-A-2 635 901 in the name of THOMSON-CSF, and in the French application FR-A-2 635 902 also in the name of THOMSON-CSF.

These basic slots are applied simultaneously to all the cells during a time which constitutes an addressing phase, and the addressing slots are superimposed on these basic slots only for the lines or cells addressed with, from a line to the 'other, the time offset corresponding to the duration of a line cycle CL; that is, the beginnings of two consecutive addressing phases are separated by the length of the line cycle.

Generally, in each line cycle, the addressing phase is followed by a maintenance phase during which the cells in the "registered" state are activated, that is to say produce light. In fact, in the maintenance phase, maintenance signals are applied simultaneously to all the cells, and cause maintenance discharges which provide most of the light emission perceived by an observer.

The maintenance signal is an alternating signal made up of successive voltage slots with opposite polarities: each change of sign of the alternating signal (rising or falling edges) generates a discharge in the gas and an emission of light at the level of the or affected cells. Thus the quantity of light emitted by a cell in the "on" state, that is to say "registered", is substantially proportional to the number of edges corresponding to changes in polarity, and consequently to the frequency of the signal d 'interview.

It should be noted that in the addressing phase, the basic slots for both registration and erasure have substantially the same amplitude as the maintenance signals, and consequently they can also generate comparable discharges. at maintenance landfills, with light emission. Consequently, it can be considered that the addressing phases contain at least one maintenance cycle.

The frequency of the maintenance signal can be made adjustable and by adjusting it, the overall luminance of the screen is adjusted.

In practice, however, the refresh rates of the information, that is to say the renewal of the image, as well as physical limitations on the durations of the discharges, greatly limit the possibilities of adjusting the luminance of the screen. using the frequency variation of the maintenance signal.

In the case for example of a conventional plasma panel screen comprising 480 lines of cells, refreshed 50 times per second, that is to say with a frame time equal to 20 ms, the time of a cycle of line CL corresponds to: $$\text{20 ms / 480 = 41.7 s.}$$

In practice it takes about 20 seconds to perform (during the addressing phase) an addressing comprising a semi-selective operation followed by a selective operation, and the time which is available inside the line cycles for a phase specific to maintenance cycles is equal to: $$\text{41.7 "s - 20" s = 21.7 "s}$$

Figures 1a and 1b to be read together are diagrams which show the distribution over time of these different phases, for only two consecutive lines Li and Li + 1.

These two lines (but also all 480 lines) simultaneously receive, from an instant t0, basic slots (not shown) which form an addressing phase PA1. In the addressing phase we find, from time t0 up to an instant t1, an erasure period CE intended for an erasure command by a semi-selective operation, followed from time t1, by a registration period CI intended for an enrollment command by a selective operation; the registration period CI ends at an instant t2 which also marks the end of the addressing phase PA1.

The addressing phase PA1 is followed by a maintenance phase PE1 which ends at an instant t3 when a second addressing phase PA2 begins. From time t0, the first addressing phase PA1 and the following maintenance phase PE define a first line cycle CL1 which ends at time t3 when a second line cycle TL2 begins, and thus up to a CLn cycle; all these line cycles CL1, CL2, CLn being constructed in the same way.

Assuming that the addressing of cells of line Li is carried out in the first cycle of line CL1 (during the first phase of addressing PA1), the addressing of line Li + 1 is carried out during the second phase of addressing PA2 of the second line cycle CL2. The addressing which follows for the line Li is then carried out 480 line cycles after the first cycle CL1, during the cycle CLn for example. In FIGS. 1a, 1b, the fact that the addressing was carried out during a given addressing period is symbolized by hatching in the slots which represent the addressing phases PA1, PA2, ... PAn.

As mentioned above, the duration of an addressing phase PA1, PA2, PAn being 20 "s, in the case of the example chosen, this addressing phase can be followed by a phase d 'maintenance PE1, PE2, PEn whose duration is equal to a maximum of 21.7 ”s.

It takes at least 5 "s to complete a cycle of maintenance signals, so that a maintenance phase can consist of 0 to 4 (maximum) maintenance cycles, to which is added a cycle of 'interview contained in the addressing phase PA1, PA2.

Under these conditions, the average maintenance frequency can be adjusted between appreciably 24 KHZ (that is 1 + 0 / 41.7 "s) and 120 KHZ (that is 1 + 4 / 41.7" s).

The dynamics of luminance adjustment which can thus be obtained by adjusting the frequency of the maintenance signals corresponds to a factor of 5, and it is therefore quite low. The dynamic is even more reduced for screens which have a greater number of lines indeed, when the total addressing time becomes equal to the frame time (which would be obtained with 1,000 lines in the example explained above) , any possibility of adjusting the luminance by this method is eliminated.

The method of the invention makes it possible to greatly increase the dynamic range for adjusting the luminance of memory screens, until it reaches and even exceeds the dynamic range of variation in ambient brightness in which these screens are intended to be used.

According to the invention, a method for controlling a screen formed by cells arranged along n lines, consisting in controlling the "registered" state or the "erased" state of the cells by addressing commands each comprising two successive operations , one of the two operations being a selective command and the other being a semi-selective command, and for at least one line, in separating the selective command from the semi-selective command by a time interval during which the cells to the "registered" state are activated is characterized in that it consists in adjusting the duration of the time interval, the minimum duration being less than the duration of the line cycle, the variation of the duration of the interval time incrementing the value of the duration of a line cycle.

Thus supposing that the screen is a plasma panel with 480 lines for example, in which a semi-selective erasing command is carried out, that is to say the erasing of all the cells of a given line, and therefore that the selective operation is for a registration order, we can order the inscription of certain cells of a given line and order their erasure after a time (during which they are activated) which is adjustable between once the duration of a line cycle and 480 times this time, that is to say the frame time. This corresponds to adjusting the luminance of the panel since the cells are only enabled for an adjustable part of the frame time.

It can also be seen that, unlike the prior art, the method of the invention makes it possible to increase the adjustment dynamics when the number of lines increases.

• les figures 1a et 1b déjà commentées illustrent l'art antérieur,
• la figure 2 représente de manière schématique un panneau à plasma auquel peut s'appliquer l'invention,
• les figures 3a à 3d illustrent l'application du procédé de l'invention du panneau à plasma montré à la figure 2.

The invention will be better understood with the aid of the description which follows, given by way of nonlimiting example with reference to the appended figures, among which:

• FIGS. 1a and 1b already commented on illustrate the prior art,
• FIG. 2 schematically represents a plasma panel to which the invention can be applied,
• FIGS. 3a to 3d illustrate the application of the method of the invention of the plasma panel shown in FIG. 2.

FIG. 2 schematically shows, by way of nonlimiting example, an alternative plasma panel 1 to which the method of the invention can be applied.

Panel 1 is of the coplanar maintenance type. It includes column electrodes X1 to X4 orthogonal to pairs P1 to P4 of maintenance electrodes. Each crossing of a column electrode with a pair of electrodes P1 to P4 defines a cell C1 to C16 which represents an elementary image point. In the nonlimiting example of the description, only 4 column electrodes X1 to X4 and only 4 pairs P1 to P4 of electrodes are shown which form 4 rows L1 to L4 of cells, but of course, within the framework of the invention, panel 1 may have many more or even fewer of these electrodes.

The column electrodes X1 to X4 have only an addressing function. They are each connected in a conventional manner to a column 2 addressing device.

The pairs P1 to P4 of electrodes each comprise a so-called addressing-maintenance electrode Y1 to Y4 and a so-called only maintenance electrode E1 to E4.

The addressing-maintenance electrodes Y1 to Y4 fulfill an addressing function, in cooperation with the column electrodes X1 to X4, and they fulfill a maintenance function in cooperation with the solely maintenance electrodes E1 to E4 which do not have to fulfill that latter function. The maintenance only electrodes E1 to E4 are connected to each other and to a pulse generator 3 from which they all simultaneously receive cyclic voltage slots in order to carry out maintenance cycles.

• des créneaux de tension cycliques en synchronisme avec ceux appliqués aux électrodes uniquement d'entretien E1 à E4, durant par exemple une phase d'entretien PE telle que précédemment mentionnée pour l'art antérieur,
• durant une phase d'adressage, des créneaux de base tels que précédemment mentionnés dans le préambule, sur lesquels peuvent être superposés uniquement pour les lignes adressées des créneaux d'adressage pour la commande de l'effacement et la commande de l'inscription des cellules. Ces créneaux étant délivrés en synchronisme avec des signaux appliqués aux électrodes colonnes X1 à X4.

The addressing-maintenance electrodes are individualized and they are connected to a line 5 addressing device from which they in particular receive the following types of voltage slot (not shown):

• cyclic voltage slots in synchronism with those applied to the maintenance only electrodes E1 to E4, for example during a maintenance phase PE as previously mentioned for the prior art,
• during an addressing phase, basic slots as previously mentioned in the preamble, on which can be superimposed only for the addressed lines, addressing slots for the control of the erasure and the control of the registration of the cells . These slots being delivered in synchronism with signals applied to the column electrodes X1 to X4.

The synchronization between the signals applied to the different electrodes is symbolized in FIG. 3 by the presence of a control and synchronization device 6 which is connected to the two addressing devices 2.5 and to the generator 3.

The panel 1 may optionally further comprise means for controlling the frequency of the maintenance cycles, as already mentioned for the prior art; this way constituting a device 9 for adjusting the luminance of the panel, it is connected to the control and synchronization device 6.

Figures 3a to 3d are diagrams which illustrate the operation of the panel 1 under the control of the method according to the invention. Figure 3a illustrates the operation of the first line L1; Figure 3b illustrates the operation of the second line L2; Figures 3c and 3d relate respectively to the third line and the fourth line L3, L4.

The voltage slots (not shown) applied to the electrodes determine from the instant t0, simultaneously for all the lines L1 to L4, a succession of n addressing phases PA1, PA2, ...., PAn separated by a maintenance phase PE1 to PE6 (n being equal to 6 in the nonlimiting example described). Each addressing phase plus a maintenance phase constitutes a line cycle CL1 to CL6. Each addressing phase PA1 to PA6 conventionally comprises a semi-selective operation period CE1 to CE6 for deletion, for example, followed by a selective operation period CI1 to CI6 for registration command.

According to a characteristic of the invention, the erasing and recording operations for the same line L1 to L4 are separated in time, that is to say that they are carried out in addressing phases PA1 to Different PA6 belonging to different line cycles.

For the first line L1, it is assumed that a semi-selective erase command has already taken place in a cycle which precedes t0, so that during the first addressing phase PA1 (which begins at time t0) only a selective registration operation is carried out. The first erasure period CE1 begins at time t0 and ends at time t1, and in the nonlimiting example described, no addressing is carried out during this period.

The instant t1 is the start of a first registration period CI1 during which a first AI registration command of the cells belonging to the first line L1 is actually carried out (a registration command actually carried out is shown in FIGS. 3a to 3d by the fact that the part of the slot which symbolizes the corresponding registration period has hatching).

The instant t2 is the start of a first maintenance phase PE1 which lasts until an instant t3 where a second addressing phase PA2 begins. The time elapsed between time t0 and time t3 corresponds to the duration of the first line cycle CL1, the second addressing phase PA2 begins with a second line cycle CL2.

Assuming that maintenance cycles are applied to the cells during the maintenance period PE1, the cells of the first line L1 produce light at each maintenance cycle and this as long as they are in the registered state. In the prior art, the erasure by semi-selective operation of the first line L1 occurs after a time which corresponds to the frame time, that is to say the time of a line cycle multiplied by the number le lines or in other words this semi-selective erasure occurs just before the registration operation and in the same addressing phase as the latter. In the nonlimiting example described where the plasma panel has 4 lines L1 to L4, if it were carried out as in the prior art, the erasure of the first line L1 should occur after 4 line cycles, c that is to say in a fifth PA5 addressing phase.

With the method of the invention, this erasure can occur earlier: for example it can be carried out in the addressing phase which follows that in which the registration was carried out or in a following addressing phase.

In the nonlimiting example described, the semi-selective erase command is carried out during the addressing phase which follows that in which the registration was carried out.

For example, for the first line L1, a semi-selective erasure command AE takes place during the second erasing period CE2 of the second addressing phase PA2, then thereafter during the sixth erasing period CE6 contained in the sixth PA6 addressing phase; an AI registration command having been previously carried out during the fifth CI5 registration period of the fifth addressing phase PA5 (an erasure command actually carried out is shown in FIG. 3 by the fact that the part of the slot which symbolizes the corresponding erasure period includes hatching done in the opposite direction to hatching which materialize a registration order).

For the second line L2, the selective registration AI takes place during the second registration period CI2, and the semi-selective erasure AE takes place during the third erasure period CE3; for the third line L3, the selective registration AI is carried out in a third registration period CI3, and the semi-selective erasure AE is carried out during the fourth erasure period CE4; for the fourth line L4, the selective registration AI takes place in the fourth registration period CI4 and the erasure AE takes place with the fifth erasure period CE5.

The fifth erasing period CE5 marks the start of a fifth line cycle CL5, and marks the start of a second frame time for the first line L1. The erasure of the first line L1 having been carried out during the second erasure period CE2, this operation does not have to be performed in this new frame time before carrying out the selective registration command, which is accomplished during the fifth CI5 registration period; the same operation as above is repeated in this new frame time for the other lines L2, L3, L4.

Thus the semi-selective operation has the function on the one hand to erase all the cells of a line to prepare their possible registration, and has the function on the other hand switching off the lit cells, that is to say registered cells, so as to adjust their luminance by adjusting the duration of a luminance phase PL1, PL2, PL3, PL4 in which they are in the registered state; this luminance phase corresponds to the time which separates the first registration period CI1 from the second erasure period CE2, the second registration period CI2 from the third erasure period CE3, etc.

The quantity of light emitted by each of the cells of L1 to L4 is thus proportional to the duration of the luminance phase PL.

In the nonlimiting example represented in FIGS. 3a to 3d, the duration of the luminance phase PL is the minimum duration, it corresponds to the time which separates two consecutive addressing phases PA1, PA2, but the luminance phase can have a longer duration which can reach a frame time. Indeed, considering for simplicity that a luminance phase PL corresponds to the duration of a line cycle CL1, CL2, ..., CL6, the luminance phase PL can have a duration equal to N x tCL where N is an integer less than the number n of lines and tCL is the time of a line cycle CL1, CL2, CL3.

This corresponds to choosing the number of line cycles (each line cycle being defined for example from an addressing phase to a following addressing phase) during which the cells of each line remain lit (i.e. say are activated) by indexing the semi-selective addressing of a line L1 to L4 given to the addressing phase of another line. Such an adjustment can be made in a very fine way, because N (while being an integer) can take several hundreds of values between 1 and the total number of lines n, which is commonly greater than 500. With 1000 lines per for example, the overall luminance can vary by a factor of 1000, or 3 decades.

Thus several different sequences can be programmed, and to obtain the desired luminance setting, simply choose the corresponding sequence using digital coding means for example, or others such as in particular switches, coding wheels, etc.; these means being made available to the user on a second adjustment device 15 (shown in FIG. 2), connected for example to the synchronization and control device 6.

This process can also be combined with the adjustment of the average maintenance frequency, so as to obtain an even greater dynamic.

It should be noted that the description has been made with reference to an addressing of the type comprising a semi-selective operation for erasing followed by a selective operation for writing, but of course the invention applies substantially to the same way if the semi-selective operation is used to perform the registration and if the selective operation is used to erase: this case could in particular lead to modifying the contrast.

In the nonlimiting example illustrated in FIGS. 3a to 3d, the luminance phases PL1 to PL4 have the same duration for the four lines L1 to L4, but it is clear that the method of the invention also applies to confer on the luminance phases of the different lines of different durations at one or more of them.

For example, it is possible to carry out the erasing and recording operations as in the prior art for all the lines except for a line (or a group of lines) for which these operations can be carried out according to the method of the invention, so that this line will appear with a lower luminance than the rest of the screen.

It is also possible to do the opposite and make this line (or this group of lines) brighter than the rest of the screen, by operating as it was said above for all the lines of the screen, except for the one that should appear brighter, and for this line the erasing and recording operations could be carried out by example during the same addressing phases, to give it maximum luminance.

The method of the invention applies to all screens which have an internal memory: this is the case of alternative plasma panels, with coplanar maintenance or not; but this is also the case for certain plasma panels of the continuous type as known in particular by IEEE Trans. El. Dev., Vol. 36, n ° 6, June 1989, pages 1063-1072. This is also the case for certain electroluminescent screens and also the case for liquid crystal screens.

With regard to liquid crystal displays, it is true that they are different from the above-mentioned screens in that they do not themselves produce light, but function in transmission and modulate the light of a source. of light in front of which they are placed.

However, the method can be applied to liquid crystal screens insofar as it makes it possible to adjust the duration of light transmission in order to adjust the luminance, particularly in the case of liquid crystal screens of an active matrix type, in which each cell incorporates a switching element often formed by a transistor called TFT (from the English expression "THIN-FILM TRANSISTOR"). The structure of an active matrix liquid crystal screen is shown and described in particular in the review IEEE SPECTRUM September 1989, from page 36 to page 40.

In such a liquid crystal screen, the TFT is in the "conductive" or "non-conductive" state depending on the command applied to it. When it is conductive, it lets a signal pass to the liquid crystal cell which behaves like a capacitor: the capacitor being charged, the signal can disappear without there being a substantial modification of the cell, (i.e. say the installed electric field), if the TFT has previously returned to the "non-conductive"state; the cell in this case has a memory effect.

• A/ si la cellule à cristal liquide est "opaque" au repos (absence de champ électrique appliqué), l'effacement doit de faire de manière semi-sélective (effacement de toutes les cellules d'une ligne donnée), et c'est l'inscription qui doit être opérée de manière sélective ;
• B/ si, par contre, la cellule à cristal liquide est "passante" au repos, c'est l'inscription qui doit être semi-sélective et l'effacement doit être sélectif ; l'état "opaque" correspondant à l'état "effacé" précédemment mentionné, et l'état "passant" correspondant à l'état "inscrit".

Given the type of liquid crystal and the type of polarizer used:

• A / if the liquid crystal cell is "opaque" at rest (no electric field applied), the erasure must be done semi-selectively (erasure of all the cells of a given line), and this is registration which must be carried out selectively;
• B / if, on the other hand, the liquid crystal cell is "on" at rest, it is the inscription which must be semi-selective and the deletion must be selective; the "opaque" state corresponding to the "erased" state previously mentioned, and the "passing" state corresponding to the "registered" state.

In the case A / for example, mentioned above, the erasure may consist in replacing the cell in the "opaque" state by controlling the conduction of the TFT transistor.

Claims (8)

1. Verfahren zum Steuern eines aus Zellen (C1 bis C16) gebildeten Bildschirms, die längs n Zeilen (L1 bis L4) angeordnet sind, wobei ein von dem Bildschirm angezeigtes Bild Zeile für Zeile nach einer Teilbildzeit erneuert wird, die dem Produkt aus der Anzahl n von Zeilen (L1 bis L4) und der Dauer eines Zeilenzyklus (CL) entspricht, wobei das Verfahren darin besteht, das Einschreiben oder Löschen der Zellen durch Adressierungsbefehle zu steuern, die jeweils zwei aufeinanderfolgende Operationen (CE1 bis CEn und CI1 bis Cin) aufweisen, wobei eine der beiden Operationen eine halbselektive Steuerung (CI1 bis CIn) ist, die darin besteht, gleichzeitig das Einschreiben oder Löschen aller Zellen einer Zeile zu steuern, und die andere eine selektive Steuerung (CE1 bis CEn) ist, die darin besteht, das Löschen bzw. Einschreiben einer oder mehrerer Zellen dieser Zeile zu steuern und für wenigstens eine Zeile (L1 bis L4) die selektive Steuerung (CE1 bis CEn) von der halbselektiven Steuerung (CI1 bis CIn) durch ein Zeitintervall (PL1 bis PL4) zu trennen, während dessen die eingeschriebenen Zellen aktiviert sind, dadurch gekennzeichnet, daß es darin besteht, die Dauer des Zeitintervalls (PL1 bis PL4) einzustellen, wobei die Minimaldauer unter der Dauer des Zeilenzyklus (CL) liegt, und wobei die Änderung der Dauer des Zeitintervalls (PL1 bis PL4) den Wert der Dauer eines Zeilenzyklus (CL) als Inkrement aufweist.
2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß es zwischen wenigstens zwei Zeilen (L1 bis L4) des Bildschirms darin besteht, dem Zeitintervall (PL1 bis PL4), das die halbselektive Steuerung von der selektiven Steuerung trennt, unterschiedliche Zeitdauern zu verleihen.
3. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß es darin besteht, für die Steuerung aller Zeilen (L1 bis L4) die halbselektive Steuerung von der selektiven Steuerung zu trennen.
4. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß die halbselektive Steuerung "das Einschreiben" und die selektive Steuerung "das Löschen" realisiert.
5. Verfahren nach einem der Ansprüche 1 bis 3, dadurch gekennzeichnet, daß die halbselektive Steuerung "das Löschen" und die selektive Steuerung "das Einschreiben" realisiert.
6. Verfahren nach einem der vorhergehenden Ansprüche, dadurch gekennzeichnet, daß der Bildschirm eine Plasmatafel ist.
7. Verfahren nach Anspruch 6, dadurch gekennzeichnet, daß der Bildschirm eine Wechselspannungs-Plasmatafel ist, und daß zwischen einer selektiven Steuerung und einer halbselektiven Steuerung wenigstens ein Auffrischungs-Rechteckimpulszyklus an alle Zellen angelegt wird.
8. Verfahren nach einem der Ansprüche 1 bis 5, dadurch gekennzeichnet, daß der Bildschirm ein Flüssigkeitskristallbildschirm vom Typ mit aktiver Matrix ist.

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