EP0427147A3 - Graphics system - Google Patents

Graphics system Download PDF

Info

Publication number
EP0427147A3
EP0427147A3 EP19900121060 EP90121060A EP0427147A3 EP 0427147 A3 EP0427147 A3 EP 0427147A3 EP 19900121060 EP19900121060 EP 19900121060 EP 90121060 A EP90121060 A EP 90121060A EP 0427147 A3 EP0427147 A3 EP 0427147A3
Authority
EP
European Patent Office
Prior art keywords
graphics system
graphics
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP19900121060
Other versions
EP0427147A2 (en
EP0427147B1 (en
Inventor
William R. Hancock
Brent H. Larson
Michael J. Johnson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell Inc
Original Assignee
Honeywell Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Inc filed Critical Honeywell Inc
Publication of EP0427147A2 publication Critical patent/EP0427147A2/en
Publication of EP0427147A3 publication Critical patent/EP0427147A3/en
Application granted granted Critical
Publication of EP0427147B1 publication Critical patent/EP0427147B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/22Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of characters or indicia using display control signals derived from coded signals representing the characters or indicia, e.g. with a character-code memory
    • G09G5/24Generation of individual character patterns
    • G09G5/28Generation of individual character patterns for enhancement of character form, e.g. smoothing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/399Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
EP90121060A 1989-11-06 1990-11-02 Graphics system Expired - Lifetime EP0427147B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43210589A 1989-11-06 1989-11-06
US432105 1989-11-06

Publications (3)

Publication Number Publication Date
EP0427147A2 EP0427147A2 (en) 1991-05-15
EP0427147A3 true EP0427147A3 (en) 1992-03-25
EP0427147B1 EP0427147B1 (en) 1995-01-25

Family

ID=23714799

Family Applications (1)

Application Number Title Priority Date Filing Date
EP90121060A Expired - Lifetime EP0427147B1 (en) 1989-11-06 1990-11-02 Graphics system

Country Status (8)

Country Link
EP (1) EP0427147B1 (en)
JP (1) JP3089356B2 (en)
KR (1) KR910010374A (en)
CA (1) CA2024745C (en)
DE (1) DE69016354T2 (en)
DK (1) DK0427147T3 (en)
FI (1) FI99215C (en)
NO (1) NO303199B1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2678462B1 (en) * 1991-06-25 1993-12-24 Sextant Avionique REAL-TIME DEVICE FOR PRESENTING TELEVISION IMAGES ON A VISUALIZATION SCREEN.
US5264838A (en) * 1991-08-29 1993-11-23 Honeywell Inc. Apparatus for generating an anti-aliased display image halo
FR2793588B1 (en) * 1999-05-11 2002-03-15 Sextant Avionique DATA PROCESSING SYSTEM FOR DISPLAY ON A MATRIX SCREEN
FR3119262B1 (en) * 2021-01-25 2023-06-30 Thales Sa A system and method for processing jumper mode plot display data provided by a symbol generator box.

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939671A (en) * 1987-09-08 1990-07-03 Auto-Trol Technology Corporation Method and system for line drawing with next matrix feature

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4843380A (en) * 1987-07-13 1989-06-27 Megatek Corporation Anti-aliasing raster scan display system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939671A (en) * 1987-09-08 1990-07-03 Auto-Trol Technology Corporation Method and system for line drawing with next matrix feature

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
* the whole document * *
PROCEEDINGS OF THE SOCIETY FOR INFORMATION DISPLAY vol. 28, no. 4, 1987, NEW YORK, USA pages 425 - 429; DAVID OAKLEY AND DONALD PARSONS: 'DEJAGGING RASTER GRAPHICS DISPLAYS BY FLASH FILTERING' *

Also Published As

Publication number Publication date
JP3089356B2 (en) 2000-09-18
EP0427147A2 (en) 1991-05-15
KR910010374A (en) 1991-06-29
NO904299D0 (en) 1990-10-03
NO904299L (en) 1991-05-07
EP0427147B1 (en) 1995-01-25
FI905463A0 (en) 1990-11-05
FI99215C (en) 1997-10-27
FI99215B (en) 1997-07-15
NO303199B1 (en) 1998-06-08
DK0427147T3 (en) 1995-06-26
CA2024745C (en) 2002-08-06
DE69016354T2 (en) 1995-06-22
DE69016354D1 (en) 1995-03-09
CA2024745A1 (en) 1991-05-07
JPH03220597A (en) 1991-09-27

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