EP0384229B1 - Liquid crystal display unit - Google Patents

Liquid crystal display unit Download PDF

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Publication number
EP0384229B1
EP0384229B1 EP90102490A EP90102490A EP0384229B1 EP 0384229 B1 EP0384229 B1 EP 0384229B1 EP 90102490 A EP90102490 A EP 90102490A EP 90102490 A EP90102490 A EP 90102490A EP 0384229 B1 EP0384229 B1 EP 0384229B1
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EP
European Patent Office
Prior art keywords
voltage
signal
scanning
selective
voltages
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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EP90102490A
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German (de)
French (fr)
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EP0384229A1 (en
Inventor
Katsunori C/O Seiko Epson Corporation Yamazaki
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Seiko Epson Corp
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Seiko Epson Corp
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3622Control of matrices with row and column drivers using a passive matrix
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3674Details of drivers for scan electrodes
    • G09G3/3681Details of drivers for scan electrodes suitable for passive matrices only
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0209Crosstalk reduction, i.e. to reduce direct or indirect influences of signals directed to a certain pixel of the displayed image on other pixels of said image, inclusive of influences affecting pixels in different frames or fields or sub-images which constitute a same image, e.g. left and right images of a stereoscopic display
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/04Maintaining the quality of display appearance
    • G09G2320/041Temperature compensation
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general

Definitions

  • the present invention relates to a method of driving a liquid crystal display unit.
  • a well-known prior art method of driving a liquid crystal display unit is the voltage averaging method.
  • FIG. 17 there are shown a configuration of a liquid crystal panel and a display dot matrix thereon.
  • Designated at 1 is a liquid crystal panel consisting of a liquid crystal layer and a pair of substrates 2 and 3 for sandwiching the layer therebetween.
  • One substrate 2 is provided with scanning electrodes Y1 to Y6 disposed in a lateral direction, while the other substrate 3 is provided with signal electrodes X1 to X6.
  • Display dots are formed at intersections of the scanning electrodes Y1 to Y6 and the signal electrodes X1 to X6.
  • the display dots marked with oblique lines (hatching) in FIG. 17 represent lighting points, whereas other display dots indicate non-lighting points.
  • the display dots lightened will hereinafter be referred to as lighting dots, while other display dots which are not yet lit up will be referred to as non-lighting dots.
  • the illustrated liquid crystal panel is based on a (6 x 6) dot matrix for simplicity of explanation, but generally, as a matter of fact, substantially more dots are provided.
  • One frame comprises the period during which the selective or non-selective voltages are applied sequentially to the scanning electrodes Y1 to Y6.
  • the signal electrodes X1 to X6 undergo application of lighting or non-lighting voltages (the scanning electrodes to which the selective voltages are applied will be called selected scanning electrodes.) More specifically, in the case of lightening the display dot located at the intersection of a certain scanning electrode and a certain signal electrode, the lighting voltage is, when that scanning electrode is selected, applied to the signal electrode. Whereas in a non-lighting state, the non-lighting voltage is applied thereto. Referring to FIGS. 18 and 19, there is illustrated one example of actual driving waveforms (of the voltages applied).
  • FIG. 18(a) shows a waveform of a signal voltage applied to the signal electrode X2 depicted in FIG. 17.
  • FIG. 18(b) illustrates a waveform of a scanning voltage applied to the scanning electrode Y4.
  • FIG. 18(c) depicts a waveform of a voltage applied to the display dot (a lighting state) at the intersection of the signal electrode X2 and the scanning electrode Y4.
  • FIG. 19(a) shows a waveform of a signal voltage applied to the signal electrode X2.
  • FIG. 19(b) illustrates a waveform of a scanning voltage applied to the scanning electrode Y3.
  • FIG. 19(c) depicts a waveform of a voltage applied to the display dot (a non-lighting state) at the intersection of the signal electrode X2 and the scanning electrode Y2.
  • F1 and F2 represent frame periods.
  • the polarity of the difference in voltage between the scanning voltage waveform and the signal voltage waveform is varied depending on the frame periods F1 and F2, thereby effecting an AC driving process. Note that the time when the polarity is inverted is referred to as a polarity inverting time.
  • each display dot has an electric capacity determined by the area thereof, the thickness of the liquid crystal layer and the dielectric constant of the liquid crystal material.
  • both of the scanning electrode and the signal electrode are made of transparent conductive films each having a sheet resistance of, typically, several tens of ohms. This, as a matter of course, causes each of these electrodes to have a constant electric resistance.
  • JP-A-62-31825, JP-A-60-19195 and JP-A-60-19196 are methods (hereinafter referred to as a line inversion driving method) of inverting the polarity of the voltage applied to a liquid crystal panel a plurality of times during one frame.
  • the scanning electrodes Y1 to Y6 are assumed to be driven such that selection returns to the first scanning electrode Y1 after the first scanning electrode Y1 to the sixth scanning electrode Y6 have been selected in sequence.
  • the polarity inversion based on the line inversion driving method is carried out between the scanning electrodes Y3 and Y4. (This does not restrict the number of polarity inversion processes and the position in which the polarity inversion is performed, and the polarity inversions may be effected, if necessary, an arbitrary number of times in arbitrary positions.)
  • the liquid crystal panel 1 adopts a so-called positive display wherein the density increases as an effective voltage applied to the display dot rises.
  • V be an absolute value of a difference between the non-selective voltage and the lighting/non-lighting voltage
  • n ⁇ V be an absolute value of a difference between the selective voltage and the lighting voltage, where n is a constant typically having a value of 3 though 50.
  • FIGS. 20(a) to 20(c) individually show a waveform of a signal voltage applied to the signal electrode X2 of FIG. 17, a waveform of a scanning voltage applied to the scanning electrode Y2 thereof and a difference between these two waveforms.
  • FIGS. 21(a) to 21(c) respectively illustrate a waveform of a signal voltage applied to the signal electrode X2 of FIG. 17, a waveform of a scanning voltage applied to the scanning electrode Y3 thereof and a difference between these two waveforms.
  • FIG. 22 there is illustrated, by a solid line, a waveform of a voltage applied to the display dot (hereinafter designated as D23) which is formed by a combination of the signal electrode X2 and the scanning electrode Y3 of FIG. 17, i.e. the voltage waveform applied to scanning electrode Y3 relative to signal electrode X2.
  • D23 a waveform of a voltage applied to the display dot
  • the voltage waveform indicated by a broken line represents a voltage applied to the scanning electrode Y2 relative to the signal electrode X2.
  • the display dots D22 and D23 are contiguous to each other. Capacitors, which are created by the display dots D22 and D23 are electrically connected via a low-valued resistance of the short length of signal electrode X2 (generally 1mm or less).
  • an electric charge of ⁇ Q flows from the scanning electrodes Y2 and Y3 or an end of the signal electrode X2, i.e., from outside into a portion to which the voltage is to be applied.
  • Resistances of the scanning electrode and of the signal electrode at that time though they depend on positions of the display dots, exhibit considerably large values, with the result that a flow of electric charge is hindered.
  • the electric charge is not immediately discharged even though the voltage on the signal electrode X2 is forced to drop down when the voltage on the scanning electrode Y2 falls from a level of selective voltage down to a non-selective voltage. It therefore follows that an effective voltage between the signal electrode X2 and the scanning electrode Y3 increases.
  • K N ON + N OFF
  • M ON be the number of lighting dots on the scanning electrode selected next, and let M OFF be the number of the non-lighting dots.
  • C ON be the capacity of a capacitor formed by a lighting dot
  • C OFF be the capacity of a capacitor formed by a non-lighting dot. Then, a relationship therebetween is expressed such as: C ON > C OFF
  • the subsequent scanning electrode is selected.
  • V C OFF (N ON + M ON ) n V C ON + (N OFF + M OFF ) (n - 2)
  • V C OFF (N ON + M ON ) ⁇ n (C ON - C OFF ) + 2C OFF ⁇ V + 2K (n - 2)
  • V C OFF N ON + M ON ) ⁇ n (C ON - C OFF ) + 2C OFF ⁇ V + 2K (n - 2)
  • V C OFF N ON + M ON ) ⁇ n (C ON - C OFF ) + 2C OFF
  • the difference I becomes positive when the number of lighting dots on the scanning electrode selected is greater than that of lighting dots on a subsequently selected scanning electrode during a selection shift at the time of effecting no polarity inversion, and an effective voltage applied to the display dots on the subsequently selected scanning electrode augments resulting in a a higher density.
  • the difference I becomes negative, and the effective voltage applied to the display dots on the scanning electrode after the selection shift has been carried out decreases with the result of a lower density.
  • the fluctuations thereof correspond to an absolute value of the numerical value I.
  • the effective voltage applied to the display dots on the subsequently selected scanning electrode invariably diminishes by a constant value and at the same moment decreases by a value corresponding to a sum F of lighting dots on the scanning electrodes before and after performing the selection shift.
  • the unevenness in contrast which corresponds to the sum F of the lighting dots before and after performing the shift, is caused, and at the same moment regular contrast unevenness is present.
  • one of causes of the contrast unevenness produced during the selection shift with simultaneous polarity inversion may be a subtle difference in the step of changing the polarity between the signal voltage waveform and the scanning voltage waveform which are outputted by the actual driving circuit. This is defined as a first cause.
  • FIG. 23 illustrates the liquid crystal panel 1 identical with that of FIG. 17 but different in display contents.
  • FIGS. 24 and 25 illustrate voltage waveforms in positions of display dots D33 and D43 when performing the display depicted in FIG. 23.
  • FIG. 24(a) depicts a signal voltage waveform in the dot D33 position.
  • FIG. 24(a) depicts a signal voltage waveform in the dot D33 position.
  • FIG. 24(b) shows a scanning voltage waveform in the dot D33 position
  • FIG. 24(c) the waveform of a voltage applied to the dot D33.
  • FIG. 25(a) illustrates a scanning voltage waveform in a position of the dot D43.
  • FIG. 25(b) depicts a scanning voltage waveform in the dot D43 position.
  • FIG. 25(c) shows the waveform of a voltage applied to the dot D43.
  • apropos of a signal electrode undergoing an application of a lighting voltage the lighting voltage is dragged in on the side of the selective voltage just after inverting the polarity, and eventually the effective voltage applied to the dot D33 decreases to a degree equivalent to dragging as shown in FIG.
  • the unevenness in contrast is, irrespective of a display pattern, caused to a constant degree when inverting a polarity.
  • unevenness corresponding to a sum F of the number of lighting dots on a scanning electrode selected just before inverting the polarity and of the number of lighting dots on a scanning electrode selected immediately after inverting the polarity is added.
  • a waveform applied to the display dots is, when the scanning electrode selected during an operation other than the polarity inversion shifts to the next electrode, distorted in accordance with a difference I between the number of lighting dots on the selected scanning electrode and the number of lighting dots on a subsequently selected electrode.
  • waveform corrections corresponding to the sum F and the difference I may be performed after calculating them during an operation of the liquid crystal display unit.
  • FIG. 1 there is illustrated one specific embodiment of the liquid crystal display unit for effecting these corrections.
  • the numeral 101 represents a liquid crystal unit constructed of a liquid crystal panel and a driving circuit.
  • Designated at 102 is a series of control signals, for controlling the operation of the liquid crystal display unit, including a latch signal LP, a frame signal FR, a data-in signal DIN, an X-driver shift clock signal XSCL and others.
  • the numeral 103 denotes a data signal; 104 a waveform correcting signal generating circuit (hereinafter simply referred to as a correction circuit); and 105 a power supply circuit.
  • the correction circuit 104 calculates a numeric value F or I and transmits to the power supply circuit 105 both a code signal 108, as a correction signal, indicating a positive or negative sign of the numeric value F or I and a magnitude signal 109, also as a correction signal, indicating the absolute value of F or I.
  • the magnitude signal 109 is kept in an active state for a period corresponding to the absolute value of the numeric value F or I.
  • the power supply circuit 105 behaves to create a scanning electrode driving power supply (hereinafter referred to as a Y-power-supply) 106 and a signal electrode driving power supply (hereinafter referred to as an X-power-supply) 107 catering for the liquid crystal unit 101 in accordance with the code signal 108 and the magnitude signal 109.
  • the power supply circuit 105 acts to correct a voltage of the Y-power-supply 106.
  • the correction circuit 104 takes in the data signal 103 when a certain scanning electrode is selected and then counts a number M ON of lighting dots on a subsequently selected scanning electrode. Then, the correction circuit 104 counts numeric values F and I, i.e., a sum of the lighting dot number M ON and a number N ON of lighting dots on scanning electrode which is now being selected, and also a difference therebetween.
  • numeric values F and I i.e., a sum of the lighting dot number M ON and a number N ON of lighting dots on scanning electrode which is now being selected, and also a difference therebetween.
  • a resultant code and absolute value are outputted in the form of a code signal 108 and a magnitude signal 109. In the case of inverting the polarity, the numeric value F replaced with the numeric value I is likewise outputted.
  • a lighting dot number M ON is taken in for storage in connection with the number N ON of the lighting dots on the scanning electrode selected.
  • the power supply circuit 105 makes a correction necessary for a voltage of the Y-power-supply 106 on the basis of the code signal 108 and the magnitude signal 109.
  • a constant voltage is applied in such a direction as to cancel a distortion created in the driving waveform applied to the liquid crystal panel for a period corresponding to a magnitude of the distortion.
  • a direction (polarity) of the constant voltage is determined by the code signal 108, while the applying period depends on the magnitude signal 109.
  • FIGS. 2 through 5 depict in detail the components of FIG. 1.
  • FIG. 2 there is shown one example of a specific construction of the liquid crystal unit 101.
  • a liquid crystal panel generally indicated at 201 is arranged in such a way that a liquid crystal layer is interposed between a pair of substrates 202 and 203, and there are formed scanning electrodes Y1 to Y6 arrayed sideways on one substrate 202 and also signal electrodes X1 to X6 vertically arrayed on the other substrate 203. Display dots are formed at intersections made by the scanning electrodes Y1 to Y6 and the signal electrodes X1 to X6. Note that the liquid crystal panel is based on a (6 x 6) dot matrix for simplicity of explanation, but the dot matrix is not limited to this instance.
  • Designated at 205 is a scanning electrode driving circuit composed of a shift register circuit 206 and a level shifter circuit 207. Outputs of the level shifter circuit 207 are led to the scanning electrodes Y1 through Y6 on the liquid crystal panel 201.
  • a signal electrode driving circuit 208 consists of a shift register circuit 109, a latch circuit 210 and a level shifter circuit 211. Outputs of the level shifter circuit 211 are led to the signal electrodes X1 through X6 on the liquid crystal panel 201.
  • FIG. 3 is a timing chart showing the data signal 103 and the signals DIN, LP, FR and XSCL which are combined to constitute the above-mentioned control signal 102.
  • the signals DIN and LP function as data and shift clocks respectively with respect to the shift register circuit 206 of the scanning electrode driving circuit 205.
  • the signal DIN is taken in the shift register circuit 206 and then transferred.
  • the signal DIN which is active when assuming "H” level, is outputted once at an interval defined typically by the number of signals LP which is equal to or greater than the number of scanning electrodes Y1 to Y6 on the liquid crystal panel 201. Therefore, the data of "H” pass through an interior of the shift register circuit 106, and in other cases the signal DIN assumes "L".
  • the selective voltages are supplied to the scanning electrodes Y1 through Y6 via the level shifter circuit 207 in accordance with a content of the shift register circuit 206.
  • the non-selective voltages are fed to the scanning electrodes Y1 through Y6.
  • the selective voltages and the non-selective voltages are supplied from the Y-power-supply 106.
  • the data signal 103 and the signals XSCL and LP function as data and shift clocks of the signal electrode driving circuit 208 and the shift register circuit 209 and also as a latch clock of the latch circuit 210.
  • the data signal 103 is active when assuming an "H" level to exhibit a lighting state.
  • the data signal 103 acts as a signal for determining a state, lighting or non-lighting, of a display dot 104 on the next scanning electrode while a certain scanning electrode on the liquid crystal panel 201 is being selected.
  • the data signal 103 is taken in the shift register circuit 209 at a trailing edge of the signal XSCL so that the data signal 103 services as a signal corresponding to the display dot on the subsequently selected scanning electrode.
  • a content of the shift register circuit 209 is in turn taken in the latch circuit 210 at a trailing edge of the signal LP.
  • the lighting voltages are fed to the signal electrodes X1 through X6 when being active via the shift register circuit 211.
  • the non-lighting voltages are supplied to the signal electrodes X1 through X6.
  • the lighting and non-lighting voltages are supplied from the X-power-supply 107.
  • the signal FR (frame signal) is applied to the driving circuits 205 and 208 to AC-drive the liquid crystal panel 201.
  • the signal FR is changed over in synchronization with the trailing edge of the signal LP, thereby changing over the selection of potentials of the driving voltages.
  • the driving voltages include two groups of voltages - i.e., one group is selective and non-selective voltages, and the other is lighting and non-lighting voltages.
  • the driving voltages are changed over by the frame signals FR.
  • FIG. 4 is a block diagram showing one example of a specific circuitry of the correction circuit 104 depicted in FIG. 1.
  • the numeral 401 stands for a counter circuit; 402 a first count holding circuit; 403 a second count holding circuit; 404 a value arithmetic circuit; and 405 a pulse width control circuit.
  • the counter circuit 401 serves to count the number of lighting dots among the display dots on the (n + 1)th scanning electrode during a selection process of the n-th scanning electrode on the liquid crystal panel 201 of FIG. 2.
  • the counter circuit 401 counts the number of lighting dots on the (n + 1)th scanning electrode by effecting addition only when the data signal 103 bears an active state at a trailing edge of the signal XSCL during a period ranging from the transition of the signal LP among the control signals 102 to the next trailing edge thereof.
  • a count value is outputted to the first count holding circuit 402, and at the same time a count value of the counter circuit 401 is reset to 0.
  • counting is necessarily performed as the case may be. There will be no problem if an error of counting is set to ⁇ 16 dots on the condition that the number of signal electrodes X1 to X6 is. e.g., approximately 640.
  • the first count holding circuit 402 behaves to sequentially take in a count value just before the count value of the counter circuit 401 comes to 0.
  • the second count holding circuit 403 acts to sequentially take in a count value from the first count holding circuit 402 just before the first count holding circuit 402 takes in the next count value from the counter circuit 401.
  • the first count holding circuit 402 takes in the lighting dot number M ON of the display dots on the (n + 1)th scanning electrode
  • the second count holding circuit 403 is taking in the lighting dot number N ON of the display dots on the n-th scanning electrode.
  • the numeric values M ON and N ON are respectively outputted to the value arithmetic circuit 404.
  • the pulse width control circuit 405 Synchronized with the trailing edge of the signal LP among the control signals 102, the pulse width control circuit 405 outputs an active signal or magnitude signal 108 for a time corresponding to the absolute value of F or I inputted from the value arithmetic circuit 404.
  • a relationship between the value F, the value I and a width W of the magnitude signal 109 may be obtained, e.g., by an experimental method.
  • correction circuit 104 The operation and function of the correction circuit 104 have been described above. Specific circuitry of the respective components 401 to 405 can properly be actualized with facility in the manner discussed above, and hence the description thereof is omitted herein.
  • FIG. 5 there is shown one example of a tangible circuitry of the voltage power supply circuit 105 depicted in FIG. 1a.
  • the numerals 501 to 509 represent resistors sequentially connected in series, both ends of which are supplied with a voltage V0U and a voltage V5L.
  • V0U Voltages generated at respective ends of the resistors 501 through 509 are indicated by V0U, V0N, V0L, V1, V2, V3, V4, V5U, V5N and V5L, respectively.
  • Resistance values of individual resistors 2601 to 2607 are set to establish these relationships.
  • each voltage stabilizing circuit 510 is composed of a voltage follower circuit based on an operational amplifier circuit.
  • Switches 511 and 512 are changed over in response to the code signal 108 and the magnitude signal 109 of FIG. 1.
  • the switches 511 and 512 of FIG. 5 are changed over to the voltages V0U and V5L while the magnitude signal remains active.
  • the switches When outputting the magnitude signal 109 and the code signal 108 associated with a positive value I, the switches are changed over to the voltages V0L and V5U while the magnitude signal 109 is kept active.
  • the voltages V0N and V2 are defined as one group of lighting and non-lighting voltages, while the voltages V5N and V3 are the other group of lighting and non-lighting voltages, these voltages being combined en bloc to constitute the X-power-supply 107.
  • the voltages V5 and V1 define one group of selective and non-selective voltages, while the voltages V0 and V4 are the other group of selective and non-selective voltages, these voltages being combined en bloc to constitute the Y-power-supply 106.
  • the X-power-supply 107 and the Y-power-supply 106 supply voltages to the liquid crystal unit 101 depicted in FIG. 1.
  • FIG. 6 there is illustrated a liquid crystal panel 201 (shown in FIG. 2), in which the display dots drawn with oblique lines are in the lighting state.
  • FIGS. 7(a) through 7(c) depict driving voltage waveforms in this embodiment of the invention when effecting the display shown therein.
  • the polarity is inverted between the scanning electrodes Y3 and Y4. (The number of polarity inversions and the positions thereof are not limited but may arbitrarily be selected.)
  • FIG. 7(a) shows a waveform of signal voltage applied to the signal electrode X2.
  • FIG. 7(b) illustrates a waveform of scanning voltage applied to the scanning electrode Y4.
  • the polarity inversion is effected at the scanning electrode Y4, and hence the selective voltage becomes V0U or V5L for only a period (indicated by W in the Figure) obtained by adding a time corresponding to the value F to a certain span of time.
  • FIG. 7(c) illustrates a waveform (indicated by a solid line) of voltage actually applied to a display dot (hereinafter designated at D24) made by the signal electrode X2 and the scanning electrode Y4.
  • a waveform depicted with a broken line may be conceived as a rounding generated corresponding to a sum of a certain value and the value F created when inverting the polarity.
  • the correction circuit 104 of FIG. 1 when inverting the polarity, outputs a magnitude signal 109 which remains active during a period obtained by adding a certain span of time to a time equivalent to the value F.
  • a code signal 108 bears a negative state.
  • the power supply circuit 105 outputs V0U and V5L as selective voltages (voltages V0 and V5) combined to constitute a Y-power-supply 107, and further outputs V0N and V5N when the magnitude signal 109 becomes inactive.
  • the magnitude signal 109 continues to be active during a period corresponding to the value I.
  • voltages V0N and V5N are outputted as the voltages V0 and V5.
  • the correction by use of the value F at the time of inverting the polarity is omitted, and instead the correction is performed invariably for a given time. Even in such a case, almost the same effects can be obtained, and the circuitry can remarkably be simplified.
  • the correction is carried out by changing the selective voltages.
  • other non-selective voltages, lighting voltages and non-lighting voltages may be varied.
  • the correction is effected while changing the regular voltages for only a period corresponding to the values I and F.
  • the voltages corresponding to the values I and F may be applied for a given time; or alternatively the voltages may be applied during a period corresponding to the values I and F.
  • the waveforms of voltages applied to perform the correction may assume not only a rectangular configuration but also triangular and trapezoidal shapes, and further other configurations expressed by exponential functions.
  • the unevenness in display which is attributed to the second cause, is produced by the fact that a voltage on a signal electrode, which intersects a scanning electrode (hereinafter referred to as a scanning electrode YS) on which to effect a change from a selective voltage to a non-selective voltage when inverting the polarity, is dragged towards the selective voltage after the polarity inversion has been executed.
  • a scanning electrode YS scanning electrode
  • the non-selective voltage on the scanning electrode YS is varied towards the selective voltage by an amount with which the voltage on the signal electrode is dragged towards the selective voltage while superposing a voltage corresponding to the sum F calculated on the non-selective voltage applied to the scanning electrode YS, whereby an effective voltage of the display dots on the scanning electrode YS is equalized to that of the display dots on the scanning electrodes other than the electrode YS.
  • the correcting method described above is capable of obviating the unevenness on the display due to the second cause.
  • FIG. 8 there is specifically shown one embodiment of the liquid crystal display unit for performing the aforementioned correction.
  • a liquid crystal unit generally indicated at 801 is constructed of a liquid crystal panel and a driving circuit.
  • the numerals 102 and 103 represent a control signal and a data signal which are much the same as those shown in FIG. 1.
  • a waveform correcting signal generating circuit (hereinafter simply referred to as a correction circuit 804) is intended to calculate a sum of lighting dots on the scanning electrodes selected before and after shifting the selection and create a magnitude signal 809 which remains active for a time corresponding to a result of the calculation.
  • the correction non-selective voltage varies in accordance with the magnitude signal 809.
  • Denoted at 810 is a polarity inversion detecting circuit composed of a flip-flop circuit and an exclusive OR circuit.
  • the circuit 810 outputs a signal (hereinafter referred to as a signal DET) assuming the "H" level till a signal LP rises next when a signal FR synchronizes with the signal LP and varies. That is, the circuit 810 functions to detect the fact that the signal FR varies.
  • FIG. 9 shows one example of a concrete construction of a liquid crystal unit 801.
  • the numeral 201 denotes a liquid crystal panel a configuration and operation of which are the same as those of the liquid crystal panel 201.
  • Designated at 208 is a signal electrode driving circuit whose operation and circuitry are the same as those of the signal electrode driving circuit 208. Therefore the components thereof are marked with the like numerals and the descriptions thereof are omitted herein.
  • a scanning electrode driving circuit 905 is constructed of at least a shift register 906 having a greater number of bits than the number of scanning electrodes Y1 to Y6, a multiplexer circuit 907 and switch circuits 908 and 909.
  • a circuitry of the scanning electrode driving circuit 905 will fully be described with reference to FIG. 10.
  • Indicated at 906 is a 7-bit shift register for shifting the "H" level sequentially from BIT0 to BIT1 and further to BIT2 therefrom at each trailing edge of the signal LP after taking in a signal DIN at the transition of the signal LP.
  • the multiplexer circuit 907 also outputs a signal for turning ON a switch Sn1 when an output of BITn is at the "L” level and a signal DET assumes the “L” level, and when an output of BITn is at “L”, the signal DET assumes the "H” level and an output of BIT (n + 1) is at “L”. Furthermore, the circuit 907 outputs a signal for turning ON a switch Sn2 when the output of BITn is at the "L” level, the output of BIT (n + 1) is at "H” and the signal DET assumes the "H” level.
  • switch circuit 909 is constructed of switches S60, S61 and S62. The switch circuit 909 changes over one group of voltages from two groups of selective, non-selective and correction non-selective voltages of the Y-power-supply 806 with the aid of the signal FR.
  • one group of voltages is selected from two groups of selective, non-selective and correction non-selective voltages by use of the signal FR.
  • the switch Sn1 is turned ON, and the selective voltages are outputted when an output of BITn is at the "L” level and the signal DET assumes the "L” level, viz., in the case of the non-selective state and effecting no polarity inversion, and when the output of BITn is at the "L", the signal DET assumes the "H” level and an output of BIT(n + 1) is at the "L", i.e., in the case of the non-selective state, effecting the polarity inversion and no selective state being present just before inverting the polarity.
  • the switch Sn2 is turned ON, and the correction non-selective voltages are outputted when the output of BITn is at the "L” level, the signal DET assumes the "H” level and the output of BIT(n + 1) is at the "H” level, viz., in the case of the non-selective state, effecting the polarity inversion and the selective state being present just before performing the polarity inversion.
  • the scanning electrode driving circuit 905 functions in the manner discussed above. Note that the constructions of the switch circuits 908 and 909 and of the multiplexer circuit 907 are not limited to the above-mentioned ones but may take any form on the condition that the like voltages can be outputted.
  • the liquid crystal unit 801 has the above-described constitution.
  • FIG. 11 illustrates a circuitry of the correction circuit 804 of FIG. 8.
  • the numerals 401, 402 and 403 represent the same components as those of FIG. 4. These components marked with the like numerals have the same functions, and hence the descriptions thereof are omitted herein.
  • the numeral 804 stands for an arithmetic circuit; and 805 a pulse width control circuit.
  • the pulse width control circuit 805 Synchronized with the trailing edge of the signal LP, the pulse width control circuit 805 in turn outputs an active signal, i.e., a magnitude signal 809 which remains active during only a period obtained by adding a certain time to a time corresponding to the numeric value F inputted thereto.
  • an active signal i.e., a magnitude signal 809 which remains active during only a period obtained by adding a certain time to a time corresponding to the numeric value F inputted thereto.
  • the correction circuit 804 has the foregoing circuitry and functions in the manner described above.
  • FIG. 12 illustrates one example of a specific circuitry of the voltage power supply circuit 805 of FIG. 8.
  • the numerals 1201 through 1207 denote resistors sequentially connected in series, both ends of which are supplied with voltages V0 and V5.
  • V1N - V1L V4U - V4N
  • Resistance values of the individual resistors 1201 through 1207 are set to establish the foregoing relationships.
  • Voltage stabilizing circuits generally indicated at 510 are constructed in the same manner and has the same function as those of the circuit 510 depicted in FIG. 5.
  • Switches 1209 and 1210 output voltages V1L and V4U during an active period of the magnitude signal 809 of FIG. 8. During an inactive period, the switches 1209 and 1210 output voltages V1N and V4N. The output voltages of the switches 1209 and 1210 are set anew at voltages V1′ and V4′.
  • the voltage power supply circuit 805 outputs an X-power-supply 107 in which voltages V0 and V2 are defined as one group of lighting and non-lighting voltages, while voltages V5 and V3 are defined as the other group of lighting and non-lighting voltages.
  • the circuit 805 also outputs a Y-power-supply 806 in which voltages V5, V1n and V1′ are conceived as one group of selecting, non-selective and correction non-selective voltages, while voltages V0, V4N and V4′ are conceived as the other group of selective, non-selective and correction non-selective voltages.
  • the voltage power supply circuit 305 is thus constructed. The operation thereof will be explained by way of a specific example.
  • FIG. 13 there is depicted the liquid crystal panel 201 (shown in FIG. 9), wherein the display dots indicated by oblique lines respectively exhibit a lighting state.
  • FIGS. 14(a) through 14(c) illustrate driving voltage waveforms in accordance with the embodiment of the invention when performing the display illustrated therein.
  • the polarity is inverted between the scanning electrodes Y3 and Y4. (The number of polarity inversions and the positions thereof are not limited but may arbitrarily be selected as the necessity arises.)
  • FIG. 14(a) shows a voltage waveform in a position of a dot D33 on a signal electrode X3.
  • the voltage waveform is dragged towards the selective voltage when inverting the polarity.
  • FIG. 14(b) depicts a voltage waveform in the position of dot D33 on a scanning electrode Y3. There is applied a correction non-selective voltage deviated from the non-selective voltage to the selective voltage during only a period obtained by adding a certain time to a time corresponding to a sum F of lighting dots on the scanning electrodes Y3 and Y4 when inverting the polarity.
  • FIG. 14(c) shows a difference between FIGS. 14(a) and 14(b), i.e., a waveform of voltage applied to the dot D33.
  • the voltage waveform formed on the scanning electrode Y3 is also deviated to the selective voltage when the voltage waveform on the signal electrode X3 is dragged towards the lighting voltage.
  • an effective value of the difference is substantially corrected, thus obviating contrasting unevenness on the display.
  • the correction non-selective voltage is applied to the scanning electrode selected just before inverting the polarity on the occasion of the polarity inversion during only a period (hereinafter referred to as a correction period) obtained by adding a certain time to a time corresponding the sum F, whereby the contrasting unevenness on the display can be eliminated.
  • a period for which to apply the correction non-selective voltage i.e., a voltage different from the non-selective voltage in accordance with the sum F.
  • a difference in potential with respect to the different voltage may be increased or deceased according to the sum F. Both the period and the difference in potential may be varied in accordance with the sum F.
  • the foregoing different voltage may be replaced with waveforms assuming triangular and trapezoidal configurations and other waveforms expressed by exponential functions.
  • an amount of correction is incremented or reduced in accordance with the sum F.
  • the increase or decrease depending on the sum F may be omitted.
  • a correction non-selective voltage is applied to the scanning electrode selected just before inverting the polarity on the occasion of the polarity inversion during only a period to which a certain time is added. This arrangement considerably improves the unevenness on the display.
  • the correction period is set particularly at one cycle of the signal LP, thereby simplifying the circuitry. It is because the switches 1209 and 1210 of the correction circuit 804 and the power supply circuit 805 can be omitted.
  • the embodiment 1 is provided to cope with the unevenness on the display due to the first cause, in which the selective voltage is overlapped with the correction voltage.
  • the embodiment 6 is given to cope with the unevenness on the display due to the second cause, in which the non-selective voltage is overlapped with the correction voltage. Under such conditions, it is possible to simultaneously obviate the unevenness on the display duet to the first and second causes.
  • a liquid crystal display unit with no displaying unevenness even at ambient temperatures of a wide range may be obtained by providing a means for changing an amount of correction according to the ambient temperatures.
  • the contrast unevenness can be ameliorated by correcting a difference between the effective voltages generated when inverting the polarity while varying the scanning or signal voltage waveform on the occasion of the polarity inversion.
  • the unevenness in contrast can further be improved by an addition of correction corresponding to the numeric value F.
  • a more improved condition with respect to the contrast unevenness can be provided by varying the scanning or signal voltage waveform in accordance with the numeric value I even in a situation other than the polarity inversion.

Description

    BACKGROUND OF THE INVENTION: Field of the Invention:
  • The present invention relates to a method of driving a liquid crystal display unit.
  • Description of the Prior Art:
  • A well-known prior art method of driving a liquid crystal display unit is the voltage averaging method.
  • This driving method will be described with reference to FIGS. 17 through 19. Turning first to FIG. 17, there are shown a configuration of a liquid crystal panel and a display dot matrix thereon. Designated at 1 is a liquid crystal panel consisting of a liquid crystal layer and a pair of substrates 2 and 3 for sandwiching the layer therebetween. One substrate 2 is provided with scanning electrodes Y1 to Y6 disposed in a lateral direction, while the other substrate 3 is provided with signal electrodes X1 to X6. Display dots are formed at intersections of the scanning electrodes Y1 to Y6 and the signal electrodes X1 to X6. The display dots marked with oblique lines (hatching) in FIG. 17 represent lighting points, whereas other display dots indicate non-lighting points. The display dots lightened will hereinafter be referred to as lighting dots, while other display dots which are not yet lit up will be referred to as non-lighting dots. Note that the illustrated liquid crystal panel is based on a (6 x 6) dot matrix for simplicity of explanation, but generally, as a matter of fact, substantially more dots are provided.
  • Selective voltages or non-selective voltages are applied sequentially to the scanning electrodes Y1 to Y6. One frame comprises the period during which the selective or non-selective voltages are applied sequentially to the scanning electrodes Y1 to Y6.
  • Simultaneously when applying the selective or non-selective voltages to the scanning electrodes Y1 through Y6 in due order, the signal electrodes X1 to X6 undergo application of lighting or non-lighting voltages (the scanning electrodes to which the selective voltages are applied will be called selected scanning electrodes.) More specifically, in the case of lightening the display dot located at the intersection of a certain scanning electrode and a certain signal electrode, the lighting voltage is, when that scanning electrode is selected, applied to the signal electrode. Whereas in a non-lighting state, the non-lighting voltage is applied thereto. Referring to FIGS. 18 and 19, there is illustrated one example of actual driving waveforms (of the voltages applied).
  • FIG. 18(a) shows a waveform of a signal voltage applied to the signal electrode X2 depicted in FIG. 17. FIG. 18(b) illustrates a waveform of a scanning voltage applied to the scanning electrode Y4. FIG. 18(c) depicts a waveform of a voltage applied to the display dot (a lighting state) at the intersection of the signal electrode X2 and the scanning electrode Y4.
  • FIG. 19(a) shows a waveform of a signal voltage applied to the signal electrode X2. FIG. 19(b) illustrates a waveform of a scanning voltage applied to the scanning electrode Y3. FIG. 19(c) depicts a waveform of a voltage applied to the display dot (a non-lighting state) at the intersection of the signal electrode X2 and the scanning electrode Y2.
  • Referring again to FIGS. 18 and 19, F1 and F2 represent frame periods.
  • In the frame period F1:
    selective voltage = V0, non-selective voltage = V4
    lighting voltage = V5, non-lighting voltage = V3
  • In the frame period F2:
    selective voltage = V5, non-selective voltage = V1
    lighting voltage = V0, non-lighting voltage = V2.
  • Further, the following relationships are established: V0-V1 = V1 - V2 = V
    Figure imgb0001
    V3 - V4 = V4 - V5 = V
    Figure imgb0002
    V0 - V5 = n·V
    Figure imgb0003

    where n is a constant. The polarity of the difference in voltage between the scanning voltage waveform and the signal voltage waveform is varied depending on the frame periods F1 and F2, thereby effecting an AC driving process. Note that the time when the polarity is inverted is referred to as a polarity inverting time.
  • As is obvious from a comparison between FIGS. 18 and 19, whether a display dot comes into the lighting state or the non-lighting state depends on the voltage - i.e., lighting voltage or non-lighting voltage - applied to the signal electrode when the selective voltage is applied to the scanning electrode on which the display dot exists. The driving method discussed above is known as a voltage averaging method.
  • With a driving based on the voltage averaging method, however, as shown in FIGS. 18 and 19, clear-cut rectangular waveforms are not in fact applied to the display dots. The first reason for this is that each display dot has an electric capacity determined by the area thereof, the thickness of the liquid crystal layer and the dielectric constant of the liquid crystal material. The second reason is that both of the scanning electrode and the signal electrode are made of transparent conductive films each having a sheet resistance of, typically, several tens of ohms. This, as a matter of course, causes each of these electrodes to have a constant electric resistance.
  • Supposing that the clear-cut rectangular waveforms depicted in FIGS. 18 and 19 are applied from a driving circuit, the waveforms of voltages actually applied to the display dots are more or less distorted. As a result, there is caused a difference in effective voltage between the waveforms of voltages applied to the respective display dots, which in turn brings about a problem of producing unevenness in contrast.
  • This problem is a classical one. Proposed, as countermeasures, in JP-A-62-31825, JP-A-60-19195 and JP-A-60-19196 are methods (hereinafter referred to as a line inversion driving method) of inverting the polarity of the voltage applied to a liquid crystal panel a plurality of times during one frame.
  • In the case of effecting a driving operation based on the voltage averaging method or the line inversion driving method, however a density of the display dots on the scanning electrode to which the selective voltage is applied immediately after inverting the polarity of the voltage applied to the liquid crystal panel, differs from those of the display dots on other scanning electrodes. For this reason, the linear contrast becomes uneven. When performing the line inversion driving so that the position of the scanning electrode undergoing the polarity inversion varies with passage of time, a stream of unevenness of the linear contrast is, it appears, produced. This phenomenon in turn causes a remarkable decline in display quality of the liquid crystal display unit.
  • The inventor investigated the reasons that cause the unevenness in the linear contrast in the prior art liquid crystal display unit.
  • The mechanism causing the contrast unevenness will be explained with reference to FIG. 17.
  • For explanatory convenience, the scanning electrodes Y1 to Y6 are assumed to be driven such that selection returns to the first scanning electrode Y1 after the first scanning electrode Y1 to the sixth scanning electrode Y6 have been selected in sequence.
  • The polarity inversion based on the line inversion driving method is carried out between the scanning electrodes Y3 and Y4. (This does not restrict the number of polarity inversion processes and the position in which the polarity inversion is performed, and the polarity inversions may be effected, if necessary, an arbitrary number of times in arbitrary positions.)
  • The liquid crystal panel 1 adopts a so-called positive display wherein the density increases as an effective voltage applied to the display dot rises.
  • Let V be an absolute value of a difference between the non-selective voltage and the lighting/non-lighting voltage, and let n·V be an absolute value of a difference between the selective voltage and the lighting voltage, where n is a constant typically having a value of 3 though 50.
  • FIGS. 20(a) to 20(c) individually show a waveform of a signal voltage applied to the signal electrode X2 of FIG. 17, a waveform of a scanning voltage applied to the scanning electrode Y2 thereof and a difference between these two waveforms.
  • Similarly, FIGS. 21(a) to 21(c) respectively illustrate a waveform of a signal voltage applied to the signal electrode X2 of FIG. 17, a waveform of a scanning voltage applied to the scanning electrode Y3 thereof and a difference between these two waveforms.
  • Turning to FIG. 22, there is illustrated, by a solid line, a waveform of a voltage applied to the display dot (hereinafter designated as D23) which is formed by a combination of the signal electrode X2 and the scanning electrode Y3 of FIG. 17, i.e. the voltage waveform applied to scanning electrode Y3 relative to signal electrode X2. Note that the voltage waveform indicated by a broken line represents a voltage applied to the scanning electrode Y2 relative to the signal electrode X2.
  • In a comparison between the waveforms drawn with the solid lines in FIGS. 21(c) and 22, it can be understood from a difference (FIG. 21(c)) of the voltages applied to the signal electrode X2 and the scanning electrode Y3 in FIG. 17 that the effective voltage of the waveform of voltage actually applied to the display dot formed by a combination of the signal electrode X2 and the scanning electrode Y3 becomes large.
  • An analysis for this will be given as follows. The voltage having a waveform indicated by the broken line in FIG. 22 is applied to a display dot (hereinafter denoted as D22) at an intersection of the signal electrode X2 and the scanning electrode Y2. Hence, when the selection shifts from the scanning electrode Y2 to the electrode Y3, an electric charge quantity Q₁, which is discharged by a capacitor created by the display dot D22, is given as below from the voltage waveform indicated by the broken line in FIG. 22. Q₁ = nVC - (-VC) = (n + 1)VC
    Figure imgb0004

    where C is the capacity of the capacitor. An electric charge quantity Q₂ absorbed by the display dot D23 is expressed such as: Q₂ = (n - 2)VC - VC = (n - 3) VC
    Figure imgb0005
  • Hence, a difference ΔQ therebetween is given by: ΔQ = 4VC
    Figure imgb0006
  • It can be observed from FIG. 17 that the display dots D22 and D23 are contiguous to each other. Capacitors, which are created by the display dots D22 and D23 are electrically connected via a low-valued resistance of the short length of signal electrode X2 (generally 1mm or less).
  • Therefore, an electric charge, which is expressed such as Q₁ - ΔQ = (n - 3) VC, immediately flows from the display dot D22 into the display dot D23, and there is caused almost no drop in voltage due to the electric current thereof.
  • However, an electric charge of ΔQ flows from the scanning electrodes Y2 and Y3 or an end of the signal electrode X2, i.e., from outside into a portion to which the voltage is to be applied. Resistances of the scanning electrode and of the signal electrode at that time, though they depend on positions of the display dots, exhibit considerably large values, with the result that a flow of electric charge is hindered. For this reason, the electric charge is not immediately discharged even though the voltage on the signal electrode X2 is forced to drop down when the voltage on the scanning electrode Y2 falls from a level of selective voltage down to a non-selective voltage. It therefore follows that an effective voltage between the signal electrode X2 and the scanning electrode Y3 increases.
  • In other words, if a difference between charge/discharge quantities before and after the selection is positive, an effective value of the voltage applied to the display dot on the scanning electrode selected next becomes large. Whereas in the case of being negative, the effective value of the voltage is decreased. A magnitude of the effective value varies depending on absolute values of the charge/discharge quantities. It is a common practice to effect calculations about the charge/discharge quantities before and after the selection.
  • Let K be the total number of display dots on a certain scanning electrode selected, let NON be the number of lighting dots, and let NOFF be the number of non-lighting dots. The display dot total number K is given by: K = N ON + N OFF
    Figure imgb0007
  • Let MON be the number of lighting dots on the scanning electrode selected next, and let MOFF be the number of the non-lighting dots.
  • Let CON be the capacity of a capacitor formed by a lighting dot, and let COFF be the capacity of a capacitor formed by a non-lighting dot. Then, a relationship therebetween is expressed such as: C ON > C OFF
    Figure imgb0008
  • The electric charge quantity Q₁ with which all the display dots on the selected scanning electrode are charged is given by: Q₁ = N ON n V C ON + N OFF (n - 2) V C OFF
    Figure imgb0009
  • The electric charge quantity Q₂ with which the display dots on the next selected scanning electrode are charged is given by: Q₂ = M ON n V C ON + M OFF (n - 2) V C OFF
    Figure imgb0010
  • Hence, a difference between those electric charge quantities is obtained such as: ΔQ = Q₁ - Q₂ = (N ON - M ON ) n V C ON + (N OFF - M OFF ) (n - 2) V C OFF
    Figure imgb0011

    where NOFF = K - NON and MOFF = K - MON, and therefore = (N ON - M ON ) {n (C ON - C OFF ) + 2 C OFF } V
    Figure imgb0012
  • Let I be a difference given by (NON- MON), and suppose B = {n (CON - COFF) + 2 COFF} V.
  • The result is: ΔQ = I · B
    Figure imgb0013
  • Next, apropos of a charge/discharge quantity in the case of inverting the polarity simultaneously when the selection shifts, the electric charge quantity Q₁ with which the display dots on the canning electrode selected are charged is given by: Q₁ = N ON n V C ON + N OFF (n - 2) V C OFF
    Figure imgb0014
  • The subsequent scanning electrode is selected. The electric charge quantity Q₂ with which the display dots on the scanning electrode are charged, considering the fact that the polarity has been inverted, is given by: Q₂ = - (M ON n V C ON + M OFF (n - 2) V C OFF )
    Figure imgb0015
  • Hence, a difference ΔQ therebetween is expressed by: - ΔQ = Q₁ - Q₂ = N ON n V C ON + N OFF (n - 2) V C OFF + M ON n V C ON + M OFF (n - 2) V C OFF = (N ON + M ON ) n V C ON + (N OFF + M OFF ) (n - 2) V C OFF
    Figure imgb0016

    Figure imgb0017
    where NOFF = K - NON and MOFF = K - MON, so that = (N ON + M ON ) n V C ON + (2K - N ON - M ON ) (n - 2) V C OFF = (N ON + M ON ) {n (C ON - C OFF ) + 2C OFF } V + 2K (n - 2) V C OFF
    Figure imgb0018
  • Let F be a sum of (NON + MON), and suppose D = 2K (n - 2) V COFF. The result is: - ΔQ = F . B + D
    Figure imgb0019
  • Therefore, an equation, taking the polarity inversion into consideration, is expressed such as: ΔQ = - F · B - D
    Figure imgb0020
  • It follows from the formulae (1) and (2) that the difference I becomes positive when the number of lighting dots on the scanning electrode selected is greater than that of lighting dots on a subsequently selected scanning electrode during a selection shift at the time of effecting no polarity inversion, and an effective voltage applied to the display dots on the subsequently selected scanning electrode augments resulting in a a higher density. Whereas if the number of lighting dots of the subsequent scanning electrode is larger than that of lighting dots on the scanning electrode before the selection shift is made, the difference I becomes negative, and the effective voltage applied to the display dots on the scanning electrode after the selection shift has been carried out decreases with the result of a lower density. The fluctuations thereof correspond to an absolute value of the numerical value I.
  • During a selection shift at the time of effecting the polarity inversion, the effective voltage applied to the display dots on the subsequently selected scanning electrode invariably diminishes by a constant value and at the same moment decreases by a value corresponding to a sum F of lighting dots on the scanning electrodes before and after performing the selection shift.
  • To sum up the above, during a selection shift other than those with the polarity inversion the unevenness in contrast appears corresponding to the difference I between the numbers of lighting dots before and after making the shift.
  • During the selection shift when effecting the polarity inversion, the unevenness in contrast, which corresponds to the sum F of the lighting dots before and after performing the shift, is caused, and at the same moment regular contrast unevenness is present.
  • Besides, one of causes of the contrast unevenness produced during the selection shift with simultaneous polarity inversion may be a subtle difference in the step of changing the polarity between the signal voltage waveform and the scanning voltage waveform which are outputted by the actual driving circuit. This is defined as a first cause.
  • The selective voltage is applied just before inverting the polarity. The voltage of each signal electrode forming the display dots on the scanning electrode to which the non-selective voltage is applied immediately after the inversion has been effected, is varied into a voltage having a magnitude corresponding to the electric charge quantity obtained by the formula (2), which is dragged on the side of the selective voltage after inverting the polarity. The situation will be obvious with reference to FIGS. 23 through 25. FIG. 23 illustrates the liquid crystal panel 1 identical with that of FIG. 17 but different in display contents. FIGS. 24 and 25 illustrate voltage waveforms in positions of display dots D33 and D43 when performing the display depicted in FIG. 23. FIG. 24(a) depicts a signal voltage waveform in the dot D33 position. FIG. 24(b) shows a scanning voltage waveform in the dot D33 position, FIG. 24(c) the waveform of a voltage applied to the dot D33. Similarly, FIG. 25(a) illustrates a scanning voltage waveform in a position of the dot D43. FIG. 25(b) depicts a scanning voltage waveform in the dot D43 position. FIG. 25(c) shows the waveform of a voltage applied to the dot D43. As illustrated in FIG. 24(a), apropos of a signal electrode undergoing an application of a lighting voltage, the lighting voltage is dragged in on the side of the selective voltage just after inverting the polarity, and eventually the effective voltage applied to the dot D33 decreases to a degree equivalent to dragging as shown in FIG. 24(c). As illustrated in FIG. 25(a), apropos of a signal electrode to which a non-lighting voltage is applied, the non-lighting voltage is dragged in on the side of the selective voltage, and eventually the effective voltage applied to the dot D43 increases to a degree equivalent to dragging. For this reason, the dot D33 (lighting state) becomes smaller in density than other lighting dots, whereas the dot D43 (non-lighting state) becomes larger in density than other non-lighting display dots. The unevenness on the display is developed in accordance with the electric charge given by the formula (2). More specifically, certain constant unevenness in display is invariably caused. In addition to this, unevenness corresponding to the display contents on the liquid crystal panel is produced. This is defined as a second cause.
  • SUMMARY OF THE INVENTION:
  • It is a primary object of the present invention to provide a novel liquid crystal display unit capable of assuming a uniform appearance having no unevenness in contrast by correcting fluctuations in effective voltages applied to display dots which are attributed to the foregoing two causes, i.e., by correcting distortions of scanning voltage waveforms and signal voltage waveforms as well.
  • This object is achieved with a liquid crystal display unit as claimed.
  • Based on the foregoing constructions, when driving the liquid crystal display unit, it is possible to prevent unevenness in contrast by correcting a difference between effective voltages applied to the display dots, viz., by correcting fluctuations in the effective voltages which are caused due to deformations of the waveforms of voltages applied to the display dots formed at the time of polarity inversions while varying at least any one the scanning voltage waveform and the signal voltage waveform on the occasion of the polarity inversion.
  • BRIEF DESCRIPTION OF THE DRAWINGS:
  • Other objects and advantages of the present invention will become apparent during the following discussion taken in conjunction with the accompanying drawings, in which:
  • FIG. 1
    is a block diagram illustrating a circuitry of a liquid crystal display unit in a first embodiment of the present invention;
    FIG. 2
    is a diagram depicting one example of a construction of a liquid crystal unit 101;
    FIG. 3
    is a timing chart of a control signal 102 and a data signal 103;
    FIG. 4
    is a diagram showing one example of a circuitry of a correction circuit 104;
    FIG. 5
    is a diagram illustrating one example of a circuitry of a voltage power supply circuit 105;
    FIG. 6
    is a diagram illustrating a display dot matrix on a liquid crystal panel;
    FIG. 7
    is a diagram showing voltage waveforms helpful for explaining operations of the present invention;
    FIG. 8
    is a block diagram depicting a circuitry of a liquid crystal display unit in a sixth embodiment of the invention;
    FIG. 9
    is a diagram showing one example of a construction of a liquid crystal unit 801;
    FIG. 10
    is a diagram showing one example of a circuitry of a scanning electrode driving circuit;
    FIG. 11
    is a diagram depicting one example of a circuitry of a correction circuit 804;
    FIG. 12
    is a diagram illustrating one example of a circuitry of a voltage power supply circuit 805;
    FIG. 13, 15, 17 and 23
    are diagrams showing configurations of liquid crystal panels and display dot matrices thereon;
    FIGS. 14 and 16
    are diagrams illustrating voltage waveforms of assistance in explaining the operations of the invention; and
    FIGS. 18 through 22, 24 and 25
    are diagrams showing voltage waveforms, of the prior art, helpful for explaining problems inherent in the prior art.
    DESCRIPTION OF THE PREFERRED EMBODIMENTS:
  • Illustrative embodiments of the present invention will hereinafter be described in a specific manner with reference to the accompanying drawings.
  • To start with, there is shown an embodiment for obviating a problem associated with unevenness on the display due to the first cause given above.
  • [Embodiment 1]
  • The unevenness in contrast is, irrespective of a display pattern, caused to a constant degree when inverting a polarity. As discussed above, there is added unevenness corresponding to a sum F of the number of lighting dots on a scanning electrode selected just before inverting the polarity and of the number of lighting dots on a scanning electrode selected immediately after inverting the polarity.
  • A waveform applied to the display dots is, when the scanning electrode selected during an operation other than the polarity inversion shifts to the next electrode, distorted in accordance with a difference I between the number of lighting dots on the selected scanning electrode and the number of lighting dots on a subsequently selected electrode.
  • Hence, waveform corrections corresponding to the sum F and the difference I may be performed after calculating them during an operation of the liquid crystal display unit.
  • Turning first to FIG. 1, there is illustrated one specific embodiment of the liquid crystal display unit for effecting these corrections.
  • In FIG. 1, the numeral 101 represents a liquid crystal unit constructed of a liquid crystal panel and a driving circuit. Designated at 102 is a series of control signals, for controlling the operation of the liquid crystal display unit, including a latch signal LP, a frame signal FR, a data-in signal DIN, an X-driver shift clock signal XSCL and others. The numeral 103 denotes a data signal; 104 a waveform correcting signal generating circuit (hereinafter simply referred to as a correction circuit); and 105 a power supply circuit.
  • The correction circuit 104 calculates a numeric value F or I and transmits to the power supply circuit 105 both a code signal 108, as a correction signal, indicating a positive or negative sign of the numeric value F or I and a magnitude signal 109, also as a correction signal, indicating the absolute value of F or I. The magnitude signal 109 is kept in an active state for a period corresponding to the absolute value of the numeric value F or I.
  • The power supply circuit 105 behaves to create a scanning electrode driving power supply (hereinafter referred to as a Y-power-supply) 106 and a signal electrode driving power supply (hereinafter referred to as an X-power-supply) 107 catering for the liquid crystal unit 101 in accordance with the code signal 108 and the magnitude signal 109. The power supply circuit 105 acts to correct a voltage of the Y-power-supply 106.
  • Fundamental operations of the embodiment 1 shown in FIG. 1 will be described as follows.
  • To be specific, the correction circuit 104 takes in the data signal 103 when a certain scanning electrode is selected and then counts a number MON of lighting dots on a subsequently selected scanning electrode. Then, the correction circuit 104 counts numeric values F and I, i.e., a sum of the lighting dot number MON and a number NON of lighting dots on scanning electrode which is now being selected, and also a difference therebetween. When shifting the selection (inverting the polarity), a resultant code and absolute value are outputted in the form of a code signal 108 and a magnitude signal 109. In the case of inverting the polarity, the numeric value F replaced with the numeric value I is likewise outputted. Concurrently with this step, a lighting dot number MON is taken in for storage in connection with the number NON of the lighting dots on the scanning electrode selected. The power supply circuit 105 makes a correction necessary for a voltage of the Y-power-supply 106 on the basis of the code signal 108 and the magnitude signal 109.
  • The operations described above make it possible to prevent the contrast unevenness appearing on the liquid crystal panel, which is derived from the first cause. Based on a correcting method in this embodiment, a constant voltage is applied in such a direction as to cancel a distortion created in the driving waveform applied to the liquid crystal panel for a period corresponding to a magnitude of the distortion. A direction (polarity) of the constant voltage is determined by the code signal 108, while the applying period depends on the magnitude signal 109.
  • Tangible constitutions and operations relative to the components employed in the embodiment I will be explained as below. FIGS. 2 through 5 depict in detail the components of FIG. 1.
  • Referring to FIG. 2, there is shown one example of a specific construction of the liquid crystal unit 101.
  • In FIG. 2, a liquid crystal panel generally indicated at 201 is arranged in such a way that a liquid crystal layer is interposed between a pair of substrates 202 and 203, and there are formed scanning electrodes Y1 to Y6 arrayed sideways on one substrate 202 and also signal electrodes X1 to X6 vertically arrayed on the other substrate 203. Display dots are formed at intersections made by the scanning electrodes Y1 to Y6 and the signal electrodes X1 to X6. Note that the liquid crystal panel is based on a (6 x 6) dot matrix for simplicity of explanation, but the dot matrix is not limited to this instance.
  • Designated at 205 is a scanning electrode driving circuit composed of a shift register circuit 206 and a level shifter circuit 207. Outputs of the level shifter circuit 207 are led to the scanning electrodes Y1 through Y6 on the liquid crystal panel 201.
  • A signal electrode driving circuit 208 consists of a shift register circuit 109, a latch circuit 210 and a level shifter circuit 211. Outputs of the level shifter circuit 211 are led to the signal electrodes X1 through X6 on the liquid crystal panel 201.
  • FIG. 3 is a timing chart showing the data signal 103 and the signals DIN, LP, FR and XSCL which are combined to constitute the above-mentioned control signal 102.
  • The signals DIN and LP function as data and shift clocks respectively with respect to the shift register circuit 206 of the scanning electrode driving circuit 205. Upon a trailing edge of the signal LP, the signal DIN is taken in the shift register circuit 206 and then transferred. At this moment, the signal DIN, which is active when assuming "H" level, is outputted once at an interval defined typically by the number of signals LP which is equal to or greater than the number of scanning electrodes Y1 to Y6 on the liquid crystal panel 201. Therefore, the data of "H" pass through an interior of the shift register circuit 106, and in other cases the signal DIN assumes "L". If active, the selective voltages are supplied to the scanning electrodes Y1 through Y6 via the level shifter circuit 207 in accordance with a content of the shift register circuit 206. Whereas in an inactive state, the non-selective voltages are fed to the scanning electrodes Y1 through Y6. The selective voltages and the non-selective voltages are supplied from the Y-power-supply 106.
  • The data signal 103 and the signals XSCL and LP function as data and shift clocks of the signal electrode driving circuit 208 and the shift register circuit 209 and also as a latch clock of the latch circuit 210. Referring to FIG. 3, the data signal 103 is active when assuming an "H" level to exhibit a lighting state. The data signal 103 acts as a signal for determining a state, lighting or non-lighting, of a display dot 104 on the next scanning electrode while a certain scanning electrode on the liquid crystal panel 201 is being selected. During a selecting period of a certain scanning electrode, the data signal 103 is taken in the shift register circuit 209 at a trailing edge of the signal XSCL so that the data signal 103 services as a signal corresponding to the display dot on the subsequently selected scanning electrode. After the data signal 103 has been taken in on the basis of the signal XSCL, a content of the shift register circuit 209 is in turn taken in the latch circuit 210 at a trailing edge of the signal LP. Subsequently, in conformity with the content thus taken therein, the lighting voltages are fed to the signal electrodes X1 through X6 when being active via the shift register circuit 211. Whereas in the inactive state, the non-lighting voltages are supplied to the signal electrodes X1 through X6. The lighting and non-lighting voltages are supplied from the X-power-supply 107.
  • The signal FR (frame signal) is applied to the driving circuits 205 and 208 to AC-drive the liquid crystal panel 201. The signal FR is changed over in synchronization with the trailing edge of the signal LP, thereby changing over the selection of potentials of the driving voltages. More specifically, the driving voltages include two groups of voltages - i.e., one group is selective and non-selective voltages, and the other is lighting and non-lighting voltages. The driving voltages are changed over by the frame signals FR.
  • Note that the construction of the liquid crystal unit 101 and the driving method thereof have been exemplified as one example for explaining the present invention, but the above-described construction and the method are not imitative.
  • FIG. 4 is a block diagram showing one example of a specific circuitry of the correction circuit 104 depicted in FIG. 1.
  • Referring to FIG. 4, the numeral 401 stands for a counter circuit; 402 a first count holding circuit; 403 a second count holding circuit; 404 a value arithmetic circuit; and 405 a pulse width control circuit.
  • The counter circuit 401 serves to count the number of lighting dots among the display dots on the (n + 1)th scanning electrode during a selection process of the n-th scanning electrode on the liquid crystal panel 201 of FIG. 2. The counter circuit 401 counts the number of lighting dots on the (n + 1)th scanning electrode by effecting addition only when the data signal 103 bears an active state at a trailing edge of the signal XSCL during a period ranging from the transition of the signal LP among the control signals 102 to the next trailing edge thereof. At the trailing edge of the signal LP a count value is outputted to the first count holding circuit 402, and at the same time a count value of the counter circuit 401 is reset to 0. In the wake of this step, counting is necessarily performed as the case may be. There will be no problem if an error of counting is set to ± 16 dots on the condition that the number of signal electrodes X1 to X6 is. e.g., approximately 640.
  • Next, at the trailing edge of the signal Lp the first count holding circuit 402 behaves to sequentially take in a count value just before the count value of the counter circuit 401 comes to 0. At the trailing edge of the signal LP the second count holding circuit 403 acts to sequentially take in a count value from the first count holding circuit 402 just before the first count holding circuit 402 takes in the next count value from the counter circuit 401. Hence, when the first count holding circuit 402 takes in the lighting dot number MON of the display dots on the (n + 1)th scanning electrode, the second count holding circuit 403 is taking in the lighting dot number NON of the display dots on the n-th scanning electrode. The numeric values MON and NON are respectively outputted to the value arithmetic circuit 404.
  • Subsequently, the value arithmetic circuit 404 computes a sum F and a difference I with respect to the numeric values MON and NON given from the first and second count holding circuits 402 and 403, the calculations being such that F = NON + MON and I = NON - MON. If the signal FR does not vary (a time other than the polarity inversion), the sign of the value I is outputted in the form of the code signal 108. Simultaneously, an absolute value of I is outputted to the pulse width control circuit 405. At the time the signal FR varies (polarity inversion), the value F is likewise outputted. However, the sign of the value F is inverted, depending on a situation of the circuit, and outputted as a code signal 108.
  • Synchronized with the trailing edge of the signal LP among the control signals 102, the pulse width control circuit 405 outputs an active signal or magnitude signal 108 for a time corresponding to the absolute value of F or I inputted from the value arithmetic circuit 404.
  • Incidentally, a relationship between the value F, the value I and a width W of the magnitude signal 109 may be obtained, e.g., by an experimental method. The width W may differ depending on the sign of the value I. In this embodiment, however, the width W is not conditional to the positive or negative sign of the value I. Namely, W = a₁·I and W = a₁·F + a₀.
  • The operation and function of the correction circuit 104 have been described above. Specific circuitry of the respective components 401 to 405 can properly be actualized with facility in the manner discussed above, and hence the description thereof is omitted herein.
  • Turning to FIG. 5, there is shown one example of a tangible circuitry of the voltage power supply circuit 105 depicted in FIG. 1a.
  • Referring again to FIG. 5, the numerals 501 to 509 represent resistors sequentially connected in series, both ends of which are supplied with a voltage V0U and a voltage V5L.
  • Voltages generated at respective ends of the resistors 501 through 509 are indicated by V0U, V0N, V0L, V1, V2, V3, V4, V5U, V5N and V5L, respectively. V0N - V1 = V1 - V2 = V3 - V4 = V4 - V5N = (V2 - V3) / (n - 4)
    Figure imgb0021

    where n is a constant.
  • Or, (V0U - V0N) / (V0N - V1) = (V5N - V5L) / (V4 - V5N)
    Figure imgb0022
    (V0N - V0L) / (V0N - V1) = (V5U - V5N) / (V4 - V5N)
    Figure imgb0023
  • Resistance values of individual resistors 2601 to 2607 are set to establish these relationships.
  • Designated at 510 are voltage stabilizing circuits for stabilizing the split voltages V0N, V0L, V1, V2, V3, V4, V5U and V5N which are produced by resistors 501 through 509. In each circuit 510, a voltage having the same level as an input voltage is outputted to cause a low impedance. In this embodiment, each voltage stabilizing circuit 510 is composed of a voltage follower circuit based on an operational amplifier circuit.
  • Switches 511 and 512 are changed over in response to the code signal 108 and the magnitude signal 109 of FIG. 1. When outputting the magnitude signal 109 and the code signal 108 associated with negative values I and F, the switches 511 and 512 of FIG. 5 are changed over to the voltages V0U and V5L while the magnitude signal remains active.
  • When outputting the magnitude signal 109 and the code signal 108 associated with a positive value I, the switches are changed over to the voltages V0L and V5U while the magnitude signal 109 is kept active.
  • In any case, when the magnitude signal 109 becomes inactive, the switches are changed over to the voltages V0N and V5N.
  • Voltages outputted by the switches 511 and 512 are V0 and V5.
  • The voltages V0N and V2 are defined as one group of lighting and non-lighting voltages, while the voltages V5N and V3 are the other group of lighting and non-lighting voltages, these voltages being combined en bloc to constitute the X-power-supply 107.
  • Similarly, the voltages V5 and V1 define one group of selective and non-selective voltages, while the voltages V0 and V4 are the other group of selective and non-selective voltages, these voltages being combined en bloc to constitute the Y-power-supply 106.
  • The X-power-supply 107 and the Y-power-supply 106 supply voltages to the liquid crystal unit 101 depicted in FIG. 1.
  • The configuration has been shown above, and the description will be focused on the operation by giving tangible examples. Turning first to FIG. 6, there is illustrated a liquid crystal panel 201 (shown in FIG. 2), in which the display dots drawn with oblique lines are in the lighting state. FIGS. 7(a) through 7(c) depict driving voltage waveforms in this embodiment of the invention when effecting the display shown therein. The polarity is inverted between the scanning electrodes Y3 and Y4. (The number of polarity inversions and the positions thereof are not limited but may arbitrarily be selected.)
  • FIG. 7(a) shows a waveform of signal voltage applied to the signal electrode X2.
  • FIG. 7(b) illustrates a waveform of scanning voltage applied to the scanning electrode Y4. The polarity inversion is effected at the scanning electrode Y4, and hence the selective voltage becomes V0U or V5L for only a period (indicated by W in the Figure) obtained by adding a time corresponding to the value F to a certain span of time.
  • FIG. 7(c) illustrates a waveform (indicated by a solid line) of voltage actually applied to a display dot (hereinafter designated at D24) made by the signal electrode X2 and the scanning electrode Y4. A waveform depicted with a broken line may be conceived as a rounding generated corresponding to a sum of a certain value and the value F created when inverting the polarity.
  • As illustrated in FIGS. 7(a) through 7(c), the correction circuit 104 of FIG. 1, when inverting the polarity, outputs a magnitude signal 109 which remains active during a period obtained by adding a certain span of time to a time equivalent to the value F. A code signal 108 bears a negative state. While the magnitude signal 109 is kept active, the power supply circuit 105 outputs V0U and V5L as selective voltages (voltages V0 and V5) combined to constitute a Y-power-supply 107, and further outputs V0N and V5N when the magnitude signal 109 becomes inactive.
  • For this reason, the rounding indicated by the broken line in FIG. 7(c) is, as shown by the solid line thereof, substantially corrected, because the selective voltages are changed into voltages V0U and V5L for only a time W shown in FIG. 7(b).
  • As a result, an effective voltage is corrected, thereby obviating the contrasting unevenness produced due to the first cause when inverting the polarity.
  • During selective shifting other than the polarity inversion, the operations are much the same except that the magnitude signal 109 and the code signal 108 of FIG. 1 depend on the value I instead of the value F.
  • Namely, the magnitude signal 109 continues to be active during a period corresponding to the value I.
  • During the active period, in the case of the code signal 108 being positive, voltages V0L and V5U are outputted as the voltages V0 and V5.
  • During the active period, in the case of the code signal 108 being negative, voltages V0U and V5L are outputted as voltages V0 and V5.
  • During an inactive period, voltages V0N and V5N are outputted as the voltages V0 and V5.
  • On the basis of the operations described above, as in the case of inverting the polarity, there is corrected a distortion in the waveform of voltage applied in effect on the display dot formed in connection with the value I, with the result that the effective voltage is corrected and also the unevenness in contrast can be eliminated.
  • [Embodiment 2]
  • In the embodiment 1, even if the correction (at the time of selective shifting other than the polarity inversion) by use of the value I is omitted, almost the same effects can be acquired, and the circuitry can also be simplified.
  • [Embodiment 3]
  • In the embodiment 2, the correction by use of the value F at the time of inverting the polarity is omitted, and instead the correction is performed invariably for a given time. Even in such a case, almost the same effects can be obtained, and the circuitry can remarkably be simplified.
  • [Embodiment 4]
  • In the embodiments 1 through 4, the correction is carried out by changing the selective voltages. However, other non-selective voltages, lighting voltages and non-lighting voltages may be varied.
  • [Embodiment 5]
  • Throughout the embodiments 1 to 5, the correction is effected while changing the regular voltages for only a period corresponding to the values I and F. However, the voltages corresponding to the values I and F may be applied for a given time; or alternatively the voltages may be applied during a period corresponding to the values I and F. Besides, the waveforms of voltages applied to perform the correction may assume not only a rectangular configuration but also triangular and trapezoidal shapes, and further other configurations expressed by exponential functions.
  • There will be explained embodiments made to obviate the contrast unevenness which appears due to the second cause.
  • [Embodiment 6]
  • The unevenness in display, which is attributed to the second cause, is produced by the fact that a voltage on a signal electrode, which intersects a scanning electrode (hereinafter referred to as a scanning electrode YS) on which to effect a change from a selective voltage to a non-selective voltage when inverting the polarity, is dragged towards the selective voltage after the polarity inversion has been executed. Added to this unevenness are a certain degree of unevenness and other unevenness corresponding to a sum of display dots on the scanning electrodes selected before and after inverting the polarity. Hence, when operating the liquid crystal display unit, the non-selective voltage on the scanning electrode YS is varied towards the selective voltage by an amount with which the voltage on the signal electrode is dragged towards the selective voltage while superposing a voltage corresponding to the sum F calculated on the non-selective voltage applied to the scanning electrode YS, whereby an effective voltage of the display dots on the scanning electrode YS is equalized to that of the display dots on the scanning electrodes other than the electrode YS. The correcting method described above is capable of obviating the unevenness on the display due to the second cause.
  • Referring to FIG. 8, there is specifically shown one embodiment of the liquid crystal display unit for performing the aforementioned correction.
  • In FIG. 8, a liquid crystal unit generally indicated at 801 is constructed of a liquid crystal panel and a driving circuit. The numerals 102 and 103 represent a control signal and a data signal which are much the same as those shown in FIG. 1. Referring again to FIG. 8, a waveform correcting signal generating circuit (hereinafter simply referred to as a correction circuit 804) is intended to calculate a sum of lighting dots on the scanning electrodes selected before and after shifting the selection and create a magnitude signal 809 which remains active for a time corresponding to a result of the calculation. Designated at 805 in a voltage power supply circuit for creating an X-power-supply 107 consisting of two groups of lighting and non-lighting voltages and of a Y-power-supply 806 consisting of two groups of selective, non-selective and correction non-selective voltages. The correction non-selective voltage varies in accordance with the magnitude signal 809. Denoted at 810 is a polarity inversion detecting circuit composed of a flip-flop circuit and an exclusive OR circuit. The circuit 810 outputs a signal (hereinafter referred to as a signal DET) assuming the "H" level till a signal LP rises next when a signal FR synchronizes with the signal LP and varies. That is, the circuit 810 functions to detect the fact that the signal FR varies.
  • Tangible constitutions and operations of the respective components in this embodiment will be explained. FIG. 9 shows one example of a concrete construction of a liquid crystal unit 801. The numeral 201 denotes a liquid crystal panel a configuration and operation of which are the same as those of the liquid crystal panel 201. Designated at 208 is a signal electrode driving circuit whose operation and circuitry are the same as those of the signal electrode driving circuit 208. Therefore the components thereof are marked with the like numerals and the descriptions thereof are omitted herein. Turning to FIG. 9, a scanning electrode driving circuit 905 is constructed of at least a shift register 906 having a greater number of bits than the number of scanning electrodes Y1 to Y6, a multiplexer circuit 907 and switch circuits 908 and 909.
  • A circuitry of the scanning electrode driving circuit 905 will fully be described with reference to FIG. 10. Indicated at 906 is a 7-bit shift register for shifting the "H" level sequentially from BIT0 to BIT1 and further to BIT2 therefrom at each trailing edge of the signal LP after taking in a signal DIN at the transition of the signal LP. A multiplexer circuit 907 outputs a signal for turning ON a switch SnO (n = 0 to 5) of a switch circuit 908 when an output of BITn (n = 0 to 5) of the shift register 906 is at the "H" level. The multiplexer circuit 907 also outputs a signal for turning ON a switch Sn1 when an output of BITn is at the "L" level and a signal DET assumes the "L" level, and when an output of BITn is at "L", the signal DET assumes the "H" level and an output of BIT (n + 1) is at "L". Furthermore, the circuit 907 outputs a signal for turning ON a switch Sn2 when the output of BITn is at the "L" level, the output of BIT (n + 1) is at "H" and the signal DET assumes the "H" level. At this time, the circuit 907 outputs signals for turning OFF other switches Sn0 to Sn2 when outputting a signal for turning ON any one of the switches Sn0 to Sn2. A switch circuit 908 is constituted by six groups of switches, each group consisting of three switches Sn0 to Sn2 (n = 0 to 5). These switches take one voltage among the selective, non-selective and correction non-selective voltages in accordance with outputs of the multiplexer circuit 907, and output these voltages to the scanning electrodes Y1 through Y6 on the liquid crystal panel 201. Referring to FIG. 10, switch circuit 909 is constructed of switches S60, S61 and S62. The switch circuit 909 changes over one group of voltages from two groups of selective, non-selective and correction non-selective voltages of the Y-power-supply 806 with the aid of the signal FR.
  • The constitution has been described above, and the description will next deal with the operation. To begin with, one group of voltages is selected from two groups of selective, non-selective and correction non-selective voltages by use of the signal FR. Apropos of the switches of the switch circuit 908, the switch Sn0 is turned ON, and the selective voltages are outputted when BITn is at the "H" level, i.e., in a selective state. Then, the switch Sn1 is turned ON, and the selective voltages are outputted when an output of BITn is at the "L" level and the signal DET assumes the "L" level, viz., in the case of the non-selective state and effecting no polarity inversion, and when the output of BITn is at the "L", the signal DET assumes the "H" level and an output of BIT(n + 1) is at the "L", i.e., in the case of the non-selective state, effecting the polarity inversion and no selective state being present just before inverting the polarity. The switch Sn2 is turned ON, and the correction non-selective voltages are outputted when the output of BITn is at the "L" level, the signal DET assumes the "H" level and the output of BIT(n + 1) is at the "H" level, viz., in the case of the non-selective state, effecting the polarity inversion and the selective state being present just before performing the polarity inversion.
  • The scanning electrode driving circuit 905 functions in the manner discussed above. Note that the constructions of the switch circuits 908 and 909 and of the multiplexer circuit 907 are not limited to the above-mentioned ones but may take any form on the condition that the like voltages can be outputted.
  • Referring to FIG. 9, the liquid crystal unit 801 has the above-described constitution.
  • FIG. 11 illustrates a circuitry of the correction circuit 804 of FIG. 8. Referring to FIG. 11, the numerals 401, 402 and 403 represent the same components as those of FIG. 4. These components marked with the like numerals have the same functions, and hence the descriptions thereof are omitted herein. The numeral 804 stands for an arithmetic circuit; and 805 a pulse width control circuit. The arithmetic circuit 804 outputs to the pulse width control circuit 805 a sum of values NON and MON given from the first and second count holding circuits 402 and 403, the calculation being made such as: F = NON + MON. Synchronized with the trailing edge of the signal LP, the pulse width control circuit 805 in turn outputs an active signal, i.e., a magnitude signal 809 which remains active during only a period obtained by adding a certain time to a time corresponding to the numeric value F inputted thereto.
  • The correction circuit 804 has the foregoing circuitry and functions in the manner described above.
  • FIG. 12 illustrates one example of a specific circuitry of the voltage power supply circuit 805 of FIG. 8. Referring to FIG. 12, the numerals 1201 through 1207 denote resistors sequentially connected in series, both ends of which are supplied with voltages V0 and V5.
  • The voltages generated at the respective ends of the resistors 1201 through 1207 are, as shown in the Figure, V0, V1N, V1L, V2, V3, V4U, V4N and V5. V0 - V1N = V1N - V2 = V3 - V4N = V4N - V5 = (V2 - V3) / (n - 4) where n is a constant = V
    Figure imgb0024
  • And V1N - V1L = V4U - V4N
    Figure imgb0025
  • Resistance values of the individual resistors 1201 through 1207 are set to establish the foregoing relationships.
  • Voltage stabilizing circuits generally indicated at 510 are constructed in the same manner and has the same function as those of the circuit 510 depicted in FIG. 5.
  • Switches 1209 and 1210 output voltages V1L and V4U during an active period of the magnitude signal 809 of FIG. 8. During an inactive period, the switches 1209 and 1210 output voltages V1N and V4N. The output voltages of the switches 1209 and 1210 are set anew at voltages V1′ and V4′.
  • The voltage power supply circuit 805 outputs an X-power-supply 107 in which voltages V0 and V2 are defined as one group of lighting and non-lighting voltages, while voltages V5 and V3 are defined as the other group of lighting and non-lighting voltages. The circuit 805 also outputs a Y-power-supply 806 in which voltages V5, V1n and V1′ are conceived as one group of selecting, non-selective and correction non-selective voltages, while voltages V0, V4N and V4′ are conceived as the other group of selective, non-selective and correction non-selective voltages.
  • The voltage power supply circuit 305 is thus constructed. The operation thereof will be explained by way of a specific example.
  • Turning to FIG. 13, there is depicted the liquid crystal panel 201 (shown in FIG. 9), wherein the display dots indicated by oblique lines respectively exhibit a lighting state.
  • FIGS. 14(a) through 14(c) illustrate driving voltage waveforms in accordance with the embodiment of the invention when performing the display illustrated therein. The polarity is inverted between the scanning electrodes Y3 and Y4. (The number of polarity inversions and the positions thereof are not limited but may arbitrarily be selected as the necessity arises.)
  • FIG. 14(a) shows a voltage waveform in a position of a dot D33 on a signal electrode X3. The voltage waveform is dragged towards the selective voltage when inverting the polarity.
  • FIG. 14(b) depicts a voltage waveform in the position of dot D33 on a scanning electrode Y3. There is applied a correction non-selective voltage deviated from the non-selective voltage to the selective voltage during only a period obtained by adding a certain time to a time corresponding to a sum F of lighting dots on the scanning electrodes Y3 and Y4 when inverting the polarity.
  • FIG. 14(c) shows a difference between FIGS. 14(a) and 14(b), i.e., a waveform of voltage applied to the dot D33.
  • As is obvious from FIG. 14(c), the voltage waveform formed on the scanning electrode Y3 is also deviated to the selective voltage when the voltage waveform on the signal electrode X3 is dragged towards the lighting voltage. As a result, an effective value of the difference is substantially corrected, thus obviating contrasting unevenness on the display.
  • In this manner, the correction non-selective voltage is applied to the scanning electrode selected just before inverting the polarity on the occasion of the polarity inversion during only a period (hereinafter referred to as a correction period) obtained by adding a certain time to a time corresponding the sum F, whereby the contrasting unevenness on the display can be eliminated.
  • [Embodiment 7]
  • In the embodiment 6, there is increased or decreased a period for which to apply the correction non-selective voltage, i.e., a voltage different from the non-selective voltage in accordance with the sum F. A difference in potential with respect to the different voltage may be increased or deceased according to the sum F. Both the period and the difference in potential may be varied in accordance with the sum F. The foregoing different voltage may be replaced with waveforms assuming triangular and trapezoidal configurations and other waveforms expressed by exponential functions.
  • [Embodiment 8]
  • In the embodiment 6, an amount of correction is incremented or reduced in accordance with the sum F. The increase or decrease depending on the sum F may be omitted. instead, a correction non-selective voltage is applied to the scanning electrode selected just before inverting the polarity on the occasion of the polarity inversion during only a period to which a certain time is added. This arrangement considerably improves the unevenness on the display. The correction period is set particularly at one cycle of the signal LP, thereby simplifying the circuitry. It is because the switches 1209 and 1210 of the correction circuit 804 and the power supply circuit 805 can be omitted.
  • [Embodiment 9]
  • The embodiment 1 is provided to cope with the unevenness on the display due to the first cause, in which the selective voltage is overlapped with the correction voltage. On the other hand, the embodiment 6 is given to cope with the unevenness on the display due to the second cause, in which the non-selective voltage is overlapped with the correction voltage. Under such conditions, it is possible to simultaneously obviate the unevenness on the display duet to the first and second causes.
  • [Embodiment 10]
  • In the embodiments 1 through 9, a liquid crystal display unit with no displaying unevenness even at ambient temperatures of a wide range may be obtained by providing a means for changing an amount of correction according to the ambient temperatures.
  • As discussed above, the contrast unevenness can be ameliorated by correcting a difference between the effective voltages generated when inverting the polarity while varying the scanning or signal voltage waveform on the occasion of the polarity inversion.
  • The unevenness in contrast can further be improved by an addition of correction corresponding to the numeric value F.
  • In addition to this, a more improved condition with respect to the contrast unevenness can be provided by varying the scanning or signal voltage waveform in accordance with the numeric value I even in a situation other than the polarity inversion.
  • It is also feasible to obviate the contrast unevenness on the display by applying the correction non-selective voltage on the scanning electrode selected just before inverting the polarity on the occasion of the polarity inversion during only the period obtained by adding the certain time to the time corresponding to the sum F.
  • Although the illustrative embodiments have been described in detail with reference to the accompanying drawings, it is to be understood that the present invention is not limited to those precise embodiments. Various changes or modifications may be effected therein by a person skilled in the art without departing from the scope of the invention as defined in the claims.

Claims (6)

  1. A liquid crystal display unit comprising:
       a pair of substrates (202, 203) sandwiching a liquid crystal layer therebetween,
       a group of scanning electrodes (Y1-Y6) formed on one of the substrates,
       a group of signal electrodes (X1-X6) formed on the other of the substrates, the signal electrodes being arranged to cross the scanning electrodes such as to form respective pixels at each crossing point,
       voltage generating means for generating various voltages comprising selective, non-selective, lighting and non-lighting voltages,
       timing signal generating means for generating timing signals,
       a scanning electrode driving circuit (205) for successively and cyclically selecting each scanning electrode by applying, in response to said voltages from said voltage generating means and said timing signals, respective periodic scanning voltage waveforms to said scanning electrodes (Y1-Y6), each scanning voltage waveform being composed of a selective voltage portion and a non-selective voltage portion, the selective voltage portions of the scanning voltage waveforms being time shifted with respect to each other,
       a signal electrode driving circuit (208) for applying, in response to said voltages from said voltage generating means, said timing signals and a data signal, respective signal voltage waveforms to said signal electrodes (X1-X6), the signal voltage waveforms comprising lighting and/or non-lighting voltage portions depending on said data signal,and
       means (105) for periodically changing said voltages such as to invert the polarity of the voltage difference created between each scanning electrode and each signal electrode in response to the application of said scanning voltage and signal voltage waveforms,
       characterized by correction means (104, 105) for superposing a correction voltage waveform to said scanning voltage and/or said signal voltage waveforms each time the polarity of said voltage difference is inverted, said correction voltage waveform being selected to compensate for distortions of the voltage waveforms actually effective on the pixels which distortions are caused by parasitic impedances of the liquid crystal display unit.
  2. The display unit of claim 1, wherein said correction means controls said correction voltage waveform depending on the graphic or character pattern displayed on said liquid crystal display unit.
  3. The display unit of claim 1 or 2, wherein the correction voltage waveform causes a change of the selective voltage portion of the scanning voltage waveform applied to the scanning electrode which is the first to be selected after said polarity inversion of the voltage difference.
  4. The display unit according to any one of the preceding claims, wherein a correction voltage waveform controlled depending on the graphic or character pattern displayed on said liquid crystal display unit is superposed each time said scanning voltage waveforms change to shift selection from one scanning electrode to the next scanning electrode.
  5. The display unit of claim 4, wherein the correction voltage waveform causes a change of the selective voltage portion of the scanning voltage waveform applied to the newly selected scanning electrode.
  6. The display unit of any one of the preceding claims, wherein the correction voltage waveform causes a change in the non-selective voltage portion of a scanning voltage waveform applied to a scanning electrode which is selected immediately before said polarity inversion and not selected immediately after the polarity inversion.
EP90102490A 1989-02-23 1990-02-08 Liquid crystal display unit Expired - Lifetime EP0384229B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP43478/89 1989-02-23
JP4347889 1989-02-23

Publications (2)

Publication Number Publication Date
EP0384229A1 EP0384229A1 (en) 1990-08-29
EP0384229B1 true EP0384229B1 (en) 1995-05-10

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
EP90102490A Expired - Lifetime EP0384229B1 (en) 1989-02-23 1990-02-08 Liquid crystal display unit

Country Status (4)

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EP (1) EP0384229B1 (en)
KR (1) KR940002294B1 (en)
DE (1) DE69019196T2 (en)
HK (1) HK103197A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3020228B2 (en) * 1989-12-07 2000-03-15 セイコーエプソン株式会社 Liquid crystal display
US5214417A (en) * 1987-08-13 1993-05-25 Seiko Epson Corporation Liquid crystal display device
JP3992776B2 (en) * 1997-02-27 2007-10-17 シチズンホールディングス株式会社 Driving circuit for liquid crystal display device
US6693613B2 (en) * 2001-05-21 2004-02-17 Three-Five Systems, Inc. Asymmetric liquid crystal actuation system and method
DE10162766A1 (en) * 2001-12-20 2003-07-03 Koninkl Philips Electronics Nv Circuit arrangement for the voltage supply of a liquid crystal display device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6231825A (en) * 1985-08-02 1987-02-10 Hitachi Ltd Driving circuit for liquid crystal displaying device

Also Published As

Publication number Publication date
DE69019196T2 (en) 1995-11-02
KR940002294B1 (en) 1994-03-21
HK103197A (en) 1997-08-15
DE69019196D1 (en) 1995-06-14
KR900013448A (en) 1990-09-05
EP0384229A1 (en) 1990-08-29

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