EP0353438A1 - In motion setting device for radio controlled sirens working in accordance with different programs - Google Patents

In motion setting device for radio controlled sirens working in accordance with different programs Download PDF

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Publication number
EP0353438A1
EP0353438A1 EP89111144A EP89111144A EP0353438A1 EP 0353438 A1 EP0353438 A1 EP 0353438A1 EP 89111144 A EP89111144 A EP 89111144A EP 89111144 A EP89111144 A EP 89111144A EP 0353438 A1 EP0353438 A1 EP 0353438A1
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EP
European Patent Office
Prior art keywords
block
output
siren
clock
bit
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EP89111144A
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German (de)
French (fr)
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EP0353438B1 (en
Inventor
Günter Luber
Wolfgang Heuer
Hans Otto Maly
Uwe Mätzold
Rudolf Messerschmidt
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Blaupunkt Werke GmbH
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Blaupunkt Werke GmbH
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Priority to AT89111144T priority Critical patent/ATE83576T1/en
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    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B1/00—Systems for signalling characterised solely by the form of transmission of the signal
    • G08B1/08—Systems for signalling characterised solely by the form of transmission of the signal using electric transmission ; transformation of alarm signals to electrical signals from a different medium, e.g. transmission of an electric alarm signal upon detection of an audible alarm signal
    • G—PHYSICS
    • G08—SIGNALLING
    • G08B—SIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B27/00—Alarm systems in which the alarm condition is signalled from a central station to a plurality of substations
    • G08B27/008—Alarm systems in which the alarm condition is signalled from a central station to a plurality of substations with transmission via TV or radio broadcast

Definitions

  • the invention relates to the field of siren control.
  • the wireless control of the sirens takes place via a signal which is transmitted as amplitude modulation of a 57 kHz subcarrier in an FM radio transmitter signal and can be received with any radio tuner.
  • the remote control transmitter is set with a radio tuner 27.
  • a playback amplifier 28 is connected to the radio tuner and to this a loudspeaker 29.
  • an output of the IF stage of the radio tuner 27 is connected to a 57 kHz filter (26), to the output of which a radio data signal decoder 25 is connected for demodulating the control signal from the subcarrier amplitude, which decoder 25 has an amplitude demodulator, a bit clock regenerator and a block de coder 12 includes.
  • the amplitude demodulator supplies the bit stream for the block decoder 12.
  • the block decoder 12 has a 16 bit wide signal output. Furthermore, a block clock bus 14 and a block number bus 15 are connected to corresponding further outputs of the block decoder 12. These two bus lines control four clock gates 24, 22, 17, 7, of which the clock gate 24 assigned to the first block clock supplies the reset pulse for all memories and flip-flops in the device, while a further clock gate 22 assigned to the second block clock takes over signals in controls three flip-flops 19, 20, 21 and the two other clock gates 17 and 7 assigned to the third and fourth block clocks cause signals to be taken into and out of the memories of the device.
  • the control signal for the first flip-flop 20 provides the lowest significant bit (LSB) output in the 16-bit wide signal output of the block decoder 12, the control signal for the second flip-flop 21 the output of the block decoder, which is adjacent to the LSB output, and that Control signal for the third flip-flop 19 and switching, which is connected on the input side to the most significant bit (MSB) output and its four adjacent bit outputs of the block decoder 12.
  • LSB lowest significant bit
  • MSB most significant bit
  • the 16 signal outputs of the block decoder 12 are connected to the signal inputs of a 16-bit-wide buffer store 11 for the encrypted siren address.
  • the signal transfer is triggered via gate 17.
  • one half of the signal outputs of the block decoder which also includes the MSB output, is connected to the signal inputs of an 8-bit-wide memory 13 for the keyword.
  • the signal transfer to this buffer 4 is controlled by the clock gate 7.
  • the 16 outputs of the buffer memory 11 and the 8 outputs of the memory 13 are connected to a corresponding number of signal inputs of an address decoder circuit 10, the 16-bit wide output of which is connected to the corresponding 16-bit wide signal input of a comparison circuit 8.
  • the second information for the comparison circuit is provided by an address memory 9, in which the predetermined 16-bit address of the connected siren is permanently stored.
  • a takeover gate 5 in the takeover input of the final memory 3 is prepared for the block clock pulse from the clock gate 7 via the delay circuit 6 via the coincidence output of the comparison circuit.
  • the signal inputs of this 8-bit-wide final memory 3 take over the information about the siren program to be triggered from the buffer memory 4 when the address of the connected siren program unit 1 is recognized in the received signal in the comparison circuit.
  • the command stored in the final memory 3 now determines the Sequence of switching the siren on and off.
  • a reset pulse is returned from program unit 1 to the reset input of final memory 3.
  • a digital converter 2 is to be inserted between the final memory 3 and the program unit 1, which converts the received 8-bit-wide digital signal into an assigned control signal of the program unit 1.
  • the first data block of each sample contains the identifier of the transmitter.
  • the clock pulse assigned to the first block of the radio data signal for siren control triggers the reset of flip-flops 19, 20 and 21 and all buffers via clock gate 24.
  • the flip-flops 19, 20, 21 are set via the clock gate 22 when the block decoder 12 has signals ready at the outputs to which flip-flops are connected.
  • the signals of this third block present at the block decoder outputs are transferred to the buffer memory 11 via the clock gate 17 if the flip-flop 21 has not been set in the preceding clock.
  • the signals at one half of the outputs of the block decoder 12, which also include the MSB output, are taken over as a keyword in the buffer memory 13 and the signals at the other Outputs of the block decoder as the triggering siren program in the buffer memory 4.
  • the content of the buffer store 4, which is designated as a siren program command is transferred to the final store 3 and thus the siren sequence is triggered.
  • the buffers and flip-flops are then reset with the first block of the next group.
  • the final memory 3 receives a reset pulse only when the program unit 1 indicates the end of the triggered siren switching sequence.
  • a switch 30 for the loud switching is provided in front of the LF reproduction amplifier 28, the control input of which is connected to the output of the takeover gate 5.
  • the 16 signal outputs of the block decoder 12 are connected to two intermediate memories 11 and 31 each having 16-bit-wide inputs.
  • the buffer store 11 records the information present in the third block cycle at the outputs of the block decoder
  • the buffer store 31 stores the data present in the fourth block cycle at the outputs of the block decoder 12.
  • the takeover input of the buffer store 31 is connected to the output of the clock gate 7.
  • the memory 13 is in turn connected to a timer 32.
  • This timer 32 e.g. B. a radio clock, calls in the memory 13 for one time unit an assigned keyword stored there.
  • both the siren address and that can be triggered transmit siren program from the 32-bit data word contained in the buffers 11 and 31 to decrypt.
  • the address word is compared with the address of the siren contained in the address memory 9, while the command for the siren program to be triggered is transferred to the buffer memory 4, which for this purpose is connected on the input side to six outputs of the decoder circuit 10.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Business, Economics & Management (AREA)
  • Emergency Management (AREA)
  • Alarm Systems (AREA)
  • Circuits Of Receivers In General (AREA)
  • Selective Calling Equipment (AREA)

Abstract

A programming unit (1) for ON-OFF switching of a siren or similar warning device can be provided with remote actuation capability by connecting it to a radio receiver tuner (27) and radio data signal decoder (25). The output of the signal decoder (25) is connected to a block decoder (12). Some of the block decoder outputs are connected to a comparison circuit (8) which attempts to match a broadcast siren address with a stored address uniquely identifying the associated siren program unit (1). In the event of a match, a set of flip-flops and gates controls loading of information at other block decoder outputs into a siren program buffer memory (4) and then into an end memory (3) attached to and controlling the program unit (1). After a siren program is performed, end memory (3) is reset.

Description

Die Erfindung betrifft das Gebiet der Sirenensteuerung.The invention relates to the field of siren control.

Sirenen werden je nach der Art der Gefahr, auf welche die Bevölke­rung hingewiesen werden muß, in unterschiedlichen Sequenzen ein- und ausgeschaltet. Im Zuge der Modernisierung der Sirenenanlagen stellte sich die Aufgabe der drahtlosen Fernsteuerung der Sirenen.Sirens are switched on and off in different sequences depending on the type of danger to which the population must be warned. In the course of the modernization of the siren systems, the task of wireless remote control of the sirens arose.

Diese Aufgabe läßt sich mit der im Anspruch 1 gekennzeichneten Ein­richtung lösen.
Mit den weiteren Ansprüchen sind Weiterbildungen der Erfindung ge­kennzeichnet.This object can be achieved with the device characterized in claim 1.
Further developments of the invention are characterized by the further claims.

Anhand der Blockschaltbilder werden zwei Ausführungsbeispiele der Erfindung erläutert.Two exemplary embodiments of the invention are explained on the basis of the block diagrams.

In beiden Ausführungsbeispielen erfolgt die drahtlose Fernsteuerung der Sirenen über ein Signal, das als Amplitudenmodulation eines 57-kHz-Hilfsträgers in einem UKW-Rundfunksendersignal übertragen wird und mit jedem Rundfunktuner empfangbar ist.In both exemplary embodiments, the wireless control of the sirens takes place via a signal which is transmitted as amplitude modulation of a 57 kHz subcarrier in an FM radio transmitter signal and can be received with any radio tuner.

Mit einem Rundfunktuner 27 wird der Fernsteuersender eingestellt. Für die Wiedergabe der Hörrundfunksendung, die das Einschaltsignal für die Sirenen im Notfall begleitet, ist an den Rundfunktuner ein Wiedergabeverstärker 28 und an diesen ein Lautsprecher 29 angeschlos­sen.The remote control transmitter is set with a radio tuner 27. For the reproduction of the radio broadcast, which accompanies the switch-on signal for the sirens in an emergency, a playback amplifier 28 is connected to the radio tuner and to this a loudspeaker 29.

Für die Fernsteuerung der Sirene ist ein Ausgang der ZF-Stufe des Rundfunktuners 27 mit einem 57-kHz-Filter (26) verbunden, an dessen Ausgang zur Demodulation des Steuersignals von der Hilfsträgerampli­tude ein Radiodatensignaldecoder 25 angeschlossen ist, der einen Amplitudendemodulator, einen Bittaktregenerator und einen Blockde­ coder 12 umfaßt. Der Amplitudendemodulator liefert den Bitstrom für den Blockdecoder 12. Dieser Aufbau des Radiodatensignaldecoders 25 ist allgemein bekannt.For remote control of the siren, an output of the IF stage of the radio tuner 27 is connected to a 57 kHz filter (26), to the output of which a radio data signal decoder 25 is connected for demodulating the control signal from the subcarrier amplitude, which decoder 25 has an amplitude demodulator, a bit clock regenerator and a block de coder 12 includes. The amplitude demodulator supplies the bit stream for the block decoder 12. This structure of the radio data signal decoder 25 is generally known.

Der Blockdecoder 12 verfügt über einen 16 Bit breiten Signalausgang. Ferner ist an entsprechenden weiteren Ausgängen des Blockdecoders 12 ein Blocktaktbus 14 und ein Blocknummernbus 15 angeschlossen. Diese beiden Busleitungen steuern vier Takttore 24, 22, 17, 7, von denen das dem ersten Blocktakt zugeordnete Takttor 24 den Resetimpuls für alle Speicher und Flipflops in der Einrichtung liefert, während ein weiteres, dem zweiten Blocktakt zugeordnetes Takttor 22 die Übernah­me von Signalen in drei Flipflops 19, 20, 21 steuert und die beiden übrigen dem dritten und dem vierten Blocktakt zugeordneten Takt­tore 17 und 7 die Übernahme von Signalen in die und aus den Speichern der Einrichtung bewirken.The block decoder 12 has a 16 bit wide signal output. Furthermore, a block clock bus 14 and a block number bus 15 are connected to corresponding further outputs of the block decoder 12. These two bus lines control four clock gates 24, 22, 17, 7, of which the clock gate 24 assigned to the first block clock supplies the reset pulse for all memories and flip-flops in the device, while a further clock gate 22 assigned to the second block clock takes over signals in controls three flip-flops 19, 20, 21 and the two other clock gates 17 and 7 assigned to the third and fourth block clocks cause signals to be taken into and out of the memories of the device.

Das Stellsignal für den ersten Flipflop 20 liefert der Lowest Significant Bit (LSB-)Ausgang im 16-Bit-breiten Signalausgang des Blockdecoders 12, das Stellsignal für das zweite Flipflop 21 der Ausgang des Blockdecoders, der dem LSB-Ausgang benachbart ist, und das Stellsignal für das dritte Flipflop 19 eine Undschaltung, die eingangsseitig an den Most Significant Bit (MSB-)Ausgang und dessen vier benachbarte Bitausgänge des Blockdecoders 12 angeschlossen ist.The control signal for the first flip-flop 20 provides the lowest significant bit (LSB) output in the 16-bit wide signal output of the block decoder 12, the control signal for the second flip-flop 21 the output of the block decoder, which is adjacent to the LSB output, and that Control signal for the third flip-flop 19 and switching, which is connected on the input side to the most significant bit (MSB) output and its four adjacent bit outputs of the block decoder 12.

Die vom Reset-Impuls direkt steuerbaren Ausgänge der beiden Flip­flops 19, 20 und der vom Reset-Impuls indirekt steuerbare Ausgang des dritten Flipflops 21 sind in einem Undtor 18 zusammengeführt, welches über dem Freigabebus 16 die bereits erwähnte Übernahme von Signalen in die Zwischenspeicher der Einrichtung vorbereitet.The outputs of the two flip-flops 19, 20, which can be controlled directly by the reset pulse, and the output of the third flip-flop 21, which can be controlled indirectly by the reset pulse, are brought together in an undortor 18 which, via the enable bus 16, transfers the signals already mentioned into the buffer of the device prepared.

Im ersten Ausführungsbeispiel, das in dem ersten Blockschaltbild Figur 1 dargestellt ist, sind die 16 Signalausgänge des Blockdeco­ders 12 mit den Signaleingängen eines 16-Bit-breiten Zwischenspei­chers 11 für die verschlüsselte Sirenenadresse verbunden. Die Sig­nalübernahme wird über das Tor 17 ausgelöst.In the first exemplary embodiment, which is shown in the first block diagram in FIG. 1, the 16 signal outputs of the block decoder 12 are connected to the signal inputs of a 16-bit-wide buffer store 11 for the encrypted siren address. The signal transfer is triggered via gate 17.

Parallel hierzu ist die eine Hälfte der Signalausgänge des Blockde­coders, die den MSB-Ausgang mit umfaßt, mit den Signaleingängen eines 8-Bit-breiten Speichers 13 für das Schlüsselwort verbunden. Die andere Hälfte der Signalausgänge des Blockdecoders 12, die den LSB-Ausgang mit umfaßt, ist mit einem 8-Bit-breiten Zwischenspei­cher 4 für das auszulösende Sirenenprogramm verbunden. Die Signal­übernahme in diesen Zwischenspeicher 4 wird vom Takttor 7 gesteuert.In parallel, one half of the signal outputs of the block decoder, which also includes the MSB output, is connected to the signal inputs of an 8-bit-wide memory 13 for the keyword. The other half of the signal outputs of the block decoder 12, which includes the LSB output, is connected to an 8-bit-wide buffer 4 for the siren program to be triggered. The signal transfer to this buffer 4 is controlled by the clock gate 7.

Die 16 Ausgänge des Zwischenspeichers 11 und die 8 Ausgänge des Speichers 13 sind an entsprechend viele Signaleingänge einer Adressenentschlüsslerschaltung 10 angeschlossen, deren 16-Bit-brei­ter Ausgang mit den entspechenden 16-Bit-breiten Signaleingang einer Vergleichsschaltung 8 verbunden ist. Die zweite Information für die Vergleichsschaltung liefert ein Adressenspeicher 9, in dem die vorgegebene 16-Bit-breite Adresse der angeschlossenen Sirene fest gespeichert ist.The 16 outputs of the buffer memory 11 and the 8 outputs of the memory 13 are connected to a corresponding number of signal inputs of an address decoder circuit 10, the 16-bit wide output of which is connected to the corresponding 16-bit wide signal input of a comparison circuit 8. The second information for the comparison circuit is provided by an address memory 9, in which the predetermined 16-bit address of the connected siren is permanently stored.

Stimmt die Adresse am Ausgang der Entschlüsslerschaltung 10 mit der Adresse im Adressenspeicher überein, dann wird über den Koinzidenz­ausgang der Vergleichsschaltung ein Übernahmetor 5 im Übernahmeein­gang des Endspeichers 3 für den über die Verzögerungsschaltung 6 ge­leiteten Blocktaktimpuls aus dem Takttor 7 vorbereitet.If the address at the output of the decoder circuit 10 matches the address in the address memory, then a takeover gate 5 in the takeover input of the final memory 3 is prepared for the block clock pulse from the clock gate 7 via the delay circuit 6 via the coincidence output of the comparison circuit.

Die Signaleingänge dieses 8-Bit-breiten Endspeichers 3 übernehmen die Information über das auszulösende Sirenenprogramm aus dem Zwi­schenspeicher 4, wenn die Adresse der angeschlossenen Sirenenpro­grammeinheit 1 im empfangenen Signal in der Vergleichsschaltung er­kannt ist. Der im Endspeicher 3 abgelegte Befehl bestimmt nun die Sequenz des Ein- und Ausschaltens der Sirene. Am Ende jedes Sirenen­programms wird ein Reset-Impuls von der Programmeinheit 1 auf den Reset-Eingang des Endspeichers 3 zurückgeführt.The signal inputs of this 8-bit-wide final memory 3 take over the information about the siren program to be triggered from the buffer memory 4 when the address of the connected siren program unit 1 is recognized in the received signal in the comparison circuit. The command stored in the final memory 3 now determines the Sequence of switching the siren on and off. At the end of each siren program, a reset pulse is returned from program unit 1 to the reset input of final memory 3.

Wenn die beschriebene Einrichtung an eine vorhandene Sirene ange­schlossen werden soll, ist zwischen dem Endspeicher 3 und der Pro­grammeinheit 1 noch ein Digitalwandler 2 einzufügen, der das emp­fangene 8-Bit-breite Digitalsignal in ein zugeordnetes Steuersignal der Programmeinheit 1 umsetzt.If the device described is to be connected to an existing siren, a digital converter 2 is to be inserted between the final memory 3 and the program unit 1, which converts the received 8-bit-wide digital signal into an assigned control signal of the program unit 1.

Aufgrund der Festlegungen für die Übertragung von Radiodatensignalen enthält der erste Datenblock jeder Probe das Kennzeichen des Senders. In der beschriebenen Einrichtung ist die Kenntnisnahme des Senderkennzeichens jedoch nicht erforderlich, da die Sirenensteue­rung in der Regel auf den vorgegebenen Warnsender im UKW-Bereich fest abgestimmt ist. Daher löst der dem ersten Block des Radiodaten­signals für die Sirenensteuerung zugeordnete Taktimpuls über das Takttor 24 den Reset der Flipflops 19, 20 und 21 sowie alle Zwischenspeicher aus.Due to the stipulations for the transmission of radio data signals, the first data block of each sample contains the identifier of the transmitter. In the device described, however, it is not necessary to take note of the transmitter identification, since the siren control is generally firmly matched to the specified warning transmitter in the FM range. Therefore, the clock pulse assigned to the first block of the radio data signal for siren control triggers the reset of flip-flops 19, 20 and 21 and all buffers via clock gate 24.

Mit dem dem zweiten Block zugeordneten Taktimpuls werden die Flip­flops 19, 20, 21 über das Takttor 22 gesetzt, wenn der Blockdeco­der 12 an den Ausgängen, mit denen Flipflops verbunden sind, Signale bereithält.With the clock pulse assigned to the second block, the flip-flops 19, 20, 21 are set via the clock gate 22 when the block decoder 12 has signals ready at the outputs to which flip-flops are connected.

Mit dem dem dritten Block zugeordneten Taktimpuls werden die an den Blockdecoderausgängen anstehenden Signale dieses dritten Blocks über das Takttor 17 in den Zwischenspeicher 11 übernommen, falls im vor­ausgehenden Takt der Flipflop 21 nicht gesetzt worden ist.With the clock pulse assigned to the third block, the signals of this third block present at the block decoder outputs are transferred to the buffer memory 11 via the clock gate 17 if the flip-flop 21 has not been set in the preceding clock.

Über das Takttor 7 werden mit dem dem vierten Block zugeordneten Taktimpuls die Signale an der einen Hälfte der Ausgänge des Block­decoders 12, die den MSB-Ausgang mit umfassen, als Schlüsselwort in den Zwischenspeicher 13 übernommen und die Signale an den anderen Ausgängen des Blockdecoders als das auslösende Sirenenprogramm in den Zwischenspeicher 4.Via the clock gate 7 with the clock pulse assigned to the fourth block, the signals at one half of the outputs of the block decoder 12, which also include the MSB output, are taken over as a keyword in the buffer memory 13 and the signals at the other Outputs of the block decoder as the triggering siren program in the buffer memory 4.

Steht nach dem vierten Blocktakt die richtige Adresse am Ausgang der Adressenentschlüsslerschaltung 10, dann wird mit dem über die Verzögerungsleitung 6 gelaufenen vierten Blocktakt der als Sire­nenprogrammbefehl ausgewiesene Inhalt des Zwischenspeichers 4 in den Endspeicher 3 übernommen und damit die Sirenensequenz ausgelöst.If after the fourth block cycle the correct address is at the output of the address decoder circuit 10, then with the fourth block cycle that has passed through the delay line 6, the content of the buffer store 4, which is designated as a siren program command, is transferred to the final store 3 and thus the siren sequence is triggered.

Mit dem ersten Block der nächstfolgenden Gruppe werden dann die Zwi­schenspeicher und Flipflops wieder zurückgesetzt. Der Endspeicher 3 erhält dagegen einen Rücksetzimpuls erst, wenn die Programmeinheit 1 das Ende der ausgelösten Sirenenschaltsequenz anzeigt.The buffers and flip-flops are then reset with the first block of the next group. The final memory 3, on the other hand, receives a reset pulse only when the program unit 1 indicates the end of the triggered siren switching sequence.

Erfolgt die Aussendung eines Einschaltbefehls für die Sirenen mit einem normalen Hörrundfunkprogrammsender, so kann die Wiedergabe des normalen Hörfunkprogramms unerwünscht sein. Für diesen Fall ist vor dem NF-Wiedergabeverstärker 28 ein Schalter 30 für die Lautschaltung vorgesehen, dessen Steuereingang mit dem Ausgang des Übernahmetors 5 verbunden ist.If the transmission of a switch-on command for the sirens is carried out with a normal radio broadcasting program transmitter, the reproduction of the normal radio broadcasting program may be undesirable. In this case, a switch 30 for the loud switching is provided in front of the LF reproduction amplifier 28, the control input of which is connected to the output of the takeover gate 5.

In dem in Figur 2 dargestellten zweiten Ausführungsbeispiel sind die 16 Signalausgänge des Blockdecoders 12 mit zwei je 16-Bit-breiten Eingänge aufweisenden Zwischenspeichern 11 und 31 verbunden. Während der Zwischenspeicher 11 wie im ersten Ausführungsbeispiel die im dritten Blocktakt an den Ausgängen des Blockdecoders anliegenden In­formationen aufnimmt, speichert der Zwischenspeicher 31 die im vier­ten Blocktakt an den Ausgängen des Blockdecoders 12 anliegenden Da­ten. Dazu ist der Übernahmeeingang des Zwischenspeichers 31 mit dem Ausgang des Takttores 7 verbunden. Der Speicher 13 ist seinerseits an einen Zeitgeber 32 angeschlossen. Dieser Zeitgeber 32, z. B. eine Funkuhr, ruft in dem Speicher 13 für jeweils eine Zeiteinheit ein zugeordnetes, dort abgelegtes Schlüsselwort auf. Mit diesem Schlüsselwort ist sowohl die Sirenenadresse als auch das auszulö­ sende Sirenenprogramm aus den in den Zwischenspeichern 11 und 31 enthaltenen 32-Bit-breiten Datenwort zu entschlüsseln. In dem Vergleicher 8 wird das Adressenwort mit der im Adressenspeicher 9 enthaltenen Adresse der Sirene verglichen, während der Befehl für das auszulösende Sirenenprogramm in den Zwischenspeicher 4 über­nommen wird, der dazu im zweiten Ausführungsbeispiel eingangsseitig an sechs Ausgängen der Entschlüsslerschaltung 10 angeschlossen ist.In the second exemplary embodiment shown in FIG. 2, the 16 signal outputs of the block decoder 12 are connected to two intermediate memories 11 and 31 each having 16-bit-wide inputs. While the buffer store 11, as in the first exemplary embodiment, records the information present in the third block cycle at the outputs of the block decoder, the buffer store 31 stores the data present in the fourth block cycle at the outputs of the block decoder 12. For this purpose, the takeover input of the buffer store 31 is connected to the output of the clock gate 7. The memory 13 is in turn connected to a timer 32. This timer 32, e.g. B. a radio clock, calls in the memory 13 for one time unit an assigned keyword stored there. With this keyword both the siren address and that can be triggered transmit siren program from the 32-bit data word contained in the buffers 11 and 31 to decrypt. In the comparator 8, the address word is compared with the address of the siren contained in the address memory 9, while the command for the siren program to be triggered is transferred to the buffer memory 4, which for this purpose is connected on the input side to six outputs of the decoder circuit 10.

Die Weiterverarbeitung des im Zwischenspeicher 4 für das Sirenen­programm abgelegten Befehls und des Ausgangssignals des Vergleich­ers 8 erfolgt auch im zweiten Ausführungsbeispiel entsprechend dem ersten Ausführungsbeispiel.The further processing of the command stored in the buffer 4 for the siren program and the output signal of the comparator 8 also takes place in the second exemplary embodiment in accordance with the first exemplary embodiment.

Claims (5)

1. Einrichtung zur drahtlosen Ferneinschaltung von Sierenenpro­grammen,
dadurch gekennzeichnet,
- daß eine die Sirenenprogrammme enthaltende Programmein­heit (1) an einen Endspeicher (3) angeschlossen ist,
- daß dem Endspeicher (3) ein Zwischenspeicher (4) für das auszulösende Sirenenprogramm und ein Übernahmetor (5) vor­geschaltet sind,
- daß der erste Steuereingang des Übernahmetores (5) über ein Zeitglied (6) mit einem dem vierten Blocktakt zugeord­neten Takttor (7) und der zweite Steuereingang mit dem Koinzidenzausgang einer Vergleichsschaltung (8) verbunden sind,
- daß die Vergleichsschaltung eingangsseitig an einen Adres­senspeicher (9) und an einen Ausgang einer Adressenent­schlüsslerschaltung (10) angeschlossen ist,
- daß der erste Signaleingang der Adressenentschlüssler­schaltung (10) über einen Zwischenspeicher (11, 31 ) für die Sirenenadresse mit dem Ausgang eines Blockdecoders (12) und der zweite Signaleingang der Adressenentschlüssler­schaltung (10) mit einem Speicher (13) für das Schlüssel­wort verbunden ist,
- daß der Übernahmeeingang des Zwischenspeichers (4) für das Sirenenprogramm und der Übernahmeeingang des Spei­chers (13) für das Schlüsselwort an den Ausgang des dem vierten Blocktakt zugeordneten Takttores (7) angeschlossen sind,
- daß ein Übernahmeeingang des Zwischenspeichers (11) für die Sirenenadresse an ein dem dritten Blocktakt zu­geordnetes Takttor (17) angeschlossen ist,
- daß die Eingänge aller Takttore (7 und 17) mit dem Block­taktbus (14) und dem Blocknummernbus (15) und die dem dritten und vierten Blocktakt zugeordneten zusätzlich mit einem Freigabebus (16) verbunden sind,
- daß der Freigabebus (16) selbst an ein Undtor (18) ange­schlossen ist, dessen Signaleingänge mit den Ausgängen von drei Flipflops (19, 20, 21) verbunden sind, von denen der erste Flipflop (19) mit dem MSB-Ausgang und vier be­nachbarten Ausgängen des Blockdecoders, der zweite Flip­flop (20) mit dem LSB-Ausgang des Blockdecoders (12) und der dritte Flipflop (21) mit dem diesem Ausgang direkt benachbarten Ausgang des Blockdecoders verbunden sind,
- daß die Übernahmeeingänge aller drei Flipflops an ein dem zweiten Blocktakt zugeordnetes Takttor (22) angeschlossen sind,
- daß der Resetbus (23) für alle Speicher und alle Flipflops an ein dem ersten Blocktakt zugeordnetes Takttor (24) angeschlossen ist,
- und daß der Blockdecoder (12) Teil eines RDS-Radiodaten­signaldecoders (25) ist, der seinerseits mit dem 57-kHz-­Hilfsträgerausgang eines UKW-Rundfunkempfängers (27) ver­bunden ist.1. device for wireless remote activation of kidney programs,
characterized,
- That a program unit (1) containing the siren programs is connected to an end memory (3),
- That the final memory (3), a buffer (4) for the siren program to be triggered and a transfer gate (5) are connected upstream,
- That the first control input of the takeover gate (5) are connected via a timing element (6) to a clock gate (7) assigned to the fourth block clock and the second control input is connected to the coincidence output of a comparison circuit (8),
- That the comparison circuit is connected on the input side to an address memory (9) and to an output of an address decoder circuit (10),
- That the first signal input of the address decoder circuit (10) via a buffer (11, 31) for the siren address with the output of a block decoder (12) and the second signal input of the address decoder circuit (10) is connected to a memory (13) for the keyword,
- That the takeover input of the buffer (4) for the siren program and the takeover input of the memory (13) for the keyword are connected to the output of the clock gate (7) assigned to the fourth block clock,
- That a takeover input of the buffer (11) for the siren address is connected to a clock gate (17) assigned to the third block clock,
- That the inputs of all clock gates (7 and 17) with the block clock bus (14) and the block number bus (15) and those assigned to the third and fourth block clock are additionally connected to an enable bus (16),
- That the release bus (16) itself is connected to an undtor (18), whose signal inputs are connected to the outputs of three flip-flops (19, 20, 21), of which the first flip-flop (19) with the MSB output and four adjacent outputs of the block decoder, the second flip-flop (20) are connected to the LSB output of the block decoder (12) and the third flip-flop (21) are connected to the output of the block decoder directly adjacent to this output,
- That the take-over inputs of all three flip-flops are connected to a clock gate (22) assigned to the second block clock,
- That the reset bus (23) for all memories and all flip-flops is connected to a clock gate (24) assigned to the first block clock,
- And that the block decoder (12) is part of an RDS radio data signal decoder (25), which in turn is connected to the 57 kHz subcarrier output of an FM radio receiver (27). 2. Einrichtung nach Anspruch 1,
dadurch gekennzeichnet,
daß der Zwischenspeicher (4) für das auszulösende Sirenenpro­gramm eingangsseitig mit einem das MS-Bit umfassenden Teil der Ausgänge des Blockdecoders (12) und der Speicher für das Schlüsselwort (13) eingangsseitig mit dem anderen Teil der Aus­gänge des Blockdecoders (12) verbunden ist,
und daß die Übernahmeeingänge beider Zwischenspeicher an das dem vierten Blocktakt zugeordnete Takttor (7) angeschlossen sind.2. Device according to claim 1,
characterized,
that the buffer (4) for the siren program to be triggered is connected on the input side to a part of the outputs of the block decoder (12) comprising the MS bit and the memory for the keyword (13) is connected on the input side to the other part of the outputs of the block decoder (12),
and that the transfer inputs of both buffers are connected to the clock gate (7) assigned to the fourth block clock. 3. Einrichtung nach Anspruch 2,
dadurch gekennzeichnet,
- daß einer die Sirenenprogramme enthaltenden Programmein­heit (1) ein Digitalwandler (2) vorgeschaltet ist, dessen Signaleingang mit einem 8 Bit breiten Ausgang eines Endspeichers (3) verbunden ist,
- daß dem Endspeicher (3) ein 8 Bit breiter erster Zwischen­speicher (4) und ein Übernahmetor (5) vorgeschaltet sind, dessen erster Steuereingang über ein Zeitglied (6) mit einem ersten Takttor (7) und dessen zweiter Steuereingang mit dem Koinzidenzausgang einer 16 Bit breiten Vergleichs­schaltung verbunden sind, die ihrerseits eingangsseitig an einen 16 Bit breiten Adressenspeicher (9) und an einen 16 Bit breiten Ausgang einer Adressenentschlüsslerschal­tung (10) angeschlossen ist,
- daß der erste 16 Bit breite Signaleingang der Adressenent­schlüsslerschaltung (10) über einen dritten Zwischenspei­cher (11) mit dem 16 Bit breiten Ausgang eines Blockdeco­ders (12) und der zweite 8 Bit breite Signaleingang der Adressenentschlüsslerschaltung (10) mit einem zweiten Zwi­schenspeicher (13) mit dem 8 Bit breiten, das MS-Bit um­fassenden einen Hälfte der Ausgänge der Blockdecoder (12) verbunden ist, während die 8 Bit breite das LS-Bit um­fassende Hälfte der Ausgänge des Blockdecoders (12) mit dem 8 Bit breiten Signaleingang des ersten Zwischenspei­chers (4) verbunden ist.3. Device according to claim 2,
characterized,
- That a program unit (1) containing the siren programs is preceded by a digital converter (2), the signal input of which is connected to an 8-bit output of an end memory (3),
- That the final memory (3) an 8 bit wide first buffer (4) and a transfer gate (5) are connected upstream, the first control input via a timing element (6) with a first clock gate (7) and the second control input with the coincidence output of a 16th Bit-wide comparison circuit are connected, which in turn is connected on the input side to a 16-bit address memory (9) and to a 16-bit output of an address decoder circuit (10),
- That the first 16 bit wide signal input of the address decoder circuit (10) via a third buffer (11) with the 16 bit wide output of a block decoder (12) and the second 8 bit wide signal input of the address decoder circuit (10) with a second buffer (13) is connected to the 8 bit wide, half of the outputs of the block decoder (12) comprising the MS bit, while the 8 bit wide half of the outputs of the block decoder (12) comprising the LS bit is connected to the 8 bit wide signal input of the first buffer (4) is connected. 4. Einrichtung nach Anspruch 1,
dadurch gekennzeichnet,
daß der Speicher für das Schlüsselwort (13) eingangsseitig mit einem Zeitgeber (32) verbunden ist und der Zwischenspeicher für das auszulösende Sirenenprogramm (4) eingangsseitig an einen Teil der Ausgänge der Adressenentschlüsslerschaltung (10) ange­schlossen ist.4. Device according to claim 1,
characterized,
that the memory for the keyword (13) is connected on the input side to a timer (32) and the buffer for the siren program (4) to be triggered is connected on the input side to a part of the outputs of the address decoder circuit (10). 5. Einrichtung nach einem der vorhergehenden Ansprüche,
dadurch gekennzeichnet,
daß der Schalteingang der Lautschaltung eines NF-Wiedergabever­stärkers (28) der einem die NE-Signale abgebenden Lautspre­cher (29) vorgeschaltet ist, mit dem Ausgang des ersten Über­nahmetores (5) verbunden ist.5. Device according to one of the preceding claims,
characterized,
that the switching input of the sound circuit of an LF reproduction amplifier (28) connected upstream of a loudspeaker (29) emitting the NE signals is connected to the output of the first transfer gate (5).
EP89111144A 1988-07-14 1989-06-20 In motion setting device for radio controlled sirens working in accordance with different programs Expired - Lifetime EP0353438B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT89111144T ATE83576T1 (en) 1988-07-14 1989-06-20 DEVICE FOR WIRELESS REMOTE SWITCHING ON OF DIFFERENT SIREN PROGRAMS.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3823824 1988-07-14
DE3823824A DE3823824C1 (en) 1988-07-14 1988-07-14

Publications (2)

Publication Number Publication Date
EP0353438A1 true EP0353438A1 (en) 1990-02-07
EP0353438B1 EP0353438B1 (en) 1992-12-16

Family

ID=6358629

Family Applications (1)

Application Number Title Priority Date Filing Date
EP89111144A Expired - Lifetime EP0353438B1 (en) 1988-07-14 1989-06-20 In motion setting device for radio controlled sirens working in accordance with different programs

Country Status (8)

Country Link
US (1) US4958154A (en)
EP (1) EP0353438B1 (en)
JP (1) JPH0287300A (en)
KR (1) KR930003449B1 (en)
AT (1) ATE83576T1 (en)
DE (2) DE3823824C1 (en)
DK (1) DK169493B1 (en)
ES (1) ES2037913T3 (en)

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EP0381937A2 (en) * 1989-02-06 1990-08-16 Blaupunkt-Werke GmbH Warning messages reproduction system

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US5296840A (en) * 1990-05-25 1994-03-22 Federal Signal Corporation Programmable emergency signalling system for a vehicle
GB9202865D0 (en) * 1992-02-12 1992-03-25 East Anglian Electronics Loudspeakers
AUPM282493A0 (en) * 1993-12-06 1994-01-06 Robert Bosch (Australia) Proprietary Ltd. A siren unit
WO2005013521A1 (en) * 2003-08-04 2005-02-10 Wouter Gort Method and device for initiating via rds/rbds a desired action related to an external event
FR2939230B1 (en) * 2008-12-02 2015-10-30 Finsecur MOBILE ALERT DEVICE

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GB2098833A (en) * 1981-04-03 1982-11-24 Altran Electronics Public alert and assistance systems
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Cited By (2)

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Publication number Priority date Publication date Assignee Title
EP0381937A2 (en) * 1989-02-06 1990-08-16 Blaupunkt-Werke GmbH Warning messages reproduction system
EP0381937A3 (en) * 1989-02-06 1992-08-05 Blaupunkt-Werke GmbH Warning messages reproduction system

Also Published As

Publication number Publication date
DK343189D0 (en) 1989-07-11
JPH0287300A (en) 1990-03-28
DK169493B1 (en) 1994-11-07
DE3823824C1 (en) 1989-10-19
ATE83576T1 (en) 1993-01-15
KR930003449B1 (en) 1993-04-29
EP0353438B1 (en) 1992-12-16
KR900002223A (en) 1990-02-28
ES2037913T3 (en) 1993-07-01
US4958154A (en) 1990-09-18
DK343189A (en) 1990-01-15
DE58903005D1 (en) 1993-01-28

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