EP0333353A2 - Dual mode voltage reference circuit and method - Google Patents
Dual mode voltage reference circuit and method Download PDFInfo
- Publication number
- EP0333353A2 EP0333353A2 EP89302113A EP89302113A EP0333353A2 EP 0333353 A2 EP0333353 A2 EP 0333353A2 EP 89302113 A EP89302113 A EP 89302113A EP 89302113 A EP89302113 A EP 89302113A EP 0333353 A2 EP0333353 A2 EP 0333353A2
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- EP
- European Patent Office
- Prior art keywords
- voltage
- trimming
- reference voltage
- interrupt
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
Definitions
- This invention relates to voltage reference circuits, and more particularly to voltage reference circuits and methods in which the user can select between a trimmable, internally generated reference voltage, and an externally applied reference voltage.
- the object of the present invention is to provide a voltage reference circuit and method which is capable of supplying either an internally or an externally generated voltage, and of trimming the internally generated voltage, with only two pins.
- This object is accomplished by connecting an internal, trimmable reference voltage source within a voltage reference circuit in circuit with a voltage reference terminal, and connecting a trimming terminal to apply a trimming voltage to the reference voltage source.
- An interrupt circuit is provided which responds to an interrupt voltage at the trimming terminal, the interrupt voltage being within a range outside of the trimming voltage range, to interrupt the connection between the internal reference voltage source and the voltage reference terminal. This in turn enables the application of an externally generated reference voltage to the voltage reference terminal.
- a trimmed, internally generated reference voltage is supplied when a trimming voltage is present at the trimming terminal, while the voltage reference terminal serves to input an externally applied reference voltage when a non-trimming voltage level is applied to the trimming terminal.
- the internal reference voltage source is connected to the output terminal by means of a switch.
- the switch is actuated to disconnect the internal reference voltage source from the output terminal in response to an interrupt voltage level at the trimming terminal.
- the interrupt voltage is within an interrupt range that is greater in absolute magnitude than the voltages within the trimming voltage range.
- the interrupt voltage range may be made to fit the supply voltage level.
- the invention thus provides a dual mode voltage reference that uses only two pins: in one mode a trimmed, internally generated reference voltage is supplied, while in the other mode an externally generated voltage is supplied to the internal circuit.
- FIG. 1 A preferred embodiment of the invention is shown in FIG. 1. It employs only two pins, represented as voltage terminal 2 and trimming terminal 4. These two terminals give the user the flexibility of using the internal reference voltage, trimmed or untrimmed, or connecting an external reference voltage to an internal digital-to-analog converter (DAC), ADC or other circuit requiring a reference voltage.
- DAC digital-to-analog converter
- FIG. 1 A preferred embodiment of the invention is shown in FIG. 1. It employs only two pins, represented as voltage terminal 2 and trimming terminal 4. These two terminals give the user the flexibility of using the internal reference voltage, trimmed or untrimmed, or connecting an external reference voltage to an internal digital-to-analog converter (DAC), ADC or other circuit requiring a reference voltage.
- DAC digital-to-analog converter
- An internal voltage source 8 generates a reference voltage which is brought out on lead 10.
- the internal reference voltage source may be implemented in several conventional ways, such as a bandgap voltage reference or a zener diode reference.
- a supply voltage V+ at supply voltage pin 14 would be +15 volts
- the voltage source 8 would generate 5 volts
- 10V would be the output voltage at terminal 2 when the trimming voltage is below an interrupting level to be described later.
- the voltage at terminal 2 is controlled by the open loop gain of an amplifier A1, a feedback network comprising transistor T1 and internal resistors R3 and R6, a resistor R2 connected between the R3/R6 junction and trimming terminal 4, and an external variable resistor 16.
- R3 and R6 typically 20 kilohms each
- a 5 volt reference applied to the amplifier's non-inverting input would yield 10 volts at terminal 2.
- This voltage is then trimmable by either adding or subtracting a small current through R3, from a potentiometer 16.
- a typical value for R2 would be 400 kilohms, and the variable reistor should be of the order of 100 kilohms.
- the open loop gain of the amplifier should be enough to overcome the voltage drop incurred by R1 and the base- emitter of T1, and still regulate terminal 2 to 12-bit accuracy.
- the reference voltage output level at terminal 2 is tied to the internal source 8 through the intervening circuit elements.
- a trimming voltage can be applied to trimming terminal 4 to adjust the output voltage level on terminal 2, in case it is not at the desired reference level because of circuit tolerances.
- Trimming terminal 4 is connected to the inverting input of op amp A1 through a resistor R2; another resistor R3 provides a feedback element between the emitter of transistor T1 and the inverting input of op amp A1.
- the output of op amp A1 can be adjusted to provide the desired voltage level at output terminal 2.
- the trimming voltage applied to terminal 4 can be derived in a conventional manner from potentiometer 16, which is fed by some convenient voltage supply such as output terminal 2 itself. It is an advantage of the present invention that it permits potentiometer 16 to be replaced with a digital-to-analog converter 18, shown connected to trimming terminal 4 by a dashed line connection, thus raising the reliability of the system.
- the circuit described thus far provides an internally generated, trimmed voltage at output terminal 2.
- the internal load such as one or more ADCs 6, a DAC, a comparator, an analog multiplier or some other circuit requiring a reference voltage, with a voltage produced by an external voltage reference source 20.
- prior voltage references have this capability, they require an additional terminal or pin to receive the external voltage.
- an external voltage source can be accommodated without using up any more pins.
- a special interrupt circuit is provided which interrupts the connection between internal voltage source 8 and output terminal 2 when an external voltage is desired, thus leaving output terminal 2 free to accept the external voltage.
- the preferred form of the interrupt circuit includes a pnp transistor T2 whose emitter is connected to trimming terminal 4.
- the base of T2 is kept at a constant voltage level by a connection to a voltage divider circuit consisting of resistors R7 and R4, which are connected between V+ and ground.
- the collector of T2 is connected to the base of an npn transistor T3, the emitter of which is grounded and the collector of which is connected to the base of transistor T1.
- a resistor R5 is connected between the base and emitter of T3.
- Resistors R7 and R4 are selected such that transistor T2 is held off when the voltage at trimming terminal 4 (and thereby at the emitter of T2) is within the desired trimming voltage range, but is held closed in a conductive state when the voltage at trimming terminal 4 is within some specified interrupt range outside of the trimming voltage range. For example, if the trimming voltage is limited to a maximum of 10 volts, the voltage at the base of transistor T2 could be set at some value greater than 10 volts. In that case, transistor T2 will not become conductive until the voltage applied to trimming terminal 4 exceeds the base voltage of T2 (plus its base-emitter voltage drop). When T2 does become conductive it turns on transistor T3, which is turn grounds the base of transistor T1 to hold T1 non-conductive. This opens up the connection between internal voltage source 8 and output terminal 2 with a high impedance interruption, thereby permitting the output of external voltage reference source 20 to be applied directly to terminal 2. For a negative reference voltage, the circuit polarity would simply be reversed.
- a convenient way to place the circuit in an external voltage reference mode is to simply connect a lead, indicated by dashed line 22, between V+ terminal 14 and trimming terminal 4.
- V+ at 15 volts and a trimming voltage range of 0-10 volts
- the relative values of R7 and R4 can be selected to establish any desired threshold voltage between 10 and 15 volts (at trimming terminal 4) for turning on transistor T2.
- a substantial gap is preferably left between the maximum trimming voltage, and the threshold voltage at trimming terminal 4 that will convert the circuit to its external reference mode.
- Typical resistance values are provided in FIG. 1, but are not to be considered as limiting.
- output terminal 2 can at the same time be used as a voltage reference for an external load circuit 24. Since numerous variations and alternate embodiments will be apparent to those skilled in the art, it is intended that the invention be limited only in terms of the appended claims.
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- Physics & Mathematics (AREA)
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- Automation & Control Theory (AREA)
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
Description
- This invention relates to voltage reference circuits, and more particularly to voltage reference circuits and methods in which the user can select between a trimmable, internally generated reference voltage, and an externally applied reference voltage.
- It is often desirable, for applications such as supplying a reference voltage for an analog-to-digital converter (ADC), to provide a voltage reference circuit which permits the user to select a voltage that is internally generated by the circuit, or to apply a different externally generated voltage through the integrated circuit pins. Also, it is normally desirable to be able to trim the internally generated voltage to ensure that it is within the designed tolerance, since normal fabrication variations and the like will typically result in some of the circuits generating inaccurate voltage levels. Although these needs have been satisfied in the past, it has required the use of three separate pins on the circuit element: one to receive an external voltage source, a second to provide an output for the internally generated voltage, and a third to receive trimming voltages used to trim the internally generated reference. Since pins on an integrated circuit package are frequently at a premium, it would be helpful if these functions could be accomplished with fewer than three pins.
- In view of the above problem associated with the prior art, the object of the present invention is to provide a voltage reference circuit and method which is capable of supplying either an internally or an externally generated voltage, and of trimming the internally generated voltage, with only two pins. This object is accomplished by connecting an internal, trimmable reference voltage source within a voltage reference circuit in circuit with a voltage reference terminal, and connecting a trimming terminal to apply a trimming voltage to the reference voltage source. An interrupt circuit is provided which responds to an interrupt voltage at the trimming terminal, the interrupt voltage being within a range outside of the trimming voltage range, to interrupt the connection between the internal reference voltage source and the voltage reference terminal. This in turn enables the application of an externally generated reference voltage to the voltage reference terminal. Thus, a trimmed, internally generated reference voltage is supplied when a trimming voltage is present at the trimming terminal, while the voltage reference terminal serves to input an externally applied reference voltage when a non-trimming voltage level is applied to the trimming terminal.
- In the preferred embodiment, the internal reference voltage source is connected to the output terminal by means of a switch. The switch is actuated to disconnect the internal reference voltage source from the output terminal in response to an interrupt voltage level at the trimming terminal. The interrupt voltage is within an interrupt range that is greater in absolute magnitude than the voltages within the trimming voltage range. When a supply voltage source is provided, the interrupt voltage range may be made to fit the supply voltage level. Thus, by simply connecting the supply voltage terminal to the trimming terminal, the connection between the internal voltage source and the output voltage reference terminal is interrupted.
- The invention thus provides a dual mode voltage reference that uses only two pins: in one mode a trimmed, internally generated reference voltage is supplied, while in the other mode an externally generated voltage is supplied to the internal circuit. These and other features and advantages of the invention will be apparent to those skilled in the art from the following detailed description of a preferred embodiment, taken together with the accompanying drawing, in which:
-
- Fig. 1 is a partially block and partially schematic diagram of a dual mode voltage reference circuit constructed in accordance with the invention.
- A preferred embodiment of the invention is shown in FIG. 1. It employs only two pins, represented as
voltage terminal 2 and trimmingterminal 4. These two terminals give the user the flexibility of using the internal reference voltage, trimmed or untrimmed, or connecting an external reference voltage to an internal digital-to-analog converter (DAC), ADC or other circuit requiring a reference voltage. The internal circuity on an IC chip is enclosed within phantom lines in FIG. 1. - An internal voltage source 8 generates a reference voltage which is brought out on
lead 10. The internal reference voltage source may be implemented in several conventional ways, such as a bandgap voltage reference or a zener diode reference. Typically a supply voltage V+ atsupply voltage pin 14 would be +15 volts, the voltage source 8 would generate 5 volts, and 10V would be the output voltage atterminal 2 when the trimming voltage is below an interrupting level to be described later. - The voltage at
terminal 2 is controlled by the open loop gain of an amplifier A1, a feedback network comprising transistor T1 and internal resistors R3 and R6, a resistor R2 connected between the R3/R6 junction andtrimming terminal 4, and anexternal variable resistor 16. With equal values for R3 and R6, (typically 20 kilohms each), a 5 volt reference applied to the amplifier's non-inverting input would yield 10 volts atterminal 2. This voltage is then trimmable by either adding or subtracting a small current through R3, from apotentiometer 16. A typical value for R2 would be 400 kilohms, and the variable reistor should be of the order of 100 kilohms. The open loop gain of the amplifier should be enough to overcome the voltage drop incurred by R1 and the base- emitter of T1, and still regulateterminal 2 to 12-bit accuracy. - With transistor T1 held on by a positive voltage from op amp A1 at its base via resistor R1, the reference voltage output level at
terminal 2 is tied to the internal source 8 through the intervening circuit elements. In this mode a trimming voltage can be applied to trimmingterminal 4 to adjust the output voltage level onterminal 2, in case it is not at the desired reference level because of circuit tolerances.Trimming terminal 4 is connected to the inverting input of op amp A1 through a resistor R2; another resistor R3 provides a feedback element between the emitter of transistor T1 and the inverting input of op amp A1. By controlling the voltage at trimmingterminal 4, the output of op amp A1 can be adjusted to provide the desired voltage level atoutput terminal 2. The trimming voltage applied toterminal 4 can be derived in a conventional manner frompotentiometer 16, which is fed by some convenient voltage supply such asoutput terminal 2 itself. It is an advantage of the present invention that it permitspotentiometer 16 to be replaced with a digital-to-analog converter 18, shown connected to trimmingterminal 4 by a dashed line connection, thus raising the reliability of the system. - The circuit described thus far provides an internally generated, trimmed voltage at
output terminal 2. In certain circumstances, it is also desirable to be able to supply the internal load, such as one or more ADCs 6, a DAC, a comparator, an analog multiplier or some other circuit requiring a reference voltage, with a voltage produced by an externalvoltage reference source 20. While prior voltage references have this capability, they require an additional terminal or pin to receive the external voltage. It is a distinct advantage of the present invention that an external voltage source can be accommodated without using up any more pins. For this purpose, a special interrupt circuit is provided which interrupts the connection between internal voltage source 8 andoutput terminal 2 when an external voltage is desired, thus leavingoutput terminal 2 free to accept the external voltage. - The preferred form of the interrupt circuit includes a pnp transistor T2 whose emitter is connected to trimming
terminal 4. The base of T2 is kept at a constant voltage level by a connection to a voltage divider circuit consisting of resistors R7 and R4, which are connected between V+ and ground. The collector of T2 is connected to the base of an npn transistor T3, the emitter of which is grounded and the collector of which is connected to the base of transistor T1. A resistor R5 is connected between the base and emitter of T3. - Resistors R7 and R4 are selected such that transistor T2 is held off when the voltage at trimming terminal 4 (and thereby at the emitter of T2) is within the desired trimming voltage range, but is held closed in a conductive state when the voltage at
trimming terminal 4 is within some specified interrupt range outside of the trimming voltage range. For example, if the trimming voltage is limited to a maximum of 10 volts, the voltage at the base of transistor T2 could be set at some value greater than 10 volts. In that case, transistor T2 will not become conductive until the voltage applied to trimmingterminal 4 exceeds the base voltage of T2 (plus its base-emitter voltage drop). When T2 does become conductive it turns on transistor T3, which is turn grounds the base of transistor T1 to hold T1 non-conductive. This opens up the connection between internal voltage source 8 andoutput terminal 2 with a high impedance interruption, thereby permitting the output of externalvoltage reference source 20 to be applied directly toterminal 2. For a negative reference voltage, the circuit polarity would simply be reversed. - A convenient way to place the circuit in an external voltage reference mode is to simply connect a lead, indicated by dashed
line 22, betweenV+ terminal 14 and trimmingterminal 4. With V+ at 15 volts and a trimming voltage range of 0-10 volts, the relative values of R7 and R4 can be selected to establish any desired threshold voltage between 10 and 15 volts (at trimming terminal 4) for turning on transistor T2. To ensure against errors due to manufacturing tolerances, a substantial gap is preferably left between the maximum trimming voltage, and the threshold voltage at trimmingterminal 4 that will convert the circuit to its external reference mode. Typical resistance values are provided in FIG. 1, but are not to be considered as limiting. - The described circuit thus makes possible the provision of an internally generated voltage, an externally generated voltage, and a trimming capacity for the internally generated voltage, with the use of only two pins. In addition to supplying an internal load 6,
output terminal 2 can at the same time be used as a voltage reference for anexternal load circuit 24. Since numerous variations and alternate embodiments will be apparent to those skilled in the art, it is intended that the invention be limited only in terms of the appended claims.
Claims (9)
an input/output terminal (2),
a trimmable reference voltage source (8,A1),
connection circuit means (T1) connecting the reference voltage source to apply a first reference voltage to said input/output terminal (2),
a trimming terminal (4) connected to apply a trimming voltage within a predetermined trimming voltage range to trim the voltage from said reference voltage source (8), and
interrupt circuit means (T2,T3,R4,R5,R7) responsive to an interrupt voltage at the trimming terminal (4) to interrupt the connection provided by said connection circuit means (T1), said interrupt voltage being within an interrupt voltage range which is outside of said trimming voltage range, said interruption enabling the application to said input/output terminal (2) of a reference voltage generated externally to said voltage reference circuit.
when a trimmed internally generated reference voltage is desired, connecting the output of said reference voltage circuit (8,A1) to an input/output terminal (2), applying a trimming voltage within a predetermined trimming voltage range through a trimming terminal (4) to said reference voltage circuit (8,A1), and obtaining the internally generated reference voltage from said input/output terminal (2), and
when an externally generated reference voltage is desired, interrupting the connection (T1) between the output of said reference voltage circuit (8,A1) and said input/output terminal (2), applying said externally generated reference voltage to said input/output terminal (2), and obtaining said externally generated reference voltage from said input/output terminal (2).
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16930888A | 1988-03-17 | 1988-03-17 | |
US169308 | 1988-03-17 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0333353A2 true EP0333353A2 (en) | 1989-09-20 |
EP0333353A3 EP0333353A3 (en) | 1991-10-23 |
Family
ID=22615117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP19890302113 Ceased EP0333353A3 (en) | 1988-03-17 | 1989-03-02 | Dual mode voltage reference circuit and method |
Country Status (2)
Country | Link |
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EP (1) | EP0333353A3 (en) |
JP (1) | JPH01271812A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1992007315A1 (en) * | 1990-10-16 | 1992-04-30 | Siemens Automotive S.A. | Device for establishing a current in an analogue part of an integrated logic and analogue circuit |
WO1993006540A1 (en) * | 1991-09-25 | 1993-04-01 | Astec International Limited | Linear programming circuit for adjustable output voltage power converters |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2056805A (en) * | 1979-06-28 | 1981-03-18 | Nippon Electric Co | Integrated logic circuits |
DE3710865A1 (en) * | 1986-04-01 | 1987-10-22 | Toshiba Kawasaki Kk | SEMICONDUCTOR DEVICE |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5729916B2 (en) * | 1973-08-04 | 1982-06-25 | ||
JPS5999510A (en) * | 1982-11-30 | 1984-06-08 | Fujitsu Ltd | Constant voltage circuit |
-
1989
- 1989-03-02 EP EP19890302113 patent/EP0333353A3/en not_active Ceased
- 1989-03-17 JP JP6579589A patent/JPH01271812A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2056805A (en) * | 1979-06-28 | 1981-03-18 | Nippon Electric Co | Integrated logic circuits |
DE3710865A1 (en) * | 1986-04-01 | 1987-10-22 | Toshiba Kawasaki Kk | SEMICONDUCTOR DEVICE |
Non-Patent Citations (2)
Title |
---|
ELECTRONICS, 13th April 1978, pages 99-105, New York, US; P. BROKAW: "I2L puts it all together for 10-bit a-d converter chip" * |
WESCON CONFERENCE RECORD, North Hollywood, September 1977, pages 1-5; J. SIMMONS: "Microprocessor 8-bit D/A-converter" * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1992007315A1 (en) * | 1990-10-16 | 1992-04-30 | Siemens Automotive S.A. | Device for establishing a current in an analogue part of an integrated logic and analogue circuit |
US5418488A (en) * | 1990-10-16 | 1995-05-23 | Siemens Automotive, S.A. | Device for establishing a current in an analog part of an integrated logic and analog circuit |
WO1993006540A1 (en) * | 1991-09-25 | 1993-04-01 | Astec International Limited | Linear programming circuit for adjustable output voltage power converters |
Also Published As
Publication number | Publication date |
---|---|
JPH01271812A (en) | 1989-10-30 |
EP0333353A3 (en) | 1991-10-23 |
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