EP0317145A3 - Ttl-to-ecl input translator/driver circuit - Google Patents

Ttl-to-ecl input translator/driver circuit Download PDF

Info

Publication number
EP0317145A3
EP0317145A3 EP88310444A EP88310444A EP0317145A3 EP 0317145 A3 EP0317145 A3 EP 0317145A3 EP 88310444 A EP88310444 A EP 88310444A EP 88310444 A EP88310444 A EP 88310444A EP 0317145 A3 EP0317145 A3 EP 0317145A3
Authority
EP
European Patent Office
Prior art keywords
ttl
driver circuit
input translator
ecl input
ecl
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
EP88310444A
Other versions
EP0317145A2 (en
EP0317145B1 (en
Inventor
Aurangzeb K. Khan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Publication of EP0317145A2 publication Critical patent/EP0317145A2/en
Publication of EP0317145A3 publication Critical patent/EP0317145A3/en
Application granted granted Critical
Publication of EP0317145B1 publication Critical patent/EP0317145B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/018Coupling arrangements; Interface arrangements using bipolar transistors only
    • H03K19/01806Interface arrangements
    • H03K19/01812Interface arrangements with at least one differential stage
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00369Modifications for compensating variations of temperature, supply voltage or other physical parameters
    • H03K19/00376Modifications for compensating variations of temperature, supply voltage or other physical parameters in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Heterocyclic Carbon Compounds Containing A Hetero Ring Having Oxygen Or Sulfur (AREA)
EP88310444A 1987-11-20 1988-11-07 Ttl-to-ecl input translator/driver circuit Expired - Lifetime EP0317145B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US123507 1980-02-22
US07/123,507 US4806800A (en) 1987-11-20 1987-11-20 TTL-to-ECL input translator/driver circuit

Publications (3)

Publication Number Publication Date
EP0317145A2 EP0317145A2 (en) 1989-05-24
EP0317145A3 true EP0317145A3 (en) 1989-12-13
EP0317145B1 EP0317145B1 (en) 1993-08-11

Family

ID=22409086

Family Applications (1)

Application Number Title Priority Date Filing Date
EP88310444A Expired - Lifetime EP0317145B1 (en) 1987-11-20 1988-11-07 Ttl-to-ecl input translator/driver circuit

Country Status (6)

Country Link
US (1) US4806800A (en)
EP (1) EP0317145B1 (en)
JP (1) JP2539899B2 (en)
AU (1) AU614781B2 (en)
CA (1) CA1292783C (en)
DE (1) DE3883167T2 (en)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR900006047B1 (en) * 1987-07-07 1990-08-20 삼성전자 주식회사 Voltage level converter
US5075567A (en) * 1989-06-26 1991-12-24 Nec Corporation Electronic switch circuit
US4945265A (en) * 1989-07-13 1990-07-31 National Semiconductor Corporation ECL/CML pseudo-rail circuit, cutoff driver circuit, and latch circuit
US5013941A (en) * 1989-08-17 1991-05-07 National Semiconductor Corporation TTL to ECL/CML translator circuit
US4945263A (en) * 1989-08-23 1990-07-31 National Semiconductor Corporation TTL to ECL/CML translator circuit with differential output
US4978871A (en) * 1989-08-31 1990-12-18 Analog Devices, Inc. Level shift circuit for converting a signal referenced to a positive voltage to a signal referenced to a lower voltage
USRE34771E (en) * 1989-09-11 1994-11-01 Kabushiki Kaisha Toshiba Voltage follower circuit having improved dynamic range
US5068552A (en) * 1990-09-10 1991-11-26 Kabushiki Kaisha Toshiba Voltage follower circuit having improved dynamic range
US5045729A (en) * 1989-11-15 1991-09-03 National Semiconductor Corporation TTL/ECL translator circuit
JPH03270319A (en) * 1990-03-19 1991-12-02 Fujitsu Ltd Level conversion circuit
US5008570A (en) * 1990-03-30 1991-04-16 The United States Of America As Represented By The Secretary Of The Air Force Schmitt-triggered TTL to CML input buffer apparatus
US4994691A (en) * 1990-04-16 1991-02-19 Advanced Micro Devices, Inc. TTL-to-CML translator circuit
US5124591A (en) * 1990-09-04 1992-06-23 International Business Machines Corporation Low power push pull driver
JPH05327472A (en) * 1992-05-15 1993-12-10 Hitachi Ltd Semiconductor integrated circuit device
JP3143543B2 (en) * 1993-04-19 2001-03-07 キヤノン株式会社 Input circuit
US5424660A (en) * 1993-06-15 1995-06-13 Texas Instruments Incorporated DECL logic gates which operate with a 3.3 volt supply or less
US6140718A (en) * 1994-09-07 2000-10-31 Texas Instruments Incorporated Complimentary driver circuit with shared voltage breakdown protection
JP2734426B2 (en) * 1995-09-20 1998-03-30 日本電気株式会社 Level conversion circuit
US6175249B1 (en) * 1999-01-29 2001-01-16 Fairchild Semiconductor Corp. High speed low skew CMOS to ECL converter
US7649919B2 (en) * 2006-05-26 2010-01-19 Mediatek Inc. Automatic power control circuits and methods

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986002792A1 (en) * 1984-11-02 1986-05-09 Advanced Micro Devices, Inc. Integrated circuit device accepting inputs and providing outputs at the levels of different logic families

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1157089B (en) * 1982-11-24 1987-02-11 Cselt Centro Studi Lab Telecom LOW DISSIPATION CIRCUIT FOR DRIVING HIGH SPEED NUMBER SIGNAL TRANSMISSION LINES
US4527079A (en) * 1983-11-01 1985-07-02 Advanced Micro Devices, Inc. Integrated circuit device accepting inputs and providing outputs at the levels of different logic families
US4533842A (en) * 1983-12-01 1985-08-06 Advanced Micro Devices, Inc. Temperature compensated TTL to ECL translator
NL8401847A (en) * 1984-06-12 1986-01-02 Philips Nv LEVEL SHIFT.
JPH0763139B2 (en) * 1985-10-31 1995-07-05 日本電気株式会社 Level conversion circuit
US4736125A (en) * 1986-08-28 1988-04-05 Applied Micro Circuits Corporation Unbuffered TTL-to-ECL translator with temperature-compensated threshold voltage obtained from a constant-current reference voltage
US4739194A (en) * 1986-11-25 1988-04-19 Tektronix, Inc. Supergate for high speed transmission of signals
US4700087A (en) * 1986-12-23 1987-10-13 Tektronix, Inc. Logic signal level conversion circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1986002792A1 (en) * 1984-11-02 1986-05-09 Advanced Micro Devices, Inc. Integrated circuit device accepting inputs and providing outputs at the levels of different logic families

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IBM TECHNICAL DISCLOSURE BULLETIN, vol. 27, no. 4B, September 1984, pages 2615-2616, New York, US; D.C. BANKER et al.: "Driver circuit" *
IEEE INTERCON CONFERENCE, vol. 6, 1975, pages 18/3,1-8; J. BUIE: "3D-LSI compatible logic family" *

Also Published As

Publication number Publication date
US4806800A (en) 1989-02-21
DE3883167D1 (en) 1993-09-16
AU614781B2 (en) 1991-09-12
EP0317145A2 (en) 1989-05-24
JPH02168722A (en) 1990-06-28
DE3883167T2 (en) 1994-01-13
CA1292783C (en) 1991-12-03
AU2438388A (en) 1989-05-25
JP2539899B2 (en) 1996-10-02
EP0317145B1 (en) 1993-08-11

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