EP0275582B1 - Current mirror circuit - Google Patents

Description

The invention relates to a current mirror circuit according to the preamble of claim 1 and a use thereof.

Current mirror circuits have long been known. They contain a diode in the first branch, which is usually formed by a transistor whose collector is connected to its base, and the base-emitter path of a transistor in the second branch. Current mirrors of this type provide an output current which corresponds to the input current (if the effective emitter area of the transistors in the two branches are equal to one another) or which is greater or less than the input current by a defined factor (if the effective emitter area of the transistor in the second branch is larger or smaller by this factor than the emitter area of the transistor connected as a diode in the first branch). In practice, however, the emitter area ratio is limited to values between about 1:10 and 10: 1.

The object of the present invention is to provide a current mirror with which other relationships between output current and input current can be realized.

This object is achieved by the measures specified in claim 1.

It should be mentioned at this point that a current amplifier with the features of the preamble of the main claim is known from FIG. 3 of DE-PS 30 35 272. In this known circuit, the second branch contains the base-emitter path of a first transistor, which is connected in series with a parallel circuit consisting of a current source and the base-emitter path of a second transistor. In this known circuit, the output current should change with the square of the input current; thus it is a non-linear current amplifier. In contrast, the ratio between the current in the second branch and the current in the first branch is proportional to the root of the current gain of the one transistor in the second branch. Since the current amplification factor of a transistor is practically constant, the output and input current are in a constant relationship to one another in the invention.

A particular advantage of the circuit according to the invention is that the ratio between the current in the second branch is proportional to the current gain from the one transistor in the second branch. Although the current amplification factor of the transistors of an integrated circuit is essentially the same, the current amplification factors of the transistors of two integrated circuits of the same type can differ significantly, in particular if the circuits do not originate from the same crystal wafer. With different types of circuit, however, a - usually undesirable - quiescent current results which also fluctuates with the root of the current amplification factor or the reciprocal of this root.

A development of the current mirror circuit according to the invention is therefore characterized by its use for compensating the quiescent current proportional to the root of the current amplification factor of the transistors of a circuit or the reciprocal of this value in an integrated circuit.

Fig. 1

ein Schaltbild der erfindungsgemäßen Schaltung,

Fig. 2

ihre Verwendung zur Kompensation des Ruhestroms bei einem AM-Demodulator.

The invention is explained below with reference to the drawing. Show it:

Fig. 1

2 shows a circuit diagram of the circuit according to the invention,

Fig. 2

their use for compensation of the quiescent current in an AM demodulator.

The current mirror circuit shown in FIG. 1 contains, in a first branch, two diodes connected in series with the same forward direction, which are each formed by an npn transistor 1 or 2, the collector-base connections of which are short-circuited.

The second branch contains two npn transistors 3 and 4, whose series-connected base-emitter paths are connected in parallel with the series-connected diodes 1, 2. Accordingly, the base of transistor 3 is connected to the collector-base terminal of transistor 1; this connection point forms a connection point 5 of the current mirror circuit. Furthermore, the emitter of transistor 3 is connected to the base of transistor 4, the emitter of which is connected to the emitter of transistor 2. The connection of the emitters of transistors 2 and 4 forms a further connection point 6 of the circuit.

The third connection point of the current mirror is formed by the collector of transistor 4, to which the collector of transistor 3 is connected. Since the collector current of transistor 3 is significantly smaller than the collector current of transistor 4, the latter connection may also be omitted, if necessary.

Dabei sind U₃ bzw. U₄ die Basis-Emitter-Spannungen der Transistoren 3 bzw. 4, und U_T ist die sogenannte Temperaturspannung, die bei Zimmertemperatur etwa 25,5 mV beträgt. Weiterhin gilt:

${\text{U₃ = U₁ - U}}_{\text{d}}\text{ (2),}$

wobei U₁ die Basis-Emitter-Spannung des als Diode geschalteten Transistors 1 ist und U_d die Spannung zwischen dem Emitter des Transistors 3 und dem Emitter des Transistors 1 ist. Ebenso gilt:

${\text{U₄ = U₂ + U}}_{\text{d}}\text{ (3),}$

wobei U₂ die Basis-Emitter-Spannung des Transistors 2 ist. Da die als Diode geschalteten Transistoren 1 und 2 den gleichen Strom führen, gilt:

U₁ = U₂   (4).
In the following calculation, it is initially assumed that the four transistors 1 to 4 have the same properties. The emitter current I₄ of the transistor 4th is greater than the emitter current of transistor 3 by the current amplification factor B of this transistor. Because of the exponential relationship between the base-emitter voltage of a transistor and its emitter current, the equation applies:

${\text{U₄ - U₃ = U}}_{\text{T}}\text{lnB (1)}$

U₃ and U₄ are the base-emitter voltages of the transistors 3 and 4, and U _T is the so-called temperature voltage, which is about 25.5 mV at room temperature. The following also applies:

${\text{U₃ = U₁ - U}}_{\text{d}}\text{(2),}$

wherein U₁ is the base-emitter voltage of the transistor 1 connected as a diode and U _{d is} the voltage between the emitter of the transistor 3 and the emitter of the transistor 1. The following also applies:

${\text{U₄ = U₂ + U}}_{\text{d}}\text{(3),}$

where U₂ is the base-emitter voltage of transistor 2. Since the transistors 1 and 2 connected as diodes carry the same current, the following applies:

U₁ = U₂ (4).

wobei I₄ der Emitterstrom des Transistors 4 und I₁ der Emitterstrom der Transistoren 1 bzw. 2 ist. Aus den Gleichungen (2), (3) und (4) ergibt sich:

${\text{U₄ - U₃ = 2U}}_{\text{d}}\text{ (6).}$

Since, according to equation (3), the base-emitter voltage of transistor 4 _is larger than the base-emitter voltage of transistor 2 by U _d, the equation finally applies because of the exponential relationship between emitter current and base-emitter voltage:

${\text{I₄ / I₁ = exp (U}}_{\text{d}}{\text{/ U}}_{\text{T}}\text{) (5),}$

where I₄ is the emitter current of transistor 4 and I₁ is the emitter current of transistors 1 and 2, respectively. From equations (2), (3) and (4) we get:

${\text{U₄ - U₃ = 2U}}_{\text{d}}\text{(6).}$

By equating equations (1) and (6):

${\text{U}}_{\text{d}}{\text{= 0.5U}}_{\text{T}}\text{lnB (7).}$

Substituting equation (7) into equation (5) gives:

$\text{I₄ / I₁ = √}\overline{\text{B}}\text{(8th).}$

Since the current I₁ is practically the same as the current flowing through the terminal 5 (the deviations are in the range per mil) and since the emitter current of the transistor I₄ is almost identical to the current through the third terminal 7, the current across the terminal applies 7 by a factor of √ B is greater than the current via terminal 5.

The above relationships have been derived on the assumption that all transistors are identical. However, it is also possible that only transistors 1 and 3 are identical to one another and have different emitter areas than transistors 2 and 4 that are identical to one another, or that transistors 3 and 4 are identical to one another and have different current amplification factors than transistors 1 and 2. Finally, all four transistors can have different emitter areas. In all of these cases the factor√ B in equation (8) is to be multiplied by a factor which depends on the effective emitter areas.

The input current can be fed to terminal 5, the proportional current being processed further at terminal 7 (in this case terminal 6 can be connected to ground, for example), but the current can also be further processed via terminal 6 because at least this approximately corresponds to the current I₄. Likewise, an input current can be supplied to connection 6 and the output current can be taken from connection 5. In this case the output current is by a factor of 1 / √ B less than the input current.

2 shows a preferred application example of the circuit according to the invention in an amplitude demodulator. Two branches, each containing the series connection of the collector-emitter paths of two npn transistors 11 and 12 or 13 and 14, are connected to a direct current source 15. However, while transistor 11 is connected directly to the direct current source formed by the collector-emitter path of a transistor 15, the emitter of transistor 14 is connected in the other branch via a resistor 16 to the direct current source. In addition, the base connections of the transistors 11 and 14, whose emitters are connected directly or via the resistor 16 to the direct current source 15, are connected to the emitters of the transistors in the other branch; the base of transistor 14 is thus connected to the emitter of transistor 12 and the base of transistor 11 is connected to the emitter of transistor 13.

The collector current of the transistor 13 is fed via a current mirror formed from pnp transistors, the output current of which is twice as large as the collector current of the transistor 13, to an output resistor 17, whose connection facing away from the current mirror is connected to ground.

The inputs 18 and 19 of the circuit are connected to the base connections of the transistors 12 and 13 and connected to a signal source (not shown in more detail) which generates amplitude-modulated signals. If the base currents of the transistors were negligibly small, the transistor 13 would only carry a collector current if the potential at the input terminal 18 was positive compared to the potential at the input terminal 19. A rectification would then take place, from which a direct voltage could be generated by means of a filter, not shown, coupled to the output resistor 17, which, among other things, would be usable for rule purposes.

However, since the base currents of the transistors 11 ... 14 are not negligible or because the current amplification factors of these transistors are finite, a quiescent current I _{r is} superimposed on this useful signal component, which is dependent on the sample variations of the circuit and which undesirably affects the control behavior Way would affect.

ab. A ist dabei ein Faktor, der vom Gleichstrom I₀ und vom Widerstand R nach der Beziehung:

$\text{A = √}\overline{{\text{U}}_{\text{T}}{\text{/RI}}_{\text{o}}}\text{ (10)}$

abhängt. Mit einem Wert R von 60 Ohm und einem Gleichstrom I_o von ca. 2 mA ergibt sich der Faktor A näherungsweise zu 0,5, so daß nach der Verdopplung des Ruhestroms im Stromspiegel 20 dem Ausgangswiderstand ein Ruhestrom I_r der Größe:

${\text{I}}_{\text{r}}{\text{= I}}_{\text{o}}\text{/√}\overline{\text{B}}\text{ (11)}$

zugeführt würde. I_r ist demnach der Wurzel aus dem Stromverstärkungsfaktor umgekehrt proportional und ist daher Exemplarstreuungen ausgesetzt.This quiescent current depends on the direct current I _o supplied by the direct current source 15 and the current amplification factor B of the transistors 11 ... 14 according to the relationship:

${\text{I.}}_{\text{r}}{\text{/ I}}_{\text{O}}\text{= A / √}\overline{\text{B}}\text{(9)}$

from. A is a factor of the direct current Istrom and the resistance R according to the relationship:

$\text{A = √}\overline{{\text{U}}_{\text{T}}{\text{/ RI}}_{\text{O}}}\text{(10)}$

depends. With a value R of 60 ohms and a direct current I _o of approx. 2 mA, the factor A is approximately 0.5, so that after doubling the quiescent current in the current mirror 20, the quiescent current I _{r of} the magnitude:

${\text{I.}}_{\text{r}}{\text{= I}}_{\text{O}}\text{/ √}\overline{\text{B}}\text{(11)}$

would be fed. I _r is therefore inversely proportional to the root of the current amplification factor and is therefore exposed to sample variations.

abgeführt wird, der gerade dem Ruhestromanteil entspricht. Infolgedessen fließt über den Widerstand 17 nur der von der Wechselspannung an den Eingängen 18, 19 abhängige Nutzanteil, der unabhängig von Exemplarstreuungen zu Regelzwecken benutzt werden kann.This quiescent current is kept almost completely away from the resistor 17 in that a DC current is drawn off by means of the circuit shown in FIG. 1, which is part of an integrated circuit together with the amplitude modulator, which has almost the same size and the same dependence on the current amplification factor like the quiescent current. For this purpose, the circuit shown in FIG. 1 is connected with its connection 6 to a current source 21 and with its connection 5 to the connection point of the output of the current mirror 20 with the resistor 17. The current source 21 is formed by the collector-emitter path of a transistor which has the same properties as the transistor 15 and its base-emitter path connected in parallel with the base-emitter path of the transistor 15 and thus connected to the same bias generator 22 is like the transistor 15. As a result, the current Iγ is supplied to the terminal 6, so that the current is approximately via the terminal 5 ${\text{I.}}_{\text{O}}\text{/ √}\overline{\text{B}}$

is dissipated, which corresponds to the quiescent current portion. As a result, only the useful component, which is dependent on the alternating voltage at the inputs 18, 19, flows through the resistor 17 and can be used for control purposes independently of specimen variations.

The doubling of the quiescent current (and the useful signal) caused by the current mirror 20 can be omitted if either the collector current of the transistor 21 is halved or the emitter current of the transistors 3 and 4 is doubled by changing the transistor geometry. - The current mirror circuit implemented with npn transistors 1 ... 4 can also be constructed in an analog manner from pnp transistors.

Claims (5)

1. A current-mirror arrangement comprising a first and a second branch arranged in parallel with one another, the first branch comprising two series-connected diodes (1, 2), and an input current and an output current being present during operation, characterised in that in the second branch the base-emitter paths of two transistors (3, 4) are arranged in series in such a manner that the emitter current of the one transistor (3) constitutes the base current of the other transistor (4).
2. A current-mirror arrangement as claimed in Claim 1, characterized in that the input current is applied to the junction point (6) between the two branches, to which junction point the emitter of a transistor (4) in the second branch is connected, and in that the output current is taken from the other junction point (5) between the two branches.
3. A current-mirror arrangement as claimed in Claim 1, characterized in that the input current is applied to the junction point (5) which is connected to the base of a transistor (3) in the second branch, and in that the output current is taken from the other junction point (6) or from the collector (7) of that transistor (4) in the second branch whose emitter is connected to the other junction point (6).
4. A current-mirror arrangement as claimed in Claim 3, characterized in that the collectors of the two transistors (3, 4) of the second branch are interconnected.
5. Use of a current-mirror arrangement as claimed in Claim 1 to compensate for the quiescent current in an integrated circuit, which quiescent current is proportional to the root of the current-gain factor of the transistors of a circuit (11....19) or to the reciprocal of this root.

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