EP0218611A1 - Monolithic integrated lateral thyristor - Google Patents

Monolithic integrated lateral thyristor

Info

Publication number
EP0218611A1
EP0218611A1 EP19860901800 EP86901800A EP0218611A1 EP 0218611 A1 EP0218611 A1 EP 0218611A1 EP 19860901800 EP19860901800 EP 19860901800 EP 86901800 A EP86901800 A EP 86901800A EP 0218611 A1 EP0218611 A1 EP 0218611A1
Authority
EP
European Patent Office
Prior art keywords
transistor
thyristor
parasitic
base
emitter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP19860901800
Other languages
German (de)
French (fr)
Inventor
Bernd Kalkhof
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of EP0218611A1 publication Critical patent/EP0218611A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7436—Lateral thyristors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/74—Thyristor-type devices, e.g. having four-zone regenerative action
    • H01L29/7404—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device
    • H01L29/7408—Thyristor-type devices, e.g. having four-zone regenerative action structurally associated with at least one other device the device being a capacitor or a resistor

Definitions

  • the invention is based on a monolithically integrated lateral thyristor of the type of the main claim.
  • a circuit arrangement can be specified as an equivalent circuit diagram, which essentially contains a PNP transistor and an NPN transistor.
  • the base of the PNP transistor is connected to the collector of the NPN transistor and its collector is connected to the base of the NPN transistor.
  • the emitter of the PNP transistor forms the anode, the base of which is the gate and the emitter of the NPN transistor is the cathode.
  • the known monolithically integrated arrangements have design-related parasitic elements which can result in undesired firing of the thyristor during operation.
  • One of the existing parasitic circuit elements is a PNP substrate transistor, the emitter base path of which is connected in parallel to the emitter base path of the aforementioned PNP transistor.
  • a significant substrate current flows through the emitter-collector path of the parasitic PNP substrate transistor, which generates power loss and can lead to malfunctions in neighboring circuit parts.
  • One between Parasitic junction capacitance occurring at the gate and substrate can cause an unwanted ignition of the thyristor with a rapid rise in voltage at the anode of the thyristor.
  • the monolithically integrated lateral thyristor according to the invention with the features of the main claim has the advantage over the fact that an inverse NPN transistor is obtained by an additional n diffusion in the p-emitter zones of the PNP transistor, which NPN transistor is the parasitic PNP substrate transistor at least approximately ineffective.
  • the additional NPN transistor which lies between the anode and the gate, reduces the minority carrier injection and the parasitic substrate current amplification and thus also reduces the parasitic substrate current.
  • the ring gain of the thyristor is reduced and the unwanted ignition is effectively contained by the gate substrate capacitance.
  • the emitter region forming the anode of the thyristor is distributed 'iete several Emittergeb, in which the n - diffusion is preferably introduced in the form of several islands sion n -Diffu-.
  • the parasitic PNP substrate transistor which is arranged distributed over the substrate, is made virtually ineffective by an appropriately distributed inverse NPN transistor.
  • an additional leakage resistance arranged between the base and emitter of the NPN transistor forming the cathode, an increased base current, owing to the parasitic junction capacitance mentioned, can be discharged to the cathode.
  • the leakage resistance can be implemented in a simple manner as a narrow p-doped strip together with the base diffusion of the NPN transistor. The strips interrupt the n -doped zones which form the cathode of the thyristor at certain intervals and are in contact with a narrow contact web which connects the contacting over the n -doped zones. The leakage resistance therefore does not require an additional process step during manufacture.
  • FIG. 1 shows the equivalent circuit diagram of a monolithically integrated lateral thyristor according to the invention with additional measures for compensating for parasitic circuit elements
  • Figure 2 shows the basic structure of the corresponding semiconductor arrangement in section
  • Figure 3 is a plan view of the arrangement shown in Figure 2.
  • the circuit arrangement shown in FIG. 1 specifies the equivalent circuit diagram of a monolithically integrated mineral thyristor, the parasitic elements of which are at least approximately ineffective by structural measures.
  • the actual thyristor consists of a first PNP transistor T1 and a second NPN transistor T2.
  • the emitter of the first transistor T1 forms the anode A, the base of which is the gate G and the emitter of the second transistor T2 is the cathode K of the thyristor.
  • the base of the first transistor T1 is connected to the collector of the second transistor T2 and the collector of the first transistor T1 to the base of the second transistor T2.
  • a parasitic PNP transistor Tp and a parasitic junction capacitance appear as parasitic elements, which is shown here as a capacitance diode Dp.
  • the effect of these parasitic elements is canceled out by an inverse NPN transistor T3 and a leakage resistance R, which lies between the base of the transistor T2 and its emitter.
  • the base and the emitter of the transistor T3 are connected to the emitter of the transistor Tl.
  • the collector of transistor T3 is connected to the base of transistor Tl.
  • the structure of the corresponding semiconductor arrangement is shown in FIG. 2, although the oxide layer has not been shown for the sake of simplicity.
  • the transistor T3 was realized by an additional n -diffusion 1 into the emitter walls 2 of the transistor T1. In FIG. 3 the corresponding diffusion zones are marked accordingly.
  • Metallizations 3 and 4 for the cathode K are provided for the connection of the anode A.
  • the p-wells are diffused into a ⁇ -epitaxial layer 5.
  • the epitaxial layer 5 is limited from below Buried Layer 6, which extends above the p ⁇ substrate. 7
  • the n zones running below the metallizations 4 are interrupted by narrow p-doped strips 8.
  • the associated metallizations 4 are, however, connected to one another in this area by a narrow contact web 9, which has contact with the narrow strip 8.
  • the n -diffusion 1 introduced in the p-region which forms the anode A is short-circuited with the p-region surrounding it. This results in the NPN transistor T3 between anode A and gate G, which reduces the minor carrier injection, since some of the minority carriers flow over it, so that the parasitic transistor Tp becomes quasi ineffective.
  • the leakage resistance R is chosen so that the current at the collector of the transistor T1, which is caused by the parasitic capacitance diode Dp, is discharged through the leakage resistance R, so that the transistor T2 is not inadvertently turned on.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Thyristors (AREA)

Abstract

Dans un thyristor latéral intégré monolithique, la capacité parasite de la couche de redressement (Dp) et le transistor parasite de substrat (Tp) sont compensés par des mesures structurelles simples. Un dopage n+ est appliqué aux zones émettrices du transistor (T1), de manière à créer un transistor inverse (T3) qui enlève le courant porteur minoritaire du transistor parasite (Tp). La diode à capacité variable (Dp) est désactivée par un diviseur de tension (R). Par ces mesures, un allumage non intentionnel du thyristor est évité même lors d'une augmentation rapide de la tension traversant l'anode (A).In a monolithic integrated lateral thyristor, the parasitic capacitance of the rectifying layer (Dp) and the parasitic substrate transistor (Tp) are compensated for by simple structural measurements. An n + doping is applied to the emitting zones of the transistor (T1), so as to create an inverse transistor (T3) which removes the minority carrier current from the parasitic transistor (Tp). The variable capacitance diode (Dp) is deactivated by a voltage divider (R). By these measures, an unintentional ignition of the thyristor is avoided even during a rapid increase in the voltage passing through the anode (A).

Description

Monolithisch integrierter Lateral-ThyristorMonolithically integrated lateral thyristor
Stand der TechnikState of the art
Die Erfindung geht aus von einem monolithisch iπte- girierten Lateral-Thyristor nach der Gattung des Haupt¬ anspruchs. Für bekannte integrierte Lateral-Thyristo- reπ kann als Ersatzschaltbild eine Schaltungsanordπuπg angegeben werden, die im wesentlichen einen PNP-Traπ- sistor und einen NPN-Transistor enthält. Der PNP-Traπ- sistor ist an seiner Basis mit dem Kollektor des NPN- Traπsistors und mit seinem Kollektor mit der Basis des NPN-Transistor verbunden. Der Emitter- des PNP-Transis- tors bildet die Anode, dessen Basis das Gate und der Emitter des NPN-Transistor die Kathode. Die bekannten monolithisch integrierten Anordnungen besitzen konstruk¬ tionsbedingte parasitäre Elemente, die im Betrieb ein unerwünschtes Zünden des Thyristors zur Folge haben können. Eines der vorhandenen parasitären Schaltungs¬ elemente ist ein PNP-Substrattransistor, dessen Emitter- Basisstrecke der Emit.ter-Basisstrecke des zuvor genannten PNP-Transistors parallel geschaltet ist. Über die Emi- - ter-Kollektorstrecke des parasitären PNP-Substrattran- sistors fließt ein nennenswerter Substratstrom, der Verlustleistung erzeugt und in benachbarten Schaltuπgs- teilen zu Funktionsstörungen führen kann. Eine zwischen Gate und Substrat auftretende parasitäre Sperrschicht¬ kapazität kann ein ungewolltes Zünden des Thyristors bei schnellem Spannungsanstieg an der Anode des Thyris¬ tors bewirken.The invention is based on a monolithically integrated lateral thyristor of the type of the main claim. For known integrated lateral thyristors, a circuit arrangement can be specified as an equivalent circuit diagram, which essentially contains a PNP transistor and an NPN transistor. The base of the PNP transistor is connected to the collector of the NPN transistor and its collector is connected to the base of the NPN transistor. The emitter of the PNP transistor forms the anode, the base of which is the gate and the emitter of the NPN transistor is the cathode. The known monolithically integrated arrangements have design-related parasitic elements which can result in undesired firing of the thyristor during operation. One of the existing parasitic circuit elements is a PNP substrate transistor, the emitter base path of which is connected in parallel to the emitter base path of the aforementioned PNP transistor. A significant substrate current flows through the emitter-collector path of the parasitic PNP substrate transistor, which generates power loss and can lead to malfunctions in neighboring circuit parts. One between Parasitic junction capacitance occurring at the gate and substrate can cause an unwanted ignition of the thyristor with a rapid rise in voltage at the anode of the thyristor.
Vorteile der ErfindungAdvantages of the invention
Der erfindungsgemäße monolithisch integrierte Lateral- Thyristor mit den Merkmalen des Hauptaπspruchs hat dem gegenüber den Vorteil, daß durch eine zusätzliche n - Diffusion in den p-Emitterzonen des PNP-Transistors ein inverser NPN-Transistor erhalten wird, der den parasi¬ tären PNP-Substrattransistor wenigstens annähernd wir- kunslos macht. Der zusätzliche NPN-Transistor, der zwischen Anode und Gate liegt, verringert die Miπori- tätsträgerinjektioπ und die parasitäre Substratstrom¬ verstärkung und verringert damit auch den parasitären Substratstrom. Gleichzeitig wird die Riπgverstärkung des Thyristors herabgesetzt und das ungewollte Zünden durch die Gate-Substratkapazität wirksam eingedämmt.The monolithically integrated lateral thyristor according to the invention with the features of the main claim has the advantage over the fact that an inverse NPN transistor is obtained by an additional n diffusion in the p-emitter zones of the PNP transistor, which NPN transistor is the parasitic PNP substrate transistor at least approximately ineffective. The additional NPN transistor, which lies between the anode and the gate, reduces the minority carrier injection and the parasitic substrate current amplification and thus also reduces the parasitic substrate current. At the same time, the ring gain of the thyristor is reduced and the unwanted ignition is effectively contained by the gate substrate capacitance.
Die Emitterzone, welche die Anode des Thyristors bildet, ist auf mehrere Emittergeb'iete verteilt, in die die n - Diffusion vorzugsweise in Form von mehreren n -Diffu- sionsinseln eingebracht wird. Auf diese Weise wird der parasitäre PNP-Substrattransistor, der verteilt über dem Substrat angeordnet ist, durch einen entsprechend verteilt angeordneten inversen NPN-Transistor quasi wirkungslos gemacht.The emitter region forming the anode of the thyristor is distributed 'iete several Emittergeb, in which the n - diffusion is preferably introduced in the form of several islands sion n -Diffu-. In this way, the parasitic PNP substrate transistor, which is arranged distributed over the substrate, is made virtually ineffective by an appropriately distributed inverse NPN transistor.
Durch einen zwischen Basis und Emitter des die Kathode bildenden NPN-Traπsistors angeordneten zusätzlichen Ab¬ leitwiderstand kann ein erhöhter Basisstrom, bedingt durch die genannte parasitäre Sperrschichtkapazität, zur Kathode abgeleitet werden. Zu diesem Zweck ist der Ableitwiderstand entsprechend πiederohmig, so daß ein unerwünschtes Zünden sicher vermieden wird. Auf einfache Weise läßt sich der Ableitwiderstand als schmaler p-do- tierter Streifen gemeinsam mit der Basisdiffusion des NPN-Traπsistors ausführen. Die Streifen unterbrechen in gewissen Abständen die n -dotierten Zonen, die die Kathode des Thyristors bilden, und sind mit einem schma¬ len Koπtaktsteg in Berührung, der die Koπtaktierung über den n -dotierten Zonen verbindet. Der Ableitwider- stand erfordert somit keinen zusätzlichen Verfahreπs- schritt bei der Herstellung.By means of an additional leakage resistance arranged between the base and emitter of the NPN transistor forming the cathode, an increased base current, owing to the parasitic junction capacitance mentioned, can be discharged to the cathode. For this purpose the Leakage resistance corresponding πiederohmig, so that unwanted ignition is safely avoided. The leakage resistance can be implemented in a simple manner as a narrow p-doped strip together with the base diffusion of the NPN transistor. The strips interrupt the n -doped zones which form the cathode of the thyristor at certain intervals and are in contact with a narrow contact web which connects the contacting over the n -doped zones. The leakage resistance therefore does not require an additional process step during manufacture.
Zeichnungdrawing
Die Erfindung wird nachfolgend anhand der Zeichnungen näher erläutert. Es zeigen:The invention is explained in more detail below with reference to the drawings. Show it:
Figur 1 das Ersatzschaltbild eines erfindungsgemäßeπ monolithisch integrierten Lateral-Thyristors mit zusätz- liehen Maßnahmen zur Kompensation von parasitären Schaltungselementen,FIG. 1 shows the equivalent circuit diagram of a monolithically integrated lateral thyristor according to the invention with additional measures for compensating for parasitic circuit elements,
Figur 2 den grundsätzlichen Aufbau der entsprechenden Halbleiteranordnung im Schnitt undFigure 2 shows the basic structure of the corresponding semiconductor arrangement in section and
Figur 3 eine Draufsicht auf die in Figur 2 dargestellte Anordnung.Figure 3 is a plan view of the arrangement shown in Figure 2.
Die in Figur 1 dargestellte Schaltungsaπordnung gibt das Ersatzschaltbild eines monolithisch integrierten La¬ teral-Thyristors an, dessen parasitäre Elemente durch strukturelle Maßnahmen zumindest annähernd wirkungslos sind. Der eigentliche Thyristor besteht aus einem ersten PNP-Transistor Tl und einem zweiten NPN-Transistor T2. Der Emitter des ersten Transistors Tl bildet die Anode A, dessen Basis das Gate G und der Emitter des zweiten Tran¬ sistors T2 die Kathode K des Thyristors. Die Basis des ersten Transistors Tl ist mit dem Kollektor des zweiten Transistors T2 und der Kollektor des ersten Transistors Tl mit der Basis des zweiten Transistors T2 verbunden.The circuit arrangement shown in FIG. 1 specifies the equivalent circuit diagram of a monolithically integrated mineral thyristor, the parasitic elements of which are at least approximately ineffective by structural measures. The actual thyristor consists of a first PNP transistor T1 and a second NPN transistor T2. The emitter of the first transistor T1 forms the anode A, the base of which is the gate G and the emitter of the second transistor T2 is the cathode K of the thyristor. The base of the first transistor T1 is connected to the collector of the second transistor T2 and the collector of the first transistor T1 to the base of the second transistor T2.
Bei diesem Thyristor treten als parasitäre Elemente ein parasitärer PNP-Transistor Tp und eine parasitäre Sperr¬ schichtkapazität auf, die hier als Kapazitätsdiode Dp dargestellt ist. Die Wirkung dieser parasitären Elemente wird durch einen inverseπ NPN-Transistor T3 und einen Ableitwiderstaπd R, der zwischen der Basis des Traπsis-- tors T2 und dessen Emitter liegt, aufgehoben. Die Basis und der Emitter des Transistors T3 sind mit dem Emitter des Transistors Tl verbunden. Der Kollektor des Tran¬ sistors T3 ist mit der Basis des Transistors Tl ver¬ bunden.In this thyristor, a parasitic PNP transistor Tp and a parasitic junction capacitance appear as parasitic elements, which is shown here as a capacitance diode Dp. The effect of these parasitic elements is canceled out by an inverse NPN transistor T3 and a leakage resistance R, which lies between the base of the transistor T2 and its emitter. The base and the emitter of the transistor T3 are connected to the emitter of the transistor Tl. The collector of transistor T3 is connected to the base of transistor Tl.
In Figur 2 ist der Aufbau der entsprechenden Halbleiter- anordnung dargestellt, wobei allerdings der Einfachheit halber auf die Darstellung der Oxidschicht verzichtet wurde. Der Transistor T3 wurde durch eine zusätzliche n -Diffusion 1 in die Emitterwaπnen 2 des Transistors Tl realisiert.In Figur 3 sind die entsprechenden Diffusi- oπszonen entsprechend gekennzeichnet.The structure of the corresponding semiconductor arrangement is shown in FIG. 2, although the oxide layer has not been shown for the sake of simplicity. The transistor T3 was realized by an additional n -diffusion 1 into the emitter walls 2 of the transistor T1. In FIG. 3 the corresponding diffusion zones are marked accordingly.
Für den Anschluß der Anode A sind Metallisierungen 3 und für die Kathode K Metallisierungen 4 vorgesehen. Die p-Wanneπ sind in eine π -Epitaxieschicht 5 eiπdiffuπ- diert. Die Epitaxieschicht 5 wird unten vom Buried- Layer 6 begrenzt, der sich oberhalb des p~-Substrats 7 erstreckt.Metallizations 3 and 4 for the cathode K are provided for the connection of the anode A. The p-wells are diffused into a π-epitaxial layer 5. The epitaxial layer 5 is limited from below Buried Layer 6, which extends above the p ~ substrate. 7
In Figur 3 ist die Schnittlinie S angegeben, die dem Verlauf der Schnittebene des in Figur 2 dargestelltenIn Figure 3, the section line S is given, the course of the section plane of the shown in Figure 2
Schnitts entspricht. In Figur 3 sind jedoch die Koπtakt- flächen für den Anschluß des Gates G und die in diesemCut corresponds. In FIG. 3, however, the contact areas for the connection of the gate G and in this
B Beerreeiicchh zzuussäätt;zlich vorgesehenen π -Dotierungen nicht eingezeichnetB Beerreeiicchh zzuussäätt; π doping not provided
In Figur 3 ist insbesondere ersichtlich, daß die in die Wannen 2 eingebrachte n -Diffusion 1 in eine Vielzahl von Diffusionsinselπ unterteilt ist. Über diesen Diffusi- onsinselπ verlaufen die die überdeckenden Kontakt¬ flächen 3.In Figure 3 it can be seen in particular that the n-diffusion 1 introduced into the troughs 2 is divided into a plurality of diffusion islands. The overlapping contact surfaces 3 run over this diffusion island.
Zur Bildung des Ableitwiderstandes R sind die unterhalb der Metallisierungen 4 verlaufenden n -Zonen durch schmale p-dotierte Streifen 8 unterbrochen. Die zuge¬ hörigen Metallisierungen 4 sind jedoch in diesem Be¬ reich durch einen schmalen Kontaktsteg 9 miteinander verbunden, der mit dem schmalen Streifen 8 Kontakt hat.To form the leakage resistance R, the n zones running below the metallizations 4 are interrupted by narrow p-doped strips 8. The associated metallizations 4 are, however, connected to one another in this area by a narrow contact web 9, which has contact with the narrow strip 8.
Die in dem p-Gebiet, welches die Anode A bildet, einge¬ brachte n -Diffusion 1 ist mit dem sie umgebenden p-Ge¬ biet kurzgeschlossen. Dadurch entsteht der NPN-Tran¬ sistor T3 zwischen Anode A und Gate G, der die Minori¬ tätsträgerinjektion verringert, da ein Teil der Mino¬ ritätsträger über ihn abfließt, so daß der parasitäre Transistor Tp quasi wirkungslos wird. Der Ableitwider¬ stand R wird so πiederohmig gewählt, daß der Strom am Kollektor des Transistors Tl, der durch die parasitäre Kapazitätsdiode Dp bedingt ist, über den Ableitwider¬ stand R abgeleitet wird, so daß der Transistor T2 nicht unbeabsichtigt aufgesteuert wird. The n -diffusion 1 introduced in the p-region which forms the anode A is short-circuited with the p-region surrounding it. This results in the NPN transistor T3 between anode A and gate G, which reduces the minor carrier injection, since some of the minority carriers flow over it, so that the parasitic transistor Tp becomes quasi ineffective. The leakage resistance R is chosen so that the current at the collector of the transistor T1, which is caused by the parasitic capacitance diode Dp, is discharged through the leakage resistance R, so that the transistor T2 is not inadvertently turned on.

Claims

Patentansprüche Claims
1. Monolithisch integrierter Lateral-Thyristor, dessen Ersatzschaltbild aus einem ersten PNP-Transistor und einem zweiten NPN-Transistor besteht, wobei die Ba¬ sis des ersten mit dem Kollektor des zweiten und die Basis des zweiten mit dem Kollektor des ersten Trans- sistors verbunden ist, und der einen parasitären PNP-Substrattransistor und eine parasitäre Sperr- Schichtkapazität zwischen Epitaxieschicht und Sub¬ strat besitzt, dadurch gekennzeichnet, daß in die p-Emitterzonen (2) , die die Anode (A) des Thyristors bilden, eine n -Diffusion (1) eingebracht und mit dem sie umgebenden p-Gebiet kurzgeschlossen wird.1. Monolithically integrated lateral thyristor, the equivalent circuit of which consists of a first PNP transistor and a second NPN transistor, the base of the first being connected to the collector of the second and the base of the second being connected to the collector of the first transistor and which has a parasitic PNP substrate transistor and a parasitic barrier layer capacitance between the epitaxial layer and the substrate, characterized in that an n -diffusion in the p-emitter zones (2) which form the anode (A) of the thyristor (1) and short-circuited with the surrounding p-area.
Thyristor nach Anspruch 1, dadurch gekennzeichnet, ddaaßß ddiiee nn --DDiiffffuussiioorn (1) aus einer Vielzahl π -Diffu- sionsinseln bestehtThyristor according to claim 1, characterized in that ddiiee nn --DDiiffffuussiioorn (1) consists of a plurality of π -diffusion islands
3. Thyristor nach einem der Ansprüche 1 oder 2, dadurch gekennzeichnet, daß am zweiten Transistor (T2) zwischen Basis und Emitter der die Kathode (K) des Thyristors bildet, ein Ableitwiderstaπd (R) ausgebil¬ det ist. 3. Thyristor according to one of claims 1 or 2, characterized in that on the second transistor (T2) between the base and emitter which forms the cathode (K) of the thyristor, a Ableit resistance, (R) is ausgebil¬ det.
4. Thyristor nach Anspruch 3, dadurch gekennzeichnet, daß der Ableitwiderstand (R) als schmaler p-dotier- ter Streifen (8) gemeinsam mit der Basisdiffusioπ des zweiten Transistors (T2) ausgeführt ist.4. Thyristor according to claim 3, characterized in that the bleeder resistor (R) is designed as a narrow p-doped strip (8) together with the base diffusion of the second transistor (T2).
5. Thyristor nach einem der Ansprüche 3 oder 4, dadurch gekennzeichnet, daß die p-dotierten Streifen (8) die π -dotierten Zonen, die die Kathode (K) des Thyris¬ tors bilden, unterbrechen und mit schmalen Kontakt- Stegen (9) in Berührung sind, die die Metallisie¬ rung (4) über dem n -dotierten Zonen verbinden. 5. Thyristor according to one of claims 3 or 4, characterized in that the p-doped strips (8) interrupt the π-doped zones which form the cathode (K) of the Thyris¬ gate and with narrow contact webs (9th ) are in contact, which connect the metallization (4) above the n -doped zones.
EP19860901800 1985-04-18 1986-03-14 Monolithic integrated lateral thyristor Withdrawn EP0218611A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3513987 1985-04-18
DE19853513987 DE3513987A1 (en) 1985-04-18 1985-04-18 MONOLITHICALLY INTEGRATED LATERAL THYRISTOR

Publications (1)

Publication Number Publication Date
EP0218611A1 true EP0218611A1 (en) 1987-04-22

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WO (1) WO1986006215A1 (en)

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Publication number Priority date Publication date Assignee Title
DE4342166C2 (en) * 1993-12-10 1995-10-26 Bosch Gmbh Robert Integrated semiconductor device with a thyristor
DE4419363C1 (en) * 1994-06-03 1995-08-10 Bosch Gmbh Robert Integrated semiconductor device with thyristor function

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Publication number Priority date Publication date Assignee Title
US3972061A (en) * 1974-10-02 1976-07-27 National Semiconductor Corporation Monolithic lateral S.C.R. having reduced "on" resistance

Non-Patent Citations (1)

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Title
See references of WO8606215A1 *

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Publication number Publication date
WO1986006215A1 (en) 1986-10-23
DE3513987A1 (en) 1986-10-30

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