EP0201982A2 - A delta modulation decoder - Google Patents
A delta modulation decoder Download PDFInfo
- Publication number
- EP0201982A2 EP0201982A2 EP86200830A EP86200830A EP0201982A2 EP 0201982 A2 EP0201982 A2 EP 0201982A2 EP 86200830 A EP86200830 A EP 86200830A EP 86200830 A EP86200830 A EP 86200830A EP 0201982 A2 EP0201982 A2 EP 0201982A2
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- European Patent Office
- Prior art keywords
- voltage
- current
- transistor
- circuit
- decoder
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/02—Delta modulation, i.e. one-bit differential modulation
Definitions
- This invention relates to a delta modulation decoder comprising :
- Such a delta modulation decoder may be used in high quality audio systems and in particular in the Dolby Laboratories Digital Audio Systems, suitable for high quality transmission of audio data in applications such as direct broadcast satellite, cable TV and multipoint distribution systems.
- This invention particularly is related to a decoder for the receiver of a Dolby transmission, the decoder having input logic and linear circuits capable of decoding two channels of a delta modulated digital data.
- the Dolby Digital Audio System encoder produces three data bit streams that represent the audio information to be transmitted. Two of these streams are control data bits, while one stream is the audio data bit stream. Clock bits are also transmitted by the encoder. Since each of the three data bit streams can be several channels of time multiplexed data, the clock is used as a strobe to separate two channels of data.
- the two control data bit streams for each channel are for step-size and system de-emphasis control.
- Information for the control data is encoded logarithmically in the duty cycle of the bit stream.
- Low-pass filters are used to detect the average of DC value of the duty cycle.
- the resulting voltage is then exponentiated to expand the control signal into a larger range.
- the collector current of the actual exponentiating transistor is the control signal current. To obtain an accurate control signal current it is necessary to have precise control of the pulse height to be filtered and to properly bias the exponentiating transistor. It is therefore the object of the invention to provide a control signal current that is independent of temperature, voltage and resistance variations.
- the temperature and process spread compensation technique according to the invention allows the control signal within the circuit to be relatively independent of variations in temperature, resistance and voltage. The effect of this compensation is to allow the use of the circuit over a wide temperature range without the loss of performance.
- FIG 1 the basic-scheme of the known delta-demodulation decoder is shown, which is designed for use in the Dolby Laboratories Digital Audio System, which is suitable for high quality transmission of audio data.
- the step-size or unit of quantization is made variable and increases with increasing slope of the input audio signal.
- the operation of the encoder is equivalent to sampling and quantizing an audio-waveform which has been multiplied by a further waveform representing the variation of step-size.
- the encoder is preceded with a variable emphasis circuit which in combination with the complementary de-emphasis circuit in the decoder provides a noise reduction and thus an increase in the signal-to-noise ratio.
- the encoder thus produces three data bit streams. One is the audio data bit stream (AD) and the other two are the control data bit streams for the step-size control (SSD) and the system de-emphasis (SBD) respectively.
- a clock signal (CL) is also transmitted.
- the decoder receives the transmitted output of the encoder. Since each of the data bit streams can be several channels of time multiplexed data, the clock is used as a strobe to seperate two channels of data. The components for these two channels are indicated with suffix A and B respectively. The duplicate components for channel B will not be discussed and are only shown schematically in the drawings.
- Six edge triggered D flipflops 10,11 and 12 are used as input latches to store two channels of audio and control data.
- the flipflops 10A,11A and 12A are strobed by the clock signal CLand are used to store the first channel.
- the clock signal CL is inverted by means of an inverter 14 to strobe the second channel.
- the step-size control bit stream contains the required step-size which is encoded logarithmically in the duty cycle of the bit stream. It is decoded by a decoder circuit 24A, in which a three-pole low-pass filter 16 is used to detect the average or DC value of the duty cycle. The resultant voltage is then exponentiated to expand the control signal I ss into a range approaching 50 dB by means of an exponentiator circuit or anti-log circuit 18, which is basically formed by a bipolar transistor. The control signal I ss is multiplied by the audio data bits (+1 or -1) in multiplier 17 and subsequently fed to integrator 19. The output signal of the integrator 19 is supplied to a de-emphasis circuit 20 at the output 21 of which the analog audio output is obtained.
- the de-eaphasis control bit stream contains the logarithm of the cut-off frequency of a variable high-pass filter in the de-emphasis circuit 20.
- This bit stream is decoded by a decoder circuit 25A which is substantially indentical with the step-size decoder circuit 24A.
- the control signal I SB controls the cut-off frequency of said filter.
- FIG 2 a decoder circuit in accordance with the invention for decoding the control data bit streams SSD or SBD for use in a delta-demodulation decoder of Figure 1 is shown.
- the control signals I SS and I SB are substantially independent of temperature, voltage and resistance as well as manufacturing variations.
- the output of the flipflop 11A (or 12A) sets the switching rate between two voltage levels V L and V H . These voltages are generated in the bandgap reference current 40 which produces a voltage V BG at terminal A, that is nearly independent of temperature, supply and process variations.
- the voltage V BG is sealed up to V 3 by means of resistors R10,R11 and transistor Q 3 .
- Such a circuit delivering a voltage V 3 is, for example, described in IEEE j. Solid Circuits, Vol. SC-9 pp 388-393. Dec 1974.
- the voltage V 3 is supplied to the basis of an emitter follower transistor Q 6 having a current source Ip TAT2 in its emitter line, which supplies an output current proportional to the absolute temperature and subsequently to the basis of a complementary emitter follower transistor Q 7 having two resistors R 1 , and R 2 and a current source Ip TAT1 in its emitter line.
- the voltage V H is a temperature sensitive voltage chosen to compensate for the temperature changes in the base-to-emitter voltage of a transistor discussed infra.
- the voltage V M is chosen to be 40 % of the voltage V H - V L .
- the voltage V 3 is further applied to the basis of a transistor Qg via an emitter follower transistor Q 8 having a current source 1 2 in its emitter line.
- the transistor Qg has an external resistor R EX in its emitter line and generates a low temperature coefficient current I REF , which is used in the exponentiater circuit 18.
- the control voltage at the output of the low-pass filter 16 is buffered by amplifier 32 and is subsequently attenuated by the voltage divider of resistors R 4 and R 5 .
- the voltage buffered by amplifier 32 is a V H which is the average DC-value of the bit stream of the duty cycle.
- the resistors R 4 and R 5 are chosen such that .
- the attenuated voltage, which is input to the exponentiator is (aV H - V L )/9. This voltage is temperature dependent.
- the actual exponentiating transistor is transistor Q 1 and its collector current is the control signal current designated I 1 . This current is in effect either I SS or I SB .
- a reference voltage generator circuit is provided using transistor Q 2 , amplifier A 2 and the reference current I REF .
- Amplifier A 2 forces the base of transistor Q 2 to be equal to (V M - V L )/9, which is the voltage applied to the other input of amplifier A 2 by means of the second voltage divider with resistors R 4 and R 5 .
- the base-emitter voltage V BE of transistor Q 2 is I S2 is the saturation current of transistor Q 2 .
- the effect is to force a current through transistor Q2 to obtain a base-emitter voltage for transistor Q2 to be used as a reference voltage for the exponentiator.
- the output of the exponentiating transistor Q 1 is a current I 1 , which, depending on the circuit, is either I SS (step-size control) or I SB (system de-emphasis control) and which is independent of temperature, internal resistance and power supply.
- I SS step-size control
- I SB system de-emphasis control
- Equation (4) yields the value of I 1 . To show that this value is independent of resistance and temperature we consider equations (5) through (8).
- the input signals to the exponentiator are purposely sade temperature dependent and in particular dependent on the absolute temperature because the conversion of a voltage to a current is temperature dependent. Therefore, the two temperature dependencies are cancelled in the exponentiator.
- V H is temperature dependent because of I PTAT .
- the resistance is cancelled out in the generation of I PTAT through R 1 and R 2 as shown in equation (6). Therefore, V R is independent of the resistance.
- the audio data is put into two channels in the circuit, it is sent to a multiplier circuit or variable impedance circuit as described with reference to Figure 1.
- circuit and technique of the present invention provided the basis for a two channel decoder for use in the Dolby Digital Audio System.
Abstract
Description
- This invention relates to a delta modulation decoder comprising :
- - storage means to receive and store temporarily a stream of logarithmically encoded control bits for the encoder
- - filter means to detect the average dc voltage of the duty cycle of said control bit stream
- - and exponentiator means to convert said voltage exponentially to a control signal current, which means comprise a transistor having a base'for applying the output voltage of the filter and having a collector for supplying the said control signal current.
- Such a delta modulation decoder may be used in high quality audio systems and in particular in the Dolby Laboratories Digital Audio Systems, suitable for high quality transmission of audio data in applications such as direct broadcast satellite, cable TV and multipoint distribution systems. This invention particularly is related to a decoder for the receiver of a Dolby transmission, the decoder having input logic and linear circuits capable of decoding two channels of a delta modulated digital data.
- Such a delta modulation decoder is known from the paper "A digital audio system for broadcast and prerecorded media* presented at the 75the convention of the Audio Engineering Society on March 27/30,1984.
- The Dolby Digital Audio System encoder produces three data bit streams that represent the audio information to be transmitted. Two of these streams are control data bits, while one stream is the audio data bit stream. Clock bits are also transmitted by the encoder. Since each of the three data bit streams can be several channels of time multiplexed data, the clock is used as a strobe to separate two channels of data.
- The two control data bit streams for each channel are for step-size and system de-emphasis control. Information for the control data is encoded logarithmically in the duty cycle of the bit stream. Low-pass filters are used to detect the average of DC value of the duty cycle. The resulting voltage is then exponentiated to expand the control signal into a larger range. The collector current of the actual exponentiating transistor is the control signal current. To obtain an accurate control signal current it is necessary to have precise control of the pulse height to be filtered and to properly bias the exponentiating transistor. It is therefore the object of the invention to provide a control signal current that is independent of temperature, voltage and resistance variations.
- According to the invention a delta modulation decoder is characterized in that the decoder further comprises:
- - a bandgap voltage generator to generate precise high, medium and low voltages in conjunction with a current proportional to absolute temperature and including current source means to generate a stable reference current,
- - a switching amplifier for supplying to the filter means a bit stream with a precise high and low voltage using the voltages generated by said bandgap voltage generator dependent on the output of the storage weans,
- - and a reference voltage generator for generating a reference voltage to be applied to the emitter of said exponentiator transistor using the medium and low voltages and the reference current by said bandgap voltage generator.
- The temperature and process spread compensation technique according to the invention allows the control signal within the circuit to be relatively independent of variations in temperature, resistance and voltage. The effect of this compensation is to allow the use of the circuit over a wide temperature range without the loss of performance.
- The invention will be explained in greater detail by reference to the accompanying drawings, in which
- Figure 1 is a circuit diagram of a known delta modulator decoder, and
- Figure 2 is a circuit diagram of the input logic, the reference generator and a exponentiator circuit according to the invention for use in the decoder of Figure 1.
- In Figure 1 the basic-scheme of the known delta-demodulation decoder is shown, which is designed for use in the Dolby Laboratories Digital Audio System, which is suitable for high quality transmission of audio data.
- In the encoder of this system the step-size or unit of quantization is made variable and increases with increasing slope of the input audio signal. The operation of the encoder is equivalent to sampling and quantizing an audio-waveform which has been multiplied by a further waveform representing the variation of step-size. The encoder is preceded with a variable emphasis circuit which in combination with the complementary de-emphasis circuit in the decoder provides a noise reduction and thus an increase in the signal-to-noise ratio. The encoder thus produces three data bit streams. One is the audio data bit stream (AD) and the other two are the control data bit streams for the step-size control (SSD) and the system de-emphasis (SBD) respectively. A clock signal (CL) is also transmitted. The decoder receives the transmitted output of the encoder. Since each of the data bit streams can be several channels of time multiplexed data, the clock is used as a strobe to seperate two channels of data. The components for these two channels are indicated with suffix A and B respectively. The duplicate components for channel B will not be discussed and are only shown schematically in the drawings.
- Six edge triggered
D flipflops flipflops inverter 14 to strobe the second channel. - The step-size control bit stream (SSD) contains the required step-size which is encoded logarithmically in the duty cycle of the bit stream. It is decoded by a
decoder circuit 24A, in which a three-pole low-pass filter 16 is used to detect the average or DC value of the duty cycle. The resultant voltage is then exponentiated to expand the control signal Iss into a range approaching 50 dB by means of an exponentiator circuit oranti-log circuit 18, which is basically formed by a bipolar transistor. The control signal Iss is multiplied by the audio data bits (+1 or -1) in multiplier 17 and subsequently fed to integrator 19. The output signal of the integrator 19 is supplied to ade-emphasis circuit 20 at theoutput 21 of which the analog audio output is obtained. - The de-eaphasis control bit stream (SBD) contains the logarithm of the cut-off frequency of a variable high-pass filter in the
de-emphasis circuit 20. This bit stream is decoded by adecoder circuit 25A which is substantially indentical with the step-size decoder circuit 24A. The control signal ISB controls the cut-off frequency of said filter. - In Figure 2 a decoder circuit in accordance with the invention for decoding the control data bit streams SSD or SBD for use in a delta-demodulation decoder of Figure 1 is shown. To maintain system accuracy it is necessary that the control signals ISS and ISB are substantially independent of temperature, voltage and resistance as well as manufacturing variations. To this end it is necessary to have precise control of the pulse height to be filtered by
filter 16. This is accomplished by using aswitching amplifier 30 to drive the low-pass filter 16. The output of theflipflop 11A (or 12A) sets the switching rate between two voltage levels VL and VH. These voltages are generated in thebandgap reference current 40 which produces a voltage VBG at terminal A, that is nearly independent of temperature, supply and process variations. The voltage VBG is sealed up to V3 by means of resistors R10,R11 and transistor Q3. Such a circuit delivering a voltage V3 is, for example, described in IEEE j. Solid Circuits, Vol. SC-9 pp 388-393. Dec 1974. The voltage V3 is supplied to the basis of an emitter follower transistor Q6 having a current source IpTAT2 in its emitter line, which supplies an output current proportional to the absolute temperature and subsequently to the basis of a complementary emitter follower transistor Q7 having two resistors R1, and R2 and a current source IpTAT1 in its emitter line. This results in the fixed reference voltage VL = V3 - VBEQ6 + VDRQ7, which is substantially of temperature variations since transistors Q6 and Q7 show substantially the same temperature behaviour. The voltage VH is a temperature sensitive voltage chosen to compensate for the temperature changes in the base-to-emitter voltage of a transistor discussed infra. The voltage VM is chosen to be 40 % of the voltage VH - VL. The voltage V3 is further applied to the basis of a transistor Qg via an emitter follower transistor Q8 having acurrent source 12 in its emitter line. The transistor Qg has an external resistor REX in its emitter line and generates a low temperature coefficient current IREF, which is used in theexponentiater circuit 18. - The control voltage at the output of the low-
pass filter 16 is buffered by amplifier 32 and is subsequently attenuated by the voltage divider of resistors R4 and R5. The voltage buffered by amplifier 32 is a VH which is the average DC-value of the bit stream of the duty cycle. In this embodiment the resistors R4 and R5 are chosen such that - The actual exponentiating transistor is transistor Q1 and its collector current is the control signal current designated I1. This current is in effect either ISS or ISB. To properly bias transistor Q1 and the other exponentiating transistors, a reference voltage generator circuit is provided using transistor Q2, amplifier A2 and the reference current IREF. Amplifier A2 forces the base of transistor Q2 to be equal to (VM - VL)/9, which is the voltage applied to the other input of amplifier A2 by means of the second voltage divider with resistors R4 and R5. The base-emitter voltage VBE of transistor Q2 is
- The output of the exponentiating transistor Q1 is a current I1, which, depending on the circuit, is either ISS (step-size control) or ISB (system de-emphasis control) and which is independent of temperature, internal resistance and power supply. The circuit achieves this goal in the following fashion. Referring to the definitions where "a" is the duty cycle, "c" is a constant and the equation VT =KT, for the voltage equivalent of temperature, the q difference between the base emitter voltage of transistors Q1 and Q2 is expressed :
-
-
-
- At this point it should be remarked that the base currents of transistors Q1 and Q2 have been neglected because they have no substantial impact on the value of the current I1, which is the output of the exponentiator. Equation (4) yields the value of I1. To show that this value is independent of resistance and temperature we consider equations (5) through (8).
-
-
- From equation 9 it can be shown that 11 is not changed from variations in temperature or resistance.
-
- The input signals to the exponentiator are purposely sade temperature dependent and in particular dependent on the absolute temperature because the conversion of a voltage to a current is temperature dependent. Therefore, the two temperature dependencies are cancelled in the exponentiator. VH is temperature dependent because of IPTAT. The resistance is cancelled out in the generation of IPTAT through R1 and R2 as shown in equation (6). Therefore, VR is independent of the resistance.
- The result of this technique is that the performance of the IC will be constant in spite of variations of teaperature, process spreadings, internal resistance and the supply voltage VCC. The frequency response and the gain of the circuit are controlled by the transmitted control bits, which may have now been sade independent of these variables since the output of the various exponentiators will be either ISS or ISB.
- Once the audio data is put into two channels in the circuit, it is sent to a multiplier circuit or variable impedance circuit as described with reference to Figure 1.
- Thus the circuit and technique of the present invention provided the basis for a two channel decoder for use in the Dolby Digital Audio System.
Claims (1)
- A delta modulation decoder comprising- storage means to receive and store temporarily a stream of logarithmically encoded control bits for the encoder- filter means to detect the average dc voltage of the duty cycle of said control bit stream- and exponentiator means to convert said voltage exponentially to a control signal current, which means comprise a transistor having a base for applying the output voltage of the filter and having a collector for supplying the said control signal current characterized in that the decoder further comprises :- a bandgap voltage generator to generate precise high, medium and low voltages in conjunction with a current proportional to absolute temperature and including current source means to generate a stable reference current.- a switching amplifier for supplying to the filter means a bit stream with a precise high and low voltage using the voltages generated by said bandgap voltage generator dependent on the output of the storage means,- and a reference voltage generator for generating a reference voltage to be applied to the emitter of said exponentiator transistor using the medium and low voltages and the reference current by said bandgap voltage generator.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US734417 | 1985-05-15 | ||
US06/734,417 US4684898A (en) | 1985-05-15 | 1985-05-15 | Temperature and process variation compensation for a delta demodulation decoder |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0201982A2 true EP0201982A2 (en) | 1986-11-20 |
EP0201982A3 EP0201982A3 (en) | 1989-04-19 |
Family
ID=24951618
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP86200830A Withdrawn EP0201982A3 (en) | 1985-05-15 | 1986-05-14 | A delta modulation decoder |
Country Status (3)
Country | Link |
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US (1) | US4684898A (en) |
EP (1) | EP0201982A3 (en) |
JP (1) | JPS6230425A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107147145A (en) * | 2017-06-09 | 2017-09-08 | 太原理工大学 | A kind of wind storage bipolarity direct-current grid and control method based on three level DC DC converters |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4829299A (en) * | 1987-09-25 | 1989-05-09 | Dolby Laboratories Licensing Corporation | Adaptive-filter single-bit digital encoder and decoder and adaptation control circuit responsive to bit-stream loading |
US6757913B2 (en) | 1996-07-15 | 2004-06-29 | Gregory D. Knox | Wireless music and data transceiver system |
IT1304670B1 (en) * | 1998-10-05 | 2001-03-28 | Cselt Centro Studi Lab Telecom | CIRCUIT IN CMOS TECHNOLOGY FOR THE GENERATION OF A CURRENT REFERENCE. |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4042921A (en) * | 1973-12-11 | 1977-08-16 | L.M. Ericsson Pty Ltd. | Digital encoder/decoder |
FR2391599A1 (en) * | 1977-05-20 | 1978-12-15 | Europ Handelsges Anst | Digital control delta modulation data signal transmission system - has regulating circuit with non-linear characteristic connected to output of pulse series analyser |
GB2133597A (en) * | 1983-01-03 | 1984-07-25 | Analog Devices Inc | Temperature compensated logarithmic circuit |
-
1985
- 1985-05-15 US US06/734,417 patent/US4684898A/en not_active Expired - Fee Related
-
1986
- 1986-05-14 EP EP86200830A patent/EP0201982A3/en not_active Withdrawn
- 1986-05-15 JP JP61111776A patent/JPS6230425A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4042921A (en) * | 1973-12-11 | 1977-08-16 | L.M. Ericsson Pty Ltd. | Digital encoder/decoder |
FR2391599A1 (en) * | 1977-05-20 | 1978-12-15 | Europ Handelsges Anst | Digital control delta modulation data signal transmission system - has regulating circuit with non-linear characteristic connected to output of pulse series analyser |
GB2133597A (en) * | 1983-01-03 | 1984-07-25 | Analog Devices Inc | Temperature compensated logarithmic circuit |
Non-Patent Citations (2)
Title |
---|
AES AN AUDIO ENGINEERING SOCIETY PREPRINT PRESENTED AT THE 75TH CONVENTION, Paris, 27th-30th March 1984, preprint no. 2071 (C7); C.C. TODD et al.: "A digital audio system for broadcast and pre-recorded media" * |
IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. SC-9, no. 6, December 1974, pages 388-393, New York, US; A.P. BROKAW: "A simple three-terminal IC bandgap reference" * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107147145A (en) * | 2017-06-09 | 2017-09-08 | 太原理工大学 | A kind of wind storage bipolarity direct-current grid and control method based on three level DC DC converters |
CN107147145B (en) * | 2017-06-09 | 2019-09-13 | 太原理工大学 | A kind of wind storage bipolarity direct-current grid and control method based on three-level DC-DC converter |
Also Published As
Publication number | Publication date |
---|---|
JPS6230425A (en) | 1987-02-09 |
EP0201982A3 (en) | 1989-04-19 |
US4684898A (en) | 1987-08-04 |
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