EP0183246A2

EP0183246A2 - Display system

Info

Publication number: EP0183246A2
Application number: EP85115061A
Authority: EP
Inventors: Takatoshi Ishii; Ryozo Yamashita
Original assignee: ASCII Corp
Current assignee: ASCII Corp
Priority date: 1984-11-27
Filing date: 1985-11-27
Publication date: 1986-06-04
Also published as: JPS61128284A; EP0183246A3

Abstract

A display system is disclosed which is capable of executing its main job processings speedily when it performs a cursor display. The display system includes therein a cursor pattern register (24) for storing the pattern of a given cursor, display position specifying means (24) for specifying a position where the cursor is to be displayed, and cursor displacement means (10b,10d) for displacing the cursor relatively to a display means (40). The display system may also contain cursor clip means, logic operation means (30), shift clock control means and bit shift means (25).

Description

The present invention relates to a display system comprising means for cursor display on a display screen.
Recently, with the advancement of pointing devices such as a mouse, a trackball and the like, cursor display patterns are required to have various kinds of functions.
In conventional display control systems, cursors are displayed by flashing or reversing a rectangular block, or they are displayed by using arbitrary figures such as a finger, a pair of scissors, a circle, an arrow, a cross and the like. Also, logic operations are partially executed between the pattern data for the respective cursors and the data for display contents already displayed on the screen prior to display of the respective cursors. In this case, according to the above-mentioned conventional systems, the software thereof must be processed to rewrite the above-mentioned display contents themselves so as to realize the above-mentioned logic. operations.
We now describe a case (shown in Fiq. 6E of the accompanyina drawings) when an arrow cursor is displayed in the display contents on the screen shown in Fig. 6A, as an example.
At first, a pattern shown in Fig. 6B for forming an inner frame of the cursor is created and also another pattern shown in Fig. 6C for forming an outer frame of the cursor is created. Then, the data for the display contents shown in Fig. 6A, that is, the data for the portions (shown by broken lines) where the cursor is to be displayed is written into the work area of VRAM (or main memory).
Next, the data for the portions shown by the broken lines in Fig. 6A is ANDed with the data for the inner frame pattern shown in Fig. 6B to produce a screen in Fig. 6D. If the data for the portions shown by broken lines in the screen of Fig. 6D is XORed with the data for the outer frame shown in Fig. 6C, then a screen shown in Fig. 6E can be created.
Generally, it is necessary to move the display positions of the cursor by means of indication of pointing devices. Therefore, a cursor written as in Fig. 6 is eliminated and then the cursor is rewritten in a position slightly displaced in its displacement direction from the initial position thereof. Repetition of these operations permits the cursor to be displayed as if it were moving in succession.
Here, to eliminate a single cursor, the portions shown by the broken lines that were written into the above-mentioned work area may be written over Fig. 6E.
By the way, hot spots HS respectively illustrated in Figs. 6E and 6F are display points intended by the associated cursor patterns.
In the above-mentioned prior art systems, since the above-mentioned software processing is complicated, it takes time to process the software itself. Also, the operation to move the cursor is executed by interrupt processing and, as a result of this, the main job processing is delayed accordingly.
The present invention aims at eliminating the drawbacks found in the above-mentioned prior art systems.
Accordingly, it is an object of the invention to provide an improved cursor display system which is capable of executing its main job processings speedily when displaying a cursor.
To achieve this object, according to the invention, there are provided, within the present display system, a cursor pattern register for storing the patterns of the cursor, display position specifying means for specifying a position in which the cursor is to be displayed, and cursor displacement means for displacing the cursor relatively to a display screen.
The above and other related objects and features of the invention will be apparent from a reading of the following description of preferred embodiments of the invention with reference to the accompanying drawings in which:

Fig. 1 is a block diagram of an embodiment of the invention;
Fig. 2 is a table to illustrate a register bank;
Fig. 3 is a more detailed block diagram of the above embodiment;
Fig. 3A is a view of an example of CRT display screens;
Fig. 3B is a view to illustrate a circuit for fixing the amount of displacement of the cursor in a vertical direction;
Fig. 4 is a view to illustrate a portion of a CRT controller as well as the details of a cursor display position detection circuit and gates;
Fig. 5 is a block diagram of another embodiment of the invention; and,
Figs. 6A - F are respective views to illustrate a prior art display system.
Fig. 1 is a block diagram of an embodiment of the invention, illustrating an example of the present display system and a CRT.

CRT Controller 10 is used to control CRT 40 as a display unit. This controller counts the display positions on the screen of CRT 40, in the respective vertical and horizontal directions, and also generates timing signals.
Also, CRT Controller 10 includes adders 10a, 10c and registers lOb, lOd respectively shown in Fig. 3. Adder 10a deducts a value set in Register lOb, e.g., "16", from a vertical count signal generated in CRT Controller 10 and then sends out the result thereof as a vertical count signal for display. Adder 10c deducts a value set in Register 10d, e.g., "16" from a horizontal count signal generated in CRT Controller 10 and sends out the result thereof as a horizontal signal for display. Registers lOb, lOd are respectively adapted to be free to change their respective setting values.
VRAM 11 writes the data of CPU (not shown) once and reads out video signals repetitively to the synchronization/scanning of CRT 40. The read-out video signals are sent via Shift Register 12 to Logical Operation Circuit 30.
Cursor Generation Circuit 20, which has a register bank 24 to store the pattern data of a cursor (register memory) and the cursor display position specifying information, sends the cursor pattern data to Logical Operation Circuit 30 to the display timing.
Logical Operation Circuit 30 performs a logical operation on the data for the display contents of the screen transmitted from VRAM 11 and the cursor pattern data sent from Cursor Generation Circuit 20.
CRT 40 is an example of display units and other display units than CRT 40, such as a liquid crystal display unit and the like, may also be used.
In Fig. 2, there is illustrated an example of a register bank provided within Cursor Generation Circuit 20.
There are specified 8-bit cursor pattern data which respectively correspond to addresses "0000000" - "0111111". In accordance with the contents of the pattern data, the form of the cursor is specified. The contents of the pattern data are free to rewrite. In the illustrated embodiment, since the cursor pattern is 16 x 16 dots, a combination of two bytes respectively having successive addresses is used to hold a pattern corresponding to a single lateral and horizontal line.
Data (10 bits) corresponding to the addresses "1000000" and "1000001" of the register bank is used to specify a position in which the cursor is first displayed in the horizontal direction, and data (8 bits) corresponding to the addresses "1000010" and "1000011" of the register bank is used to specify a position in which the cursor is first displayed in the vertical direction. In this way, the display positions of the cursor are specified by using the values of X, Y coordinates.
The above-mentioned cursor horizontal position specifying register and the above-mentioned cursor vertical position specifying register shown in Fig. 2 are.respectively display position specifying registers to specify positions where the cursor is displayed.
Fig. 3 is a block diagram to illustrate a portion of CRT Controller 10 and the details of a cursor generation circuit and a logical operation circuit.
Adders 10a, 10c and Registers 10b, 10d are included within CRT Controller 10 and Registers 10b, 10d are used to specify the amount of displacement of the cursor relative to the display screen. Vertical and horizontal count signals for display are used as the address information for VRAM 11.
Adder 21 is used to find the difference between the vertical display position of the cursor and the vertical scan position, and is also used to deduct the output signal of the register bank cursor vertical position specifying register from the output signal (vertical count signal) of CRT Controller 10.
Comparator 22 is used to find the coincidence of the cursor display horizontal position with the horizontal scan position, and it compares the output signal (horizontal count signal) of CRT Controller 10 with the output signal of the register bank horizontal position specifying register and outputs a horizontal display position detection signal when both output signals coincide with each other.
Cursor Display Position Detection Circuit 26 is dedicated to outputting a load signal when the position where the display of the cursor is to be started is scanned, and a detailed example thereof is shown in Fig. 4.
Selector 23 is used to change an address signal required when new cursor pattern data is written into Register Memory 24 and an address signal required when the cursor pattern data written into Register Memory 24 is read out.
Register Memory 24 holds the pattern data of the cursor. In the illustrated embodiment, it is adapted to hold the cursor pattern data (16 x 16- bits) for two surfaces and output the data for a single line (32 bits) in parallel'. Of course, the pattern data may be composed of a different number of bits from the above-mentioned number, and also it may have a different number of surfaces from the above-mentioned number.
Shift Register 25 receives the data for a single line from Register Memory 24 when it receives a load signal from Cursor Display Position Detection Circuit 26, and outputs the data for 1 dot in accordance with a shift clock.
On the other hand, Logical Circuit 30 comprises Selector 30a, AND Circuit 31, XOR (Exclusive OR) Circuit 32 and Gate 33.
Selector 30a is a circuit to select a video signal or a border color signal from Border Color Register 13 in accordance with a display timing signal transmitted from CRT Controller 10.
AND Circuit 31 is a circuit to superpose the cursor pattern data transmitted from Cursor Generation Circuit 20 on either the video signal or the border color signal transmitted from Selector 30a.
XOR Circuit 32 is a circuit to produce a logically complementary color for the ANDed result.
Gate 33 is a circuit to disable either AND Circuit 31 or XOR Circuit 32, while a detailed example thereof is shown in Fig. 4.
Referring now to Fig. 4, there are illustrated Cursor Display Position Detection Circuit 26 and Gate 33 in detail.
Cursor Display Position Detection Circuit 26 includes NOR Circuit 26a to input the higher 4 bits out of the output signals of Adder 21, and AND Circuit 26b to receive the output signal of NOR Circuit 26a and the output signal of Comparator 22. Cursor Display Position Detection Circuit 26 scans the vertical display position and, when the horizontal display position is detected, generates a load signal so as to load the data stored in Register Memory 24 into Shift Register 25.
Gate 33 is used to clip the cursor in the borders of the screen and includes Inverter 33a, OR Circuit 33b and AND Circuit 33c. Inverter 33a inverts a display timing signal transmitted from CRT Controller 10, while OR Circuit 33b receives the output signals of Inverter 33a and Shift Register 25a and transmits its output signal to AND Circuit 31. AND Circuit 33c receives the display timing signal and the output signal of Shift Register 25b and transmits its output signal to XOR Circuit 32. If Gate 33 is omitted, then the cursor is displayed without clipping.
Next, we will describe the operation of the above-mentioned embodiment of the invention.
First, Selector 23 is changed over to the W side to write the pattern data of a given cursor into Register Memory 24. After then, Selector 23 is changed over back to the R side.
Then, the vertical and horizontal positions to display the cursor on CRT 40 are specified by the cursor verticla and horizontal position specifying registers of the register bank, respectively.
While scanning is being carried out on CRT 40, an 8-bit signal corresponding to the vertical scanning position is input to Adder 21 from CRT Controller 10. The difference between this 8-bit signal and the 8-bit data from Cursor Vertical Position Specifying Register is output as an 8-bit signal to Adder 21. The higher 4 bits of the last-mentioned 8-bit signal are forwarded to Cursor Display Position Detection Circuit 26, while the lower 4 bits thereof are sent via Selector 23 to Register Memory 24 as read-out addresses.
When the cursor display system is scanning within the range of 16 lines to display the cursor in CRT 40, all of the above-mentioned higher 4 bits transmitted to Cursor Display Position Detection Circuit 26 become "0". Thus, when the higher 4 bits are all "0", then NOR Circuit 26a outputs a vertical display position detection signal. While the vertical display position detection signal is being output, the output signal of the lower 4 bits of Adder 21 becomes an address signal of Register Memory 24 and the pattern data of the cursor specified by this address signal (data for a single line) is sent to Shift Register 25.
On the other hand, during scanning on CRT 40, a 10-bit signal corresponding to the horizontal scanning position is input to Comparator 22 from CRT Controller 10. When this 10-bit signal coincides with the 10-bit data from Cursor Horizontal Position Specifying Register, then Comparator 22 outputs a horizontal display position detection signal. When this horizontal display position detection signal and the above-mentioned vertical display position detection signal occur simultaneously, then AND Circuit 26b outputs a load signal. On receiving the load signal, Shift Register 25 loads the pattern data for a single line from Register Memory 24.
And, in accordance with the shift clocks, each pattern data for a single dot is output to AND Circuit 31 and XOR Circuit 32. AND Circuit 31 superposes the cursor pattern data on the video signal (changes the cursor from the status in Fig. 6A to the status in Fig. 6D), while XOR Circuit 32 produces a logically complementary color for the ANDed result (changes the cursor from the status in Fig. 6D to the status in Fig. 6E).
When the pattern data for 16 dots (that is, the data for one line) is output from Shift Register 25, no pattern data is supplied to AND Circuit 31 and XOR Circuit 32 and thus the screen display contents are displayed in the remaining portions of the line. And, when the display system scans the second line, the same scanning as mentioned above is carried out. In this case, however, the number of the read-out addresses of Register Memory 24 is increased by one.
If these operationes are repeated to carry out the scaning for 16 lines, then an operation to display one cursor is completed. And, if the 17th line is scanned, then "1" is included in the data of upper 4 bits received by NOR Circuit 26a so that AND Circuit 26b outputs the load signal no more. Therefore, in the remaining scanning for the relevent screen, the screen display contents are displayed. This completes the scanning for 1 screen. The scanning for the next screen can be performed by repeating similar operations to the above-mentioned operations.
Also, when scanning the display area of a screen, a display timing signal from CRT Controller 10 becomes "1", allowing Selector 30a to select the video signal. And, as Inverter 33a outputs "0", the pattern data from Shift Register 25 (25a in the illustrated embodiment), as it is, is applied to AND Circuit 31. Since "1" is applied to one input of AND Circuit 33c, the pattern data from Shift Register 25 (25b in the illustrated embodiment), as it is, is applied to XOR Circuit 32.
On the other hand, when scanning the borders of the screen, the display timing signal from CRT Controller 10 becomes "0", allowing Selector 30a to select the border color signal. And, in this case, as Inverter 33a outputs "1", OR Circuit 33b also outputs "1" and thus the pattern data from Shift Register 25 (25a in the illustrated embodiment) is not applied to AND Circuit 31. Also, since "0" is always input to one input of AND Circuit 33c, the pattern data from Shift Register 25 (25b in the illustrated embodiment) is not applied to XOR Circuit 32. For this reason, when scanning the borders of the screen, the cursor is clipped.
However, if Gate 33 is omitted by applying the output signal of Shift Register 25a directly to AND Circuit 31 as well as by applying the output signal of Shift Register 25b directly to XOR Circuit 32, then the cursor will not be clipped in the borders.
Next, if the value of either the cursor vertical position specifying register or the cursor horizontal position specifying register of the register bank is slightly changed and then the above-mentioned operations are repeated, then the cursor is displaced to another position corresponding to the change of the value and is displayed there. Thus, if such operation is repeatedly performed, then the cursor can be diplayed as if it were moving successively.
Adders 10a, 10c provided in CRT Controller 10 in Fig. 3 displace the cursor for an arbitrary number of dots (e.g., Hy) in the vertical direction and for an arbitrary number of dots (e.g., Hx) in the horizontal direction, respectively. That is, in accordance with the register values set in Registers lOb, 10d, Adders 10a, 10c change the displaying vertical count signal and the displaying horizontal count signal for the set values, respectively. Here, the above-mentioned Hx, Hy are the coordinate values of a hot spot HS (a display point intended by the cursor pattern), respectively.
And, since the displaying vertical count signal and horizontal count signal are used as the address information going to VRAM 11, the cursor is displaced relatively in the respective horizontal and vertical directions with respect to the display screen.
In other words, considering that coordinates shifted by the coordinates (Hx, Hy) of the hot spot HS with respect to the display coordinates are cursor coordinates, when a certain set of values (a, b) of the cursor coordinates are given as the cursor display position, then the values of the display coordinates where the above-mentioned hot spot HS is situated coincide with the values (a, b) of the cursor coordinates. This status is illustrated in Fig. 3A. In Fig. 3A, the display coordinates are shown by solid lines and the cursor coordinates after shifted are shown by one-dot chained lines.
In Fig. 3B, there is illustrated a circuit for fixing the amount of displacement of the cursor in.the vertical direction.
This displacement amount fixing circuit 10e, which is used instead of Register lOb, is adapted to displace the cursor by 16 dots in the vertical direction. Register 10b is able to change its memory contents freely, while, if Fixing Circuit 10e is used, then the amount of displacement thereof is fixed. Also, this circuit 10e may be used instead of Register 10d.
Adders 10a, 10c provided in CRT Controller 10 of Fig. 3 are adapted to displace the cursor by the number of vertical dots and by the number of horizontal dots, respectively. That is, when the size of the cursor is considered as 16 x 16 dots, in accordance with the value of 16 dots set by Register 10b, 10d, Adders 10a, 10c respectively change the displaying vertical count signal and the displaying horizontal count signal by the amounts for 16 dots.
Therefore, the cursor is displaced by 16 dots in the horizontal and vertical directions respectively with respect to the display screen so that an arbitrary point within the cursor can be superposed on an arbitrary spot on the display screen to display the cursor.
Referring now to Fig. 5, there is illustrated a block diagram of another embodiment of the invention.
Frequency Divider Circuit 27 is used to divide the frequency of shift clocks to be applied to Shift Register 25 previously. For example, if the clock is divided in frequency into a half thereof by Frequency Divider Circuit 27, then the shift clock is delayed to double the transverse (horizontal) length of the cursor to be displayed. In this way, when the number of division of the frequency of the above-mentioned clock is determined as a predetermined value, then the transverse width of the cursor is multiplied by this predetermined value. In this case, there is an advantage that the transverse length of the cursor can be extended without the need for increase of the capacities of Register Memory 24 and the above-mentioned register bank.
Bit Shift Circuit 28 is a circuit that shifts by 1 bit the value of a vertical count from CRT Controller 10 and, thereby, obtains a 1/2 count value equivalently. In this case, since the value of the vertical count from CRT Controller 10 is reduced (that is, the step-by-step operation of the read-out address of Register Memory 24 is reduced to half), the longitudinal (vertical) length of a cursor to be displayed becomes doubled. When the above-mentioned bit shift amount is dettermined at a given value, then the longitudinal length of the cursor is multiplied by a power of 2. In this case, there is also provided an advantage that the cursor longitudinal length can be extended without increasing the capacities of both Register Memory 24 and Register Bank.
Accordingly, the described embodimentsof the present invention have the effect that main job processings can be executed speedily because they are adapted to perform interrupt processings in a short time, when a cursor is to be displayed.

Claims

1. A display system, characterized by:

cursor pattern storage means (24) for storing the pattern of a given cursor;

display position specifier means (24) for specifying a position where said cursor is displayed;

cursor displacement means (10b,10d) for displacing said cursor in the horizontal and vertical directions thereof relatively to a display means (40); and,

cursor display means (40) for displaying said cursor.

2. A display system according to Claim 1, characterized in that said cursor displacement means (10b,10d) is fixed in the amount of displacement thereof.

3. A display system according to Claim 2, characterized in that said fixed amount of displacement is equal to the size of said cursor.

4. A display system according to Claim 1, characterized in that said cursor displacement means (10b,10d) is adjustable in the amount of displacement thereof.

5. A display system according to Claim 4, characterized in that said amount of displacement corresponds to the values of the coordinates where a hot spot of said cursor is situated.

6. A display system according to any one of claims 1 to 5, characterized in that said cursor pattern includes a plurality of surfaces.

7. A display system according to any one of claims 1 to 6, characterized in that said cursor is not clipped in the borders of said screen.

8. A display system, characterized by:

cursor pattern storage means (24) for storina the pattern of a given cursor;

cursor displacement means (10b,10d) for displaying said cursor in the horizontal and vertical directions thereof relatively to a display means (40);

cursor display means (40) for displaying said cursor; and

cursor clip means (33) for clipping said cursor in the borders of said display means.

9. A display system, characterized by:

cursor pattern storage means (24) for storing the pattern of a given cursor;

cursor displacement means (10b,10d) for displacing said cursor in the horizontal and vertical directions thereof relatively to a display means (40);

logical operation means (30) for performing logical operations on the pattern data of said cursor and the data of display contents; and,

cursor display means (40) for displaying said cursor.

10. A display system according to Claim 9, characterized in that said cursor pattern includes a plurality of surfaces.

11. A display system according to Claim 10, characterized in that said logical operation means (30) is adapted to perform logical operations for surfaces of siad cursor pattern which are different from one another.

12. A display system, characterized by:

cursor pattern storage means (24) for storing the pattern of a given cursor;

cursor displacement means :(10b,10d) for displaying said curso: in the horizontal and vertical directions thereof relatively to a display means (40)

logical operation means (30) for performing logical operations on the data of said cursor pattern and the data of display contents;

shift clock control means for controlling the shift clock of a shift register (25) which outputs said cursor pattern to said logical operation means (30) and the shift clock of another shift register (12) which outputs the display contents of a VRAM (11) so as to be different from each other: and,

cursor display means (40) for displaying said cursor.

13. A display system according to Claim 12, characterized in that said shift clock control means is adapted to divide the frequency of said shift clock of said register (25) outputting said cursor pattern to said logical operation means (30) into one half thereof with respect to said shift clock of said shift register (12) outputting said display contents of said VRAM (11), and that said shift clock control means is able to double the transverse display width of said cursor without increasing the memory capacity of said cursor pattern register (24).

14. A display system, characterized by:

a cursor pattern register (24) for storing the pattern of a given cursor;

display position specifying means (24) for specifying a position where said cursor is displayed;

logical operation means (30) for performing logical operations on the pattern data of said cursor and the data of display contents;

bit shift means (28) for bit shifting the value of a vertical counter;

a comparing adder (21) for comparing said bit shifted value with the value of a Y coordinate display position register; and

cursor display means (40) for displaying said cursor pattern,

said cursor pattern register (24), said

display position specifying means (24), siad cursor displacement means (10b,10d), said logical operation means (30), said bit shift means (28), said comparing adder (21), and said cursor display means (40) being provided within a display control unit.

15. A display system according to Claim 14, characterized in that said bit shift means (28) is adapted to bit shift by 1 bit the input of said vertical counter, and that the vertical display width of said cursor can be doubled without increasing the memory capacity of said cursor pattern register (24).

16. A display system, characterized by:

cursor pattern storage means (24) for storing the pattern of a given cursor;

display position specifier means (24) for specifying a position where said cursor is displayed; and

cursor display means (40) for displaying said cursor.