EP0182988B1 - Circuit for adapting a computer to a colour monitor - Google Patents

Circuit for adapting a computer to a colour monitor Download PDF

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Publication number
EP0182988B1
EP0182988B1 EP85111552A EP85111552A EP0182988B1 EP 0182988 B1 EP0182988 B1 EP 0182988B1 EP 85111552 A EP85111552 A EP 85111552A EP 85111552 A EP85111552 A EP 85111552A EP 0182988 B1 EP0182988 B1 EP 0182988B1
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EP
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Prior art keywords
signals
circuit
digital
circuit arrangement
arrangement according
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German (de)
French (fr)
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EP0182988A3 (en
EP0182988A2 (en
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Gerald Dipl.-Ing Gronau
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Blaupunkt Werke GmbH
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Blaupunkt Werke GmbH
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/28—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using colour tubes
    • G09G1/285—Interfacing with colour displays, e.g. TV receiver

Definitions

  • the invention is based on a circuit according to the type of the main claim.
  • Computers have outputs for the color signals for connection to color monitors. At these outputs there are digital signals for the colors red, green and blue, that is to say signals which can only assume two values. Each of these signals therefore only indicates whether the corresponding color should light up on the screen or not. By combining these three basic colors, a total of eight colors including black and white are possible.
  • a further development is an additional computer output for a fourth digital signal representing the intensity. This makes it possible to display a total of 16 colors on the monitor.
  • the object of the present invention is to provide a circuit which, from the four digital signals at the output of a computer, obtains three analog color value signals required for controlling the monitor.
  • the circuit arrangement according to the invention with the characterizing features of the main claim has the advantage that the adaptation of the digital outputs of a computer to the analog inputs of a color monitor takes place with very little circuitry complexity. Another advantage is that the energy consumption of this circuit is also very low. Finally, the color rendering is largely independent of level fluctuations in the digital signals.
  • the inputs 1, 2, 3 and 4 of the circuit arrangement according to FIG. 1 are supplied by the computer with the digital signals R d , G d , B d and I d (red, green, blue and intensity). These signals are output signals from TTL circuits and should therefore be 0 or 5 V depending on the logic value. In some computers, however, the TTL circuits are followed by driver stages which either have a larger signal amplitude and / or a negative DC voltage value. In the circuit arrangement according to FIG. 1, protective circuits 5, 6, 7 and 8 are therefore provided in order to protect the subsequent circuits from excessive or negative voltages. An embodiment of such a protective circuit is explained in more detail in FIG. 2.
  • the signals R d , G d , B d and I d now limited in their level range arrive at a first inverting switchable limiter amplifier 9, 10, 11 and 12.
  • These switchable limiter amplifiers - called tri-state buffers in English - are in the Digital signal processing frequently used elements, which are usually intended to forward digital signals, which originate from a source of higher impedance, to other devices (circuits, lines) with low impedance.
  • the switchable limiter amplifiers have a switch input with which the signal flow can be interrupted. If an H level is applied to this switching input, the output becomes high-impedance, so that the output assumes the level which is supplied, for example, via a resistor.
  • Switchable limiter amplifiers of this type which additionally invert the signals, are now inserted in the feed lines of the color signals and the intensity signal.
  • a suitable pulse for example the sandcastle pulse already present in a color monitor, is supplied via an input 13.
  • the pulse is fed to the switching inputs of the inverting switchable limiter amplifiers 9 to 12, with the result that no digital color signals are passed on during the duration of the Sandcastle pulse.
  • the following circuit has the effect that in this case there is a level at the outputs 23, 24 and 25 which corresponds to the value black.
  • the output signals of the amplifiers 9 to 12 are fed to further inverting switchable limiter amplifiers 15, 16, 17 and 18. No signal is fed to them via the switching input, so that they constantly forward the signals at the input in inverted form.
  • the limiting amplifiers 15, 16 and 17 are each followed by a resistance matrix 19, 20 and 21. Every resistance matrix will also the output signal of the limiter amplifier 18 is supplied. Depending on the present digital level of the intensity signal, the amplitude emitted by the respective limiter amplifier 15, 16, 17 is influenced.
  • An embodiment for a resistance matrix will be explained in connection with FIG. 2.
  • the exemplary embodiment according to FIG. 1 has a further special feature.
  • a "color logic" circuit 22 is therefore used to determine whether this combination of the input signals is present. If applicable, a corresponding signal is fed to the resistance matrix 20.
  • the color logic 22 is supplied with the signals R d and G d in non-inverted form, the signals B d and I d in inverted form.
  • This can be achieved very easily in the circuit according to the invention in that the inputs of the color logic 22 are connected to the outputs of the first or second inverting limiter amplifier, each of which is present in a color channel.
  • the analog color value signals are then available for the usual further processing in a color monitor up to the supply to the control electrodes of the picture tube.
  • FIG. 2 shows a more detailed representation of the circuit according to FIG. 1.
  • the protective circuits 5, 6, 7, 8 (FIG. 1) each consist of two Schottky diodes 31 and 32 and a resistor 33 connected in series with the respective input While one of the Schottky diodes is connected to ground, the other is connected to a positive operating voltage. If the voltage falls below 0 V or if the positive operating voltage of 5 V is exceeded, which is supplied to the circuit at 35, one diode becomes conductive and thus limits the input voltage. Finally, a resistor 34 is provided in each protection circuit in order to achieve a defined input potential when the input is open.
  • the protective circuits 5, 6, 7, 8 are identical to one another. Your elements are therefore provided with the same reference numerals.
  • the switching inputs of the inverting switchable limiter amplifier 9, 10, 11, 12, the function of which has already been described in connection with FIG. 1, are controlled via a switching transistor 36 and a NAND circuit 37 operated as an inverting circuit.
  • the switching transistor 36 is supplied with the so-called Sandcastle pulse via an input 38 and a parallel connection of a resistor 39 and a capacitor 40 for pulse shaping.
  • a resistor 41 serves the switching transistor 36 as a load resistor.
  • the resistors 51 reach positive potential at the inputs of the subsequent amplifiers 15, 16, 17, 18, at whose outputs the potential for black is present.
  • a switching function is not required for the second inverting limiter amplifiers 15, 16, 17, 18.
  • those with switching functions were used, since all 8 required limiter amplifiers are inexpensively available on a chip.
  • the switching inputs of the respective second limiter amplifiers 15, 16, 17, 18 are therefore connected to ground potential and are therefore ineffective.
  • the outputs of the limiter amplifiers for the signals R, G and B are each fed to a resistor 42 of a matrix circuit.
  • Another resistor 43 of this matrix circuit is supplied with the output signal of the second limiter amplifier for the signal id.
  • the signals R, G and B have different amplitudes at the connection points of the resistors 42 and 43.
  • These signals are then supplied to the outputs 23, 24 and 25 via a resistor network 44, 45, 46 and 47 and via a coupling capacitor 48.
  • the potentiometers 46 contained in the network are used to adjust the output levels, the resistors 47 serving to limit the setting range.
  • a color logic 22 serves to reduce the amplitude of the G signal when the color brown is to be displayed.
  • the color logic is represented by a NAND circuit 22, which the digital signals R d and G d by the limiter amplifier 15, 16 and the digital signals B d and l d after the inversion by the inverting switchable limiter amplifier 11, 12 are supplied.
  • the output of the NAND circuit 22 is then connected to a switching transistor 49, which connects the resistor 50 to ground potential.
  • the voltage divider ratios in the resistance matrix for the G signal are thus changed in the sense of a reduction in the amplitude.

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Processing Of Color Television Signals (AREA)
  • Spectrometry And Color Measurement (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

In this arrangement, three digital colour signals and a digital intensity signal are each supplied to one inverting switchable limiter amplifier and the outputs of the limiter amplifiers provided for the digital colour signals and the output of the limiter amplifier provided for the digital intensity signal are connected to resistance matrices, colour signals with the aid of which the analog value suitable for the colour monitor are derived.

Description

Die Erfindung geht aus von einer Schaltung nach der Gattung des Hauptanspruchs.The invention is based on a circuit according to the type of the main claim.

Computer weisen zum Anschluß an Farbmonitore Ausgänge für die Farbsignale aus. An diesen Ausgängen stehen jeweils für die Farben Rot, Grün und Blau digitale Signale, das heißt Signale, welche nur zwei Werte annehmen können, an. Jedes dieser Signale zeigt also lediglich an, ob die entsprechende Farbe auf dem Bildschirm aufleuchten oder nicht aufleuchten soll. Durch Kombination dieser drei Grundfarben sind insgesamt acht Farben einschließlich Schwarz und Weiß möglich.Computers have outputs for the color signals for connection to color monitors. At these outputs there are digital signals for the colors red, green and blue, that is to say signals which can only assume two values. Each of these signals therefore only indicates whether the corresponding color should light up on the screen or not. By combining these three basic colors, a total of eight colors including black and white are possible.

Eine Weiterentwicklung stellt ein zusätzlicher Computerausgang für ein die Intensität darstellendes viertes digitales Signal dar. Dadurch ist es möglich, insgesamt 16 Farben auf dem Monitor darzustellen.A further development is an additional computer output for a fourth digital signal representing the intensity. This makes it possible to display a total of 16 colors on the monitor.

Aufgabe der vorliegenden Erfindung ist es, eine Schaltung anzugeben, welche aus den vier digitalen Signalen am Ausgang eines Computers drei zur Steuerung des Monitors erforderliche analoge Farbwertsignale gewinnt.The object of the present invention is to provide a circuit which, from the four digital signals at the output of a computer, obtains three analog color value signals required for controlling the monitor.

Die erfindungsgemäße Schaltungsanordnung mit den kennzeichnenden Merkmalen des Hauptanspruchs hat den Vorteil, daß die Anpassung der digitalen Ausgänge eines Computers an die analogen Eingänge eines Farbmonitors mit sehr geringem schaltungstechnischen Aufwand erfolgt. Als weiterer Vorteil ist anzusehen, daß auch die Energieaufnahme dieser Schaltung recht gering ist. Schließlich ist die Farbwiedergabe in weiten Grenzen unabhängig von Pegelschwankungen der digitalen Signale.The circuit arrangement according to the invention with the characterizing features of the main claim has the advantage that the adaptation of the digital outputs of a computer to the analog inputs of a color monitor takes place with very little circuitry complexity. Another advantage is that the energy consumption of this circuit is also very low. Finally, the color rendering is largely independent of level fluctuations in the digital signals.

Durch die in den Unteransprüchen aufgeführten Maßnahmen sind vorteilhafte Weiterbildungen und Verbesserungen der im Hauptanspruch angegebenen Schaltungsanordnung möglich. Besonders vorteilhaft ist, die Eingänge für die digitalen Signale mit Schutzschaltungen zu versehen, da die entsprechenden Ausgangssignale der verschiedenen Computer im Hinblick auf die Amplitude und den Gleichspannungspegel nicht in jedem Fall der Norm entsprechen.Advantageous further developments and improvements of the circuit arrangement specified in the main claim are possible through the measures listed in the subclaims. It is particularly advantageous to provide the inputs for the digital signals with protective circuits, since the corresponding output signals from the various computers do not always correspond to the standard with regard to the amplitude and the DC voltage level.

Ein Ausführungsbeispiel der Erfindung ist an Hand der Figuren dargestellt und in der nachfolgenden Beschreibung näher erläutert.

  • Fig. 1 zeigt ein Blockschaltbild des Ausführungsbeispiels,
  • Fig. 2 zeigt ein Schaltbild des Ausführungsbeispiels in detaillierter Darstellung.
An embodiment of the invention is shown with reference to the figures and explained in more detail in the following description.
  • 1 shows a block diagram of the exemplary embodiment,
  • Fig. 2 shows a circuit diagram of the embodiment in a detailed representation.

Gleiche Teile sind in den Figuren mit gleichen Bezugszeichen versehen.Identical parts are provided with the same reference symbols in the figures.

Den Eingängen 1, 2, 3 und 4 der Schaltungsanordnung nach Fig. 1 werden vom Computer die digitalen Signale Rd, Gd, Bd und Id (rot, grün, blau und Intensität) zugeführt. Diese Signale sind an sich Ausgangssignale von TTL-Schaltungen und sollten daher je nach logischem Wert 0 oder 5 V betragen. Bei manchen Computern sind jedoch den TTL-Schaltungen Treiberstufen nachgeschaltet, welche entweder eine größere Signalamplitude und/oder einen negativen Gleichspannungswert aufweisen. Bei der Schaltungsanordnung nach Fig. 1 sind daher Schutzschaltungen 5, 6, 7 und 8 vorgesehen, um die nachfolgenden Schaltungen vor zu hohen bzw. negativen Spannungen zu schützen. Eine Ausführungsform einer solchen Schutzschaltung ist in Fig. 2 näher erläutert.The inputs 1, 2, 3 and 4 of the circuit arrangement according to FIG. 1 are supplied by the computer with the digital signals R d , G d , B d and I d (red, green, blue and intensity). These signals are output signals from TTL circuits and should therefore be 0 or 5 V depending on the logic value. In some computers, however, the TTL circuits are followed by driver stages which either have a larger signal amplitude and / or a negative DC voltage value. In the circuit arrangement according to FIG. 1, protective circuits 5, 6, 7 and 8 are therefore provided in order to protect the subsequent circuits from excessive or negative voltages. An embodiment of such a protective circuit is explained in more detail in FIG. 2.

Die nunmehr in ihrem Pegelbereich begrenzten Signale Rd, Gd, Bd und Id gelangen zu je einem ersten invertierenden schaltbaren Begrenzerverstärker 9, 10, 11 und 12. Diese schaltbaren Begrenzerverstärker - im Englischen Tri-State-Buffer genannt - sind in der digitalen Signalverarbeitung häufig gebrauchte Elemente, welche üblicherweise dazu vorgesehen sind, digitale Signale, welche aus einer Quelle höherer Impedanz stammen, an weitere Einrichtungen (Schaltungen, Leitungen) mit niedrigem Impedanz weiterzuleiten. Außer einem Eingang und einem Ausgang weisen die schaltbaren Begrenzerverstärker einen Schalteingang auf, mit dessen Hilfe der Signalfluß unterbrochen werden kann. Legt man an diesen Schalteingang einen H-Pegel an, wird der Ausgang hochohmig, so daß der Ausgang denjenigen Pegel annimmt, welcher beispielsweise über einen Widerstand zugeführt wird.The signals R d , G d , B d and I d now limited in their level range arrive at a first inverting switchable limiter amplifier 9, 10, 11 and 12. These switchable limiter amplifiers - called tri-state buffers in English - are in the Digital signal processing frequently used elements, which are usually intended to forward digital signals, which originate from a source of higher impedance, to other devices (circuits, lines) with low impedance. In addition to an input and an output, the switchable limiter amplifiers have a switch input with which the signal flow can be interrupted. If an H level is applied to this switching input, the output becomes high-impedance, so that the output assumes the level which is supplied, for example, via a resistor.

Derartige schaltbare Begrenzerverstärker, welche zusätzlich die Signale noch invertieren, sind nun in die Zuleitungen der Farbsignale und des Intensitätssignal eingefügt.Switchable limiter amplifiers of this type, which additionally invert the signals, are now inserted in the feed lines of the color signals and the intensity signal.

Sie erfüllen drei Aufgaben:

  • Sie erzeugen eine von der Amplitude der zugeführten digitalen Signale unabhängige Signalamplitude,
  • sie erzeugen invertierte digitale Farbsignale, welche zur Ansteuerung einer weiter unten beschriebenen Schaltung benötigt werden,
  • sie ermöglichen eine Austastung der digitalen Farbsignale, da die vom Computer abgegebenen Farbsignale im allgemeinen eine für einen Farbmonitor zu kleine Austastlücke aufweisen.
They perform three tasks:
  • They generate a signal amplitude that is independent of the amplitude of the supplied digital signals,
  • they generate inverted digital color signals, which are required to control a circuit described below,
  • they enable blanking of the digital color signals since the color signals emitted by the computer generally have a blanking gap which is too small for a color monitor.

Zur Erzeugung der normgerechten Ausgangssignale wird über einen Eingang 13 ein geeigneter Impuls, beispielsweise der in einem Farbmonitor ohnehin vorhandene Sandcastle-Impuls zugeführt. Nach entsprechender Aufbereitung in der Schaltung 14 wird der Impuls den Schalteingängen der invertierenden schaltbaren Begrenzerverstärker 9 bis 12 zugeführ, womit bewirkt wird, daß während der Dauer des Sandcastle-Impulses keine digitalen Farbsignale weitergeleitet werden. Die nachfolgende Schaltung bewirkt, daß in diesem Fall an den Ausgängen 23, 24 und 25 ein Pegel ansteht, der dem Wert Schwarz entspricht.To generate the standard-compliant output signals, a suitable pulse, for example the sandcastle pulse already present in a color monitor, is supplied via an input 13. After appropriate processing in the circuit 14, the pulse is fed to the switching inputs of the inverting switchable limiter amplifiers 9 to 12, with the result that no digital color signals are passed on during the duration of the Sandcastle pulse. The following circuit has the effect that in this case there is a level at the outputs 23, 24 and 25 which corresponds to the value black.

Die Ausgangssignale der Verstärker 9 bis 12 werden weiteren invertierenden schaltbaren Begrenzerverstärkern 15, 16, 17 und 18 zugeführt. Diesen wird über den Schalteingang kein Signal zugeführt, so daß sie ständig die am Eingang befindlichen Signale in invertierter Form weiterleiten.The output signals of the amplifiers 9 to 12 are fed to further inverting switchable limiter amplifiers 15, 16, 17 and 18. No signal is fed to them via the switching input, so that they constantly forward the signals at the input in inverted form.

Zur Beeinflussung der Amplitude der analogen Signale R, G, B ist den Begrenzerverstärkern 15, 16 und 17 je eine Widerstandsmatrix 19, 20 und 21 nachgeschaltet. Jeder Widerstandsmatrix wird außerdem das Ausgangssignal des Begrenzerverstärkers 18 zugeführt. Je nach vorliegendem digitalen Pegel des Intensitätssignals wird die vom jeweiligen Begrenzerverstärker 15, 16, 17 abgegebene Amplitude beeinflußt. Eine Ausführungsform für eine Widerstandsmatrix wird im Zusammenhang mit Fig. 2 noch erläutert.In order to influence the amplitude of the analog signals R, G, B, the limiting amplifiers 15, 16 and 17 are each followed by a resistance matrix 19, 20 and 21. Every resistance matrix will also the output signal of the limiter amplifier 18 is supplied. Depending on the present digital level of the intensity signal, the amplitude emitted by the respective limiter amplifier 15, 16, 17 is influenced. An embodiment for a resistance matrix will be explained in connection with FIG. 2.

Das Ausführungsbeispiel nach Fig. 1 weist noch eine weitere Besonderheit auf. Bei der Signalkombination, welche vom Computer für die Farbe "dunkelgelb" abgegeben wird, soll auf dem Bildschirm des Monitors jedoch die Farbe "braun" erscheinen. Die Signale an den Eingängen 1, 2, 3 und 4 weisen in diesem Fall die Pegel Rd=H, Gd=H, Bd=L, Id=L auf. Um eine Darstellung der Farbe braun zu erreichen, ist es jedoch erforderlich für diese Signalkombination die Amplitude des analogen Grün-Signals zu reduzieren. In einer "Farblogik"-Schaltung 22 wird daher festgestellt, ob diese Kombination der Eingangssignale vorliegt. Im zutreffenden Fall wird der Widerstandsmatrix 20 ein entsprechendes Signal zugeführt. Der Farblogik 22 werden dazu die Signale Rd und Gd in nicht invertierter, die Signale Bd und Id in invertierter Form zugeführt. Dieses läßt sich bei der erfindungsgemäßen Schaltung sehr leicht dadurch erreichen, daß die Eingänge der Farblogik 22 an die Ausgänge des ersten oder zweiten in jeweils einem Farbkanal vorhandenen invertierenden Begrenzerverstärkers angeschlossen werden.The exemplary embodiment according to FIG. 1 has a further special feature. With the signal combination, which is given by the computer for the color "dark yellow", however, the color "brown" should appear on the monitor screen. In this case, the signals at inputs 1, 2, 3 and 4 have the levels R d = H, G d = H, B d = L, I d = L. To achieve a representation of the color brown, however, it is necessary to reduce the amplitude of the analog green signal for this signal combination. A "color logic" circuit 22 is therefore used to determine whether this combination of the input signals is present. If applicable, a corresponding signal is fed to the resistance matrix 20. For this purpose, the color logic 22 is supplied with the signals R d and G d in non-inverted form, the signals B d and I d in inverted form. This can be achieved very easily in the circuit according to the invention in that the inputs of the color logic 22 are connected to the outputs of the first or second inverting limiter amplifier, each of which is present in a color channel.

An den Ausgängen 23, 24 und 25 der Schaltungsanordnung nach Fig. 1 stehen dann die analogen Farbwertsignale zur üblichen Weiterverarbeitung in einem Farbmonitor bis zur Zuführung zu den Steuerelektroden der Bildröhre zur Verfügung.At the outputs 23, 24 and 25 of the circuit arrangement according to FIG. 1, the analog color value signals are then available for the usual further processing in a color monitor up to the supply to the control electrodes of the picture tube.

Fig. 2 stellt eine detailliertere Derstellung der Schaltung nach Fig. 1 dar. Die Schutzschaltungen 5, 6, 7, 8 (Fig. 1) bestehen aus je zwei Schottky-Dioden 31 und 32 und einem in Reihe mit dem jeweiligen Eingang geschalteten Widerstand 33. Während eine der Schottky-Dioden an Masse geschaltet ist, ist die andere mit positiver Betriebsspannung verbunden. Bei Unterschreiten von 0 V wie bei Überschreiten der positiven Betriebsspannung von 5 V, welche der Schaltung bei 35 zugeführt wird, wird jeweils eine Diode leitend und begrenzt somit die Eingangsspannung. Schließlich ist noch ein Widerstand 34 in jeder Schutzschaltung vorgesehen, um bei offenem Eingang ein definiertes Eingangspotential zu erzielen.FIG. 2 shows a more detailed representation of the circuit according to FIG. 1. The protective circuits 5, 6, 7, 8 (FIG. 1) each consist of two Schottky diodes 31 and 32 and a resistor 33 connected in series with the respective input While one of the Schottky diodes is connected to ground, the other is connected to a positive operating voltage. If the voltage falls below 0 V or if the positive operating voltage of 5 V is exceeded, which is supplied to the circuit at 35, one diode becomes conductive and thus limits the input voltage. Finally, a resistor 34 is provided in each protection circuit in order to achieve a defined input potential when the input is open.

Die Schutzschaltungen 5, 6, 7, 8 sind untereinander gleich. Ihre Elemente sind daher auch mit gleichen Bezugszeichen versehen. Die Schalteingänge der invertierenden schaltbaren Begrenzerverstärker 9, 10, 11, 12, deren Funktion bereits im Zusammenhang mit Fig. 1 beschrieben wurde, werden über einen Schalttransistor 36 und eine als Invertierschaltung betriebene NAND-Schaltung 37 angesteuert. Dem Schalttransistor 36 wird über einen Eingang 38 und eine zur Impulsformung dienende Parallelschaltung eines Widerstandes 39 und eines Kondensators 40 der sogenannte Sandcastle-Impuls zugeführt. Ein Widerstand 41 dient dem Schalttransistor 36 als Arbeitswiderstand.The protective circuits 5, 6, 7, 8 are identical to one another. Your elements are therefore provided with the same reference numerals. The switching inputs of the inverting switchable limiter amplifier 9, 10, 11, 12, the function of which has already been described in connection with FIG. 1, are controlled via a switching transistor 36 and a NAND circuit 37 operated as an inverting circuit. The switching transistor 36 is supplied with the so-called Sandcastle pulse via an input 38 and a parallel connection of a resistor 39 and a capacitor 40 for pulse shaping. A resistor 41 serves the switching transistor 36 as a load resistor.

Ist der jeweils erste invertierende schaltbare Begrenzerverstärker 9, 10,11, 12 gesperrt, gelangt über die Widerstände 51 positives Potential an die Eingänge der nachfolgenden Verstärker 15, 16, 17, 18, an deren Ausgängen das für Schwarz vorgesehene Potential liegt.If the respective first inverting switchable limiter amplifier 9, 10, 11, 12 is blocked, the resistors 51 reach positive potential at the inputs of the subsequent amplifiers 15, 16, 17, 18, at whose outputs the potential for black is present.

Wie im Zusammenhang mit Fig. 1 erwähnt, ist eine Schaltfunktion bei den zweiten invertierenden Begrenzerverstärkern 15, 16, 17, 18 nicht erforderlich. Bei dem vorliegendem Ausführungsbeispiel wurden jedoch solche mit Schaltfunktionen verwendet, da alle 8 erforderlichen Begrenzerverstärker preisgünstig auf einem Chip erhältlich sind. Die Schalteingänge der jeweils zweiten Begrenzerverstärker 15, 16, 17, 18 sind daher mit Massepotential verbunden und somit wirkungslos.As mentioned in connection with FIG. 1, a switching function is not required for the second inverting limiter amplifiers 15, 16, 17, 18. In the present exemplary embodiment, however, those with switching functions were used, since all 8 required limiter amplifiers are inexpensively available on a chip. The switching inputs of the respective second limiter amplifiers 15, 16, 17, 18 are therefore connected to ground potential and are therefore ineffective.

Die Ausgänge der Begrenzerverstärker für die Signale R, G und B werden jeweils einem Widerstand 42 je einer Matrixschaltung zugeführt.The outputs of the limiter amplifiers for the signals R, G and B are each fed to a resistor 42 of a matrix circuit.

Einem anderen Widerstand 43 dieser Matrixschaltung wird das Ausgangssignal des zweiten Begrenzerverstärkers für das Signal ld zugeführt. Je nach logischem Wert des Signals Id weisen die Signale R, G und B an den Verbindungspunkten der Widerstände 42 und 43 unterschiedliche Amplituden auf. Diese Signale werden dann über ein Widerstandsnetzwerk 44, 45, 46 und 47 sowie über einen Koppelkondensator 48 den Ausgängen 23, 24 und 25 zugeführt. Die im Netzwerk enthaltenen Potentiometer 46 dienen zur Justierung der Ausgangspegel, wobei die Widerstände 47 zur Begrenzung des Einstellbereichs dienen.Another resistor 43 of this matrix circuit is supplied with the output signal of the second limiter amplifier for the signal id. Depending on the logical value of the signal I d , the signals R, G and B have different amplitudes at the connection points of the resistors 42 and 43. These signals are then supplied to the outputs 23, 24 and 25 via a resistor network 44, 45, 46 and 47 and via a coupling capacitor 48. The potentiometers 46 contained in the network are used to adjust the output levels, the resistors 47 serving to limit the setting range.

Wie bereits im Zusammenhang mit Fig. 1 erläutert, dient eine Farblogik 22 zur Amplitudenabsenkung des G-Signals, wenn die Farbe Braun dargestellt werden soll. Bei der Schaltung nach Fig. 2 wird die Farblogik durch eine NAND-Schaltung 22 dargestellt, welcher die digitalen Signale Rd und Gd durch die Begrenzerverstärker 15, 16 und die digitalen Signale Bd und ld nach der Invertierung durch die invertierenden schaltbaren Begrenzerverstärker 11, 12 zugeführt werden. Der Ausgang der NAND-Schaltung 22 ist dann mit einem Schalttransistor 49 verbunden, welcher den Widerstand 50 mit Massepotential verbindet. Somit werden die Spannungsteilerverhältnisse in der Widerstandsmatrix für das G-Signal im Sinne einer Verringerung der Amplitude geändert.As already explained in connection with FIG. 1, a color logic 22 serves to reduce the amplitude of the G signal when the color brown is to be displayed. 2, the color logic is represented by a NAND circuit 22, which the digital signals R d and G d by the limiter amplifier 15, 16 and the digital signals B d and l d after the inversion by the inverting switchable limiter amplifier 11, 12 are supplied. The output of the NAND circuit 22 is then connected to a switching transistor 49, which connects the resistor 50 to ground potential. The voltage divider ratios in the resistance matrix for the G signal are thus changed in the sense of a reduction in the amplitude.

Claims (8)

1. Circuit arrangement for adapting a computer to a colour monitor, the computer having outputs for three digital colour signals and a digital intensity signal, whilst the monitor has three inputs for analogue colour value signals, characterized in that the digital signals are each fed to an inverting switchable limiting amplifier (9, 10, 11, 12), in that the outputs of the limiting amplifiers (9, 10, 11) provided for the digital colour signals (Rd, Gd, Bd) are connected in each case to a first input of a resistance matrix (19, 20, 21), and in that the output of the limiting amplifier (18) provided for the digital intensity signal (ld) is connected in each case to a second input of the resistance matrices (19, 20, 21).
2. Circuit arrangement according to Claim 1, characterized in that a protection circuit (5, 6, 7, 8) is connected upstream of each of the limiting amplifiers (9, 10, 11, 12).
3. Circuit arrangement according to Claim 2, characterized in that the protection circuit (5, 6, 7, 8) consists of a resistor (33) arranged in the signal path and two diodes (31, 32) which are each supplied with a potential corresponding to the admissible positive or negative extreme value of the input signal.
4. Circuit arrangement according to Claim 1, characterized in that blanking pulses are fed to the switch inputs of the inverting switchable limiting amplifiers (9, 10, 11, 12).
5. Circuit arrangement according to Claim 4, characterized in that the blanking pulses are derived from so-called sand castle pulses.
6. Circuit arrangement according to Claim 1, characterized in that further inverting limiting amplifiers (15, 16, 17, 18) are connected between the inverting switchable limiting amplifiers (9, 10, 11, 12) and the inputs of the resistance matrices (19,20,21).
7. Circuit arrangement according to Claim 6, characterized in that the limiting amplifiers and the further limiting amplifiers are arranged in an integrated circuit.
8. Circuit arrangement according to Claim 1, characterized in that an arrangement (49, 50) for reducing the amplitude of the analogue green signal (G) is provided in the path of the analogue green signal (G), said arrangement being controlled by a logic circuit (22), to which the digital colour signals (Rd, Gd, Bd) and the digital intensity signal (ld) are fed.
EP85111552A 1984-11-29 1985-09-12 Circuit for adapting a computer to a colour monitor Expired - Lifetime EP0182988B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT85111552T ATE59110T1 (en) 1984-11-29 1985-09-12 CIRCUIT ARRANGEMENT FOR ADAPTING A COMPUTER TO A COLOR MONITOR.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE3443469 1984-11-29
DE19843443469 DE3443469A1 (en) 1984-11-29 1984-11-29 CIRCUIT ARRANGEMENT FOR ADAPTING A COMPUTER TO A COLOR MONITOR

Publications (3)

Publication Number Publication Date
EP0182988A2 EP0182988A2 (en) 1986-06-04
EP0182988A3 EP0182988A3 (en) 1987-10-28
EP0182988B1 true EP0182988B1 (en) 1990-12-12

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EP85111552A Expired - Lifetime EP0182988B1 (en) 1984-11-29 1985-09-12 Circuit for adapting a computer to a colour monitor

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EP (1) EP0182988B1 (en)
AT (1) ATE59110T1 (en)
DE (2) DE3443469A1 (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
PL272919A1 (en) * 1988-06-08 1990-01-22 Zaklady Kineskopowe Unitra Pol Input circuit of colour crt display unit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5829514B2 (en) * 1978-06-13 1983-06-23 松下電器産業株式会社 Video amplification circuit for CRT display
US4388639A (en) * 1981-05-18 1983-06-14 Zenith Radio Corporation Color control circuit for teletext-type decoder

Also Published As

Publication number Publication date
DE3580903D1 (en) 1991-01-24
EP0182988A3 (en) 1987-10-28
ATE59110T1 (en) 1990-12-15
EP0182988A2 (en) 1986-06-04
DE3443469A1 (en) 1986-05-28

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