EP0173249B2 - Système de mémoire non-volatile avec possibilité d'enregistrement de données de temps réels et de baisse de puissance pour une machine à affranchir électronique - Google Patents
Système de mémoire non-volatile avec possibilité d'enregistrement de données de temps réels et de baisse de puissance pour une machine à affranchir électronique Download PDFInfo
- Publication number
- EP0173249B2 EP0173249B2 EP19850110530 EP85110530A EP0173249B2 EP 0173249 B2 EP0173249 B2 EP 0173249B2 EP 19850110530 EP19850110530 EP 19850110530 EP 85110530 A EP85110530 A EP 85110530A EP 0173249 B2 EP0173249 B2 EP 0173249B2
- Authority
- EP
- European Patent Office
- Prior art keywords
- volatile memory
- accounting data
- postage meter
- power down
- meter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00362—Calculation or computing within apparatus, e.g. calculation of postage value
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00314—Communication within apparatus, personal computer [PC] system, or server, e.g. between printhead and central unit in a franking machine
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00314—Communication within apparatus, personal computer [PC] system, or server, e.g. between printhead and central unit in a franking machine
- G07B2017/00338—Error detection or handling
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00314—Communication within apparatus, personal computer [PC] system, or server, e.g. between printhead and central unit in a franking machine
- G07B2017/00346—Power handling, e.g. power-down routine
-
- G—PHYSICS
- G07—CHECKING-DEVICES
- G07B—TICKET-ISSUING APPARATUS; FARE-REGISTERING APPARATUS; FRANKING APPARATUS
- G07B17/00—Franking apparatus
- G07B17/00185—Details internally of apparatus in a franking system, e.g. franking machine at customer or apparatus at post office
- G07B17/00362—Calculation or computing within apparatus, e.g. calculation of postage value
- G07B2017/00395—Memory organization
- G07B2017/00403—Memory zones protected from unauthorized reading or writing
Definitions
- the present invention relates to electronic postage meters, and to methods and systems for increasing reliability of stored accounting data which reflects the transactions of an electronic postage meter.
- elecronic postage meters include some form of non-volatile memory capability to store critical postage accounting information. This information includes, for example, the amount of postage remaining in the meter for subsequent printing and the total amount of postage already printed by the meter. Other types of accounting or operating data may also be stored in the non-volatile memory, as desired.
- redundant non-volatile memories Another approach for preserving the stored accounting data has been the use of redundant non-volatile memories.
- One such redundant memory system is disclosed in European Patent Application No. 83 100 639.0, filed January 25, 1983, published as EP-A-0 085 385.
- the two redundant non-volatile memories are interconnected with a microprocessor by way of completely separate data and address lines to eliminate error conditions.
- the data may be applied to the memories simultaneously or sequentially at different times.
- Such a system minimizes the possibility of non-detectable and/or non-correctable errors resulting from transients.
- the aforementioned redundant memory systems may help to eliminate certain errors in the accounting data due to microcomputer failure or the presence of transients.
- critical accounting data is written into the non-volatile memories during the noisiest cycle of meter operation when the presence of transients or spurious signals is probably greatest.
- a non-volatile memory system for an electronic postage meter in accordance with the present invention is generally illustrated at 10.
- the general architecture of the electronic postage meter is similar to that disclosed in the aforementioned co-pending patent application No. 83 112 364.1, modified as disclosed in Fig, 1.
- a central processing unit 12 in the form of a microprocessor, e.g., a Model 8085A microprocessor, is operated under program control in accordance with the programs stored in a ROM 14.
- the microprocessor 12 is energized by the output of a power supply circuit 16 during a power up cycle to place the meter in an operative condition.
- the microprocessor 12 transmits and receives signals over a data bus 18 coupled to the various meter components.
- the microprocessor 12 transmits signals to and receives signals from the other electronic components 20, the keyboard 22 and the printer 24 for the actuation of stepper and bank motors and solenoids 26 to accomplish the printing of postage on a document.
- Each such postage operation or printing transaction is referred to as a trip cycle.
- a volatile random access memory 28 such as model 8155 with the appropriate input and output and timing circuits, contains an ascending register (AR), a descending register (DR) and appropriate cyclic redundancy codes (CRCs) and control sums.
- AR ascending register
- DR descending register
- CRCs cyclic redundancy codes
- a first NVM 30 is Also coupled to the data bus 18 to receive accounting data from the microprocessor 12.
- the NVM 30 is a SEEQ 5516A electrically erasable read only memory (EEROM) having an endurance of 1 million write cycles.
- EEROM electrically erasable read only memory
- other NVMs which have high endurances may also be utilized, such as a battery backed CMOS integrated circuit chip or other similar integrated circuit chips.
- the accounting data for each meter postal transaction i.e., AR and DR, and other accounting data, as desired, is written into the NVM 30, as well as the volatile RAM 28.
- a permanent updated record of the accounting data is maintained on-the-fly in real time in the NVM 30.
- a second NVM 32 such as an ER 3400 MNOS integrated circuit chip, is also electrically coupled to the data bus 18. Under control of the microprocessor 12, accounting data which is temporarily stored in the RAM 28 during each meter transaction is transferred from the RAM 28 and written into the second NVM 32 upon detection of a power down signal indicating commencement of a power down cycle.
- the second NVM 32 is held in a non-write condition by the output signals from the microprocessor 12 over data bus 18.
- the microprocessor 12 initiates a power down cycle routine in which the accounting data which has been temporarily stored in the volatile RAM 28 is transferred or written into the first NVM 32.
- the second NVM 32 is disabled by a power down detection circuit 34 to prevent further writing therein by the microprocessor 12.
- the power supply circuit 16 and the power down detection circuit 34 may be of the type disclosed in United States Patent 4,445,198, issued April 24, 1984, entitled Memory Protection Circuit For An Electronic Postage Meter.
- the power down detection circuit 34 Upon receiving a first low power signal from the power supply circuit 16, the power down detection circuit 34 applies predetermined bias signals to the second NVM 32 to allow the transfer of accounting data thereto from the RAM 28 under control of the microprocessor 12. Thereafter, the bias voltages are removed from the second NVM 32 to disable the same and prevent any further writing of data therein from the microprocessor 12.
- the power supply circuit 16 and the power down detection circuit 34 may be of the type disclosed in co-pending European Patent Application No. 84 104 709.5, filed April 26, 1984.
- Output signals from the microprocessor 12 are also electrically coupled to a power down protection circuit 36 which inhibits any further writing in the first NVM 30 upon detection of a power down condition by the microprocessor 12.
- FIG. 2 A flowchart for the operation of the memory system of the present invention is illustrated in Fig. 2 at 50.
- the meter is in its quiescent or steady state condition.
- the microprocessor 12 senses a power down condition, i.e., power failure, the microprocessor 12 immediately transfers all the accounting data from the RAM 28 to the second NVM 32 by writing it into the second NVM 32.
- the power down detection circuit 34 disables the second NVM 32 to preclude any further writing of spurious data therein by erratic operation of the microprocessor 12 during the remainder of the power down cycle.
- the first NVM 30 is disabled by the power down protection circuit 36 to prevent any further writing of spurious data therein by erratic operation of the microprocessor 12 during the remainder of the power down cycle when the voltages applied to the various circuit elements are degrading towards zero volts through unspecified and undefined bias conditions.
- the microprocessor 12 waits for a trip signal indicating that a trip cycle is being commenced.
- the accounting data in the RAM 28 is updated to reflect the results of the most recent postage transaction or trip cycle. Additionally, the accounting data for the postage transaction is written into the first NVM 30.
- the microprocessor 12 After writing the accounting data for the most recent transaction in RAM and the first NVM 30, the microprocessor 12 looks for a power down condition. If such a condition is present, the previously described operation is undertaken to transfer accounting data from the RAM 28 into the second NVM 32 while at the same time preventing any further writing of data into the first NVM 30. If a power down condition is not present, the microprocessor 12 looks for a trip completion signal after writing the accounting data in the RAM 28 and first NVM 30. Upon detection of a trip completion signal, the meter returns to its steady state condition where the aforementioned process may be repeated.
- "permanent" storage of accounting data is provided on-the-fly in real time on a transaction by transaction basis to provide a first accounting data file during one cycle of meter operation, i.e., during the trip cycle, and that "permanent" storage of accounting data is also provided during the power down cycle by transferring accounting data from temporary storage to "permanent" storage to provide a second accounting data file during another cycle of meter operation, i.e., during the power down cycle.
- the second accounting data file is permanently constructed during a period of the meter operation, i.e., the power down cycle, when spurious signals are at a minimum.
- postage meter refers to the general class of devices for the imprinting of a defined unit value for governmental or private carrier delivery of parcels, envelopes or other like applications for unit value printing.
- postage meter is utilized, it is both known and employed in the trade as a general term for devices utilized in conjunction with services other than those exclusively employed by governmental postage and tax services.
- private, parcel and freight services purchase and employ such meters as a means to provide unit value printing and accounting for individual parcels.
- a method and associated apparatus have been described for increasing the reliability of the stored accounting data which reflects the transactions of an electronic postage meter, including the steps of and associated apparatus for providing a first non-volatile memory capable of storing accounting data which represents the postage meter transactions; updating the first non-volatile memory in real time for each postage transaction to provide a current record of the accounting data for each postage transaction on-the-fly; providing a second non-volatile memory capable of storing accounting data representing the postage meter transactions during a power down cycle of the postage meter; providing a volatile memory capable of storing accounting data which represents the postage meter transactions; updating the volatile memory in real time for each postage transaction to provide a current record of the accounting data for each postage transaction; and transferring the accounting data from the volatile memory to the second non-volatile memory during the power down cycle of the postage meter.
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Devices For Checking Fares Or Tickets At Control Points (AREA)
- Management, Administration, Business Operations System, And Electronic Commerce (AREA)
Claims (12)
- Procédé pour augmenter la fiabilité de données comptables stockées qui reflètent les transactions d'un appareil électronique d'affranchissement, comprenant les étapes consistant à :fournir une mémoire non-rémanente (28) capable de stocker des données comptables représentant les transactions de l'appareil d'affranchissement,mettre à jour la mémoire non-rémanente (28) en temps réel pour chaque transaction postale pour fournir un enregistrement courant des données comptables pour chaque transaction postale,fournir une première mémoire rémanente (30) et une seconde mémoire rémanente (32) capable de stocker les données comptables représentant les transactions de l'appareil d'affranchissement,mettre à jour en temps réel la première mémoire rémanente (30), mais pas la seconde mémoire rémanente (32), pour chaque transaction postale pour écrire les données comptables résultant de chaque cycle de déclenchement, ettransférer les données comptables de la mémoire non-rémanente (28) à la seconde mémoire rémanente (32), mais pas à la première mémoire rémanente (30), pendant le cycle d'arrêt de l'alimentation de l'appareil d'affranchissement.
- Procédé selon la revendication 1, dans lequel la première mémoire rémanente (30) comporte une plus grande durée pour le stockage de données que le seconde mémoire rémanente (32).
- Procédé selon la revendication 1 ou 2, comportant les étapes consistant à :mettre à jour la première mémoire rémanente (30) sur commande d'un microprocesseur (12), ettransférer des données à la seconde mémoire rémanente (32) pendant le cycle d'arrêt de l'alimentation sur commande du microprocesseur (12).
- Procédé selon l'une quelconque des revendications précédentes dans lequel :ladite seconde mémoire rémanente (32) est validée pour l'écriture de données comptables dans celle-ci lors de la détection d'un signal d'arrêt de l'alimentation, etles données comptables présentes dans la mémoire non-rémanente (28) sont transférées à la seconde mémoire rémanente (32) lors de la détection du signal d'arrêt de l'alimentation, pour fournir deux enregistrements des données comptables reflétant les transactions de l'appareil qui sont écrites dans la mémoire rémanente lors de deux cycles différents du fonctionnement de l'appareil d'affranchissement.
- Procédé selon l'une quelconque des revendications 1 à 4, dans lequel l'étape d'écriture des données comptables dans la seconde mémoire rémanente n'est effectuée que pendant le cycle d'arrêt de l'alimentation de l'appareil d'affranchissement.
- Système pour augmenter le fiabilité de données comptables stockées qui reflètent les transactions d'un appareil électronique d'affranchissement, comportant :un moyen de mémoire non-rémanente (28) pour stocker des données comptables qui reflètent les transactions de l'appareil d'affranchissement,un moyen de microprocesseur (12) connecté électriquement audit moyen de mémoire non-rémanente (28) pour écrire en temps réel des données comptables dans ledit moyen de mémoire non-rémanente (28) pendant chaque cycle de déclenchement de l'appareil d'affranchissement,un premier moyen de mémoire rémanente (30) pour stocker des données représentant les transactions de l'appareil d'affranchissement,un second moyen de mémoire rémanente (32) pour stocker des données comptables représentant les transactions de l'appareil d'affranchissement, etledit moyen de microprocesseur (12) étant aussi électriquement connecté aux dits premier et second moyens de mémoire rémanente (30,32) pour écrire en temps réel les données comptables dans ledit premier moyen de mémoire rémanente (30), mais pas dans le second moyen de mémoire rémanente (32), durant chaque cycle de déclenchement de l'appareil d'affranchissement, pour fournir un enregistrement courant des données comptables au vol et pour transférer les données comptables stockées dans ledit moyen de mémoire non-rémanente (28) vers ledit second moyen de mémoire rémanente (32), mais pas le premier moyen de mémoire rémanente (30), durant un cycle d'arrêt de l'alimentation de l'appareil.
- Système selon la revendication 6, dans lequel ladite première mémoire rémanente (30) comporte une plus grande durée pour le stockage de données que ladite seconde mémoire rémanente (32).
- Système selon la revendication 6 ou 7, comportant en outre:un moyen de détection d'une condition d'arrêt de l'alimentation pour valider ledit second moyen de mémoire rémanente (32) pour l'écriture des données comptables dans celui-ci durant le cycle d'arrêt de l'alimentation,ledit moyen de microprocesseur (12) transférant les données comptables présentes dans ledit moyen de mémoire non-rémanente (28) vers ledit second moyen de mémoire rémanente (32) durant le cycle d'arrêt de l'alimentation de l'appareil d'affranchissement, pour fournir deux enregistrements de données comptables reflétant les transactions de l'appareil qui sont écrites dans ledit moyen de mémoire rémanente (28) durant deux cycles différents de fonctionnement de l'appareil d'affranchissement.
- Système selon l'une quelconque des revendications 6 à 8, dans lequel ledit premier moyen de mémoire rémanente (30) est une EEROM.
- Système selon la revendication 8, dans lequel ledit second moyen de mémoire rémanente (32) est une mémoire MNOS.
- Système selon l'une quelconque des revendications 6 à 10, dans lequel ledit moyen de microprocesseur (12) est conçu pour écrire des données comptables dans ledit second moyen de mémoire rémanente (32) seulement durant le cycle d'arrêt de l'alimentation de l'appareil d'affranchissement.
- Appareil d'affranchissement électronique comportant le système selon l'une quelconque des revendications 6 à 11.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US64321984A | 1984-08-22 | 1984-08-22 | |
US643219 | 1984-08-22 |
Publications (4)
Publication Number | Publication Date |
---|---|
EP0173249A2 EP0173249A2 (fr) | 1986-03-05 |
EP0173249A3 EP0173249A3 (en) | 1987-01-21 |
EP0173249B1 EP0173249B1 (fr) | 1991-05-29 |
EP0173249B2 true EP0173249B2 (fr) | 1998-07-08 |
Family
ID=24579875
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP19850110530 Expired - Lifetime EP0173249B2 (fr) | 1984-08-22 | 1985-08-22 | Système de mémoire non-volatile avec possibilité d'enregistrement de données de temps réels et de baisse de puissance pour une machine à affranchir électronique |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP0173249B2 (fr) |
JP (1) | JPS6162161A (fr) |
DE (1) | DE3582982D1 (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7970722B1 (en) | 1999-11-08 | 2011-06-28 | Aloft Media, Llc | System, method and computer program product for a collaborative decision platform |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4713769A (en) * | 1985-09-11 | 1987-12-15 | Pitney Bowes Inc. | Method and apparatus for locating and displaying historical information within an electronic postage meter |
DE3650330T2 (de) * | 1985-10-16 | 1995-11-16 | Pitney Bowes Inc | Frankiermaschinensystem zur nichtflüchtigen Speicherung von Daten. |
US4817004A (en) * | 1985-10-16 | 1989-03-28 | Pitney Bowes Inc. | Electronic postage meter operating system |
US4845632A (en) * | 1985-10-16 | 1989-07-04 | Pitney Bowes Inc. | Electonic postage meter system having arrangement for rapid storage of critical postage accounting data in plural nonvolatile memories |
US4805109A (en) * | 1985-10-16 | 1989-02-14 | Pitney Bowes Inc. | Nonvolatile memory protection arrangement for electronic postage meter system having plural nonvolatile memories |
WO1989011134A1 (fr) * | 1988-05-09 | 1989-11-16 | Ascom Hasler Ag | Systeme electronique de calcul et d'enregistrement pour machines d'affranchissement |
CA2003375A1 (fr) * | 1988-12-30 | 1990-06-30 | Nanette Brown | Machine a affranchir electronique a memoire remanente a organisation amelioree |
US5021963A (en) * | 1988-12-30 | 1991-06-04 | Pitney Bowes Inc. | EPM having an improvement in accounting update security |
US5012425A (en) * | 1988-12-30 | 1991-04-30 | Pitney Bowes Inc. | EPM having an improvement in non-volatile storage of accounting data |
CH679088A5 (fr) * | 1989-07-21 | 1991-12-13 | Frama Ag | |
US5276844A (en) * | 1991-08-05 | 1994-01-04 | Ascom Autelca Ltd. | Protection system for critical memory information |
FR2700043B1 (fr) * | 1992-12-30 | 1995-02-10 | Neopost Ind | Machine à affranchir permettant de mémoriser un historique. |
US5559992A (en) * | 1993-01-11 | 1996-09-24 | Ascom Autelca Ag | Apparatus and method for protecting data in a memory address range |
US5668973A (en) * | 1995-04-14 | 1997-09-16 | Ascom Hasler Mailing Systems Ag | Protection system for critical memory information |
US6601034B1 (en) | 1998-03-05 | 2003-07-29 | American Management Systems, Inc. | Decision management system which is cross-function, cross-industry and cross-platform |
US6609120B1 (en) | 1998-03-05 | 2003-08-19 | American Management Systems, Inc. | Decision management system which automatically searches for strategy components in a strategy |
US6546545B1 (en) | 1998-03-05 | 2003-04-08 | American Management Systems, Inc. | Versioning in a rules based decision management system |
CN103235215A (zh) * | 2013-04-08 | 2013-08-07 | 上海久创电气自动化设备有限公司 | 多功能仪表 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4445198A (en) * | 1981-09-29 | 1984-04-24 | Pitney Bowes Inc. | Memory protection circuit for an electronic postage meter |
CA1206619A (fr) * | 1982-01-29 | 1986-06-24 | Frank T. Check, Jr. | Machine d'affranchissement electronique a memoire redondante |
US4579054A (en) * | 1982-12-08 | 1986-04-01 | Pitney Bowes Inc. | Stand-alone electronic mailing machine |
-
1985
- 1985-08-22 JP JP60184998A patent/JPS6162161A/ja active Pending
- 1985-08-22 EP EP19850110530 patent/EP0173249B2/fr not_active Expired - Lifetime
- 1985-08-22 DE DE8585110530T patent/DE3582982D1/de not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7970722B1 (en) | 1999-11-08 | 2011-06-28 | Aloft Media, Llc | System, method and computer program product for a collaborative decision platform |
US8005777B1 (en) | 1999-11-08 | 2011-08-23 | Aloft Media, Llc | System, method and computer program product for a collaborative decision platform |
US8160988B1 (en) | 1999-11-08 | 2012-04-17 | Aloft Media, Llc | System, method and computer program product for a collaborative decision platform |
Also Published As
Publication number | Publication date |
---|---|
EP0173249A3 (en) | 1987-01-21 |
EP0173249B1 (fr) | 1991-05-29 |
DE3582982D1 (de) | 1991-07-04 |
EP0173249A2 (fr) | 1986-03-05 |
JPS6162161A (ja) | 1986-03-31 |
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