EP0070236B1 - Dispositif de compensation de phase d'écho et son application aux annuleurs d'écho - Google Patents

Dispositif de compensation de phase d'écho et son application aux annuleurs d'écho Download PDF

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Publication number
EP0070236B1
EP0070236B1 EP82401285A EP82401285A EP0070236B1 EP 0070236 B1 EP0070236 B1 EP 0070236B1 EP 82401285 A EP82401285 A EP 82401285A EP 82401285 A EP82401285 A EP 82401285A EP 0070236 B1 EP0070236 B1 EP 0070236B1
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EP
European Patent Office
Prior art keywords
phase
echo
magnitude
output
phase compensation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
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EP82401285A
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German (de)
English (en)
French (fr)
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EP0070236A1 (fr
Inventor
Jean-Marc Marie Colin De Verdiere
Patrice René Langlois
Odile Marie Macchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Societe Anonyme de Telecommunications SAT
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Societe Anonyme de Telecommunications SAT
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other
    • H04B3/23—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers
    • H04B3/232—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other using a replica of transmitted signal in the time domain, e.g. echo cancellers using phase shift, phase roll or frequency offset correction

Definitions

  • the present invention relates to the transmission of simultaneous bidirectional data on a 2-wire circuit, and more particularly to the echo cancellation technique.
  • These echoes usually consist of a local echo due to the mismatch of the differential circuit ensuring the passage of 4 wires - 2 wires to which distant echoes are superimposed due to reflections of the transmitted signal due to mismatches of impedances. These latter echoes are thus, on reception, affected by frequency drift, that is to say that the carrier frequency of the distant echo is no longer the same as that of the transmitted signal.
  • the echo arrives meanwhile modulated by the same carrier f c affected by a phase shift being the frequency drift of the echo, T the sampling period.
  • T the sampling period.
  • it To cancel such an echo, it must be reconstituted by modulating it by the same carrier f c , with at instant nT a phase ⁇ n which is an estimate of the phase ⁇ n of this echo. Then it is necessary to receive, at each sampling instant nT, subtract from the received signal, the estimated echo signal.
  • FIG. 1 illustrates such an echo canceller known from the prior art.
  • the signal On transmission, the signal is presented as a sequence A n of complex data which are modulated by means of a modulator 1 by the carrier f c .
  • a differential circuit 2 ensures the coupling of the line with the transmission and reception of the modem.
  • the signal received h n at time nT consists of the useful signal coming from the remote end and an echo signal g n which is written: and where r k is the sampled impulse response reduced in baseband of the echo signal.
  • the known echo cancellers 5, making it possible to compensate for the phase ⁇ n of the echo, are formed by a first system 51 for updating the coefficients C k ; for example according to the gradient algorithm where the coefficients C k are complex, where y is a positive, real constant and of a second system 52 for updating the phase ⁇ n of the echo, said phase ⁇ n also being updated according to the gradient algorithm where ⁇ n is the reconstituted echo and ⁇ n * its conjugate complex and ⁇ is a real positive constant.
  • phase updating systems are acceptable to compensate for a slow phase variation or a very low frequency drift.
  • phase variation involves a significant frequency drift
  • phase compensation is no longer acceptable. Indeed it would require to adopt, in the algorithm [3] of phase updating, a coefficient a too large, which would degrade the performances in the absence of frequency drift.
  • the inventors of the present invention have sought to overcome these drawbacks of phase updating devices for echo cancellers in order to allow correction of a drift of fre significant echo.
  • the invention essentially consists in having a first phase variation system for slow fluctuations one of phase and a second phase variation system for rapid fluctuations w n of phase, the total variation ⁇ n of phase being obtained at the output. an addition circuit, said addition circuit receiving signals one and W n from said first and second systems.
  • the phase compensation system comprises means for adding, at each sampling instant , the slow phase variation with the rapid phase variation Wn , said addition means supplying at its output the proper phase ⁇ n of the echo, said slow variation Un being obtained from said increase dw n by first means, said rapid variation being obtained from said increase dw n by second means.
  • said first means providing Un at the output comprise means for adding the fluctuations u n-1 , from the previous sampling instant, with the quantity T ⁇ F n , T being equal to the sampling period, said quantity F n being obtained by means of addition of the quantity F n - 1 , from the previous sampling instant, with a quantity dF n , said quantity dF n being obtained by means of addition of said increase dw n , weighted by a constant , with the quantity dF n - 1 of the previous sampling instant, said quantity dF n - 1 also being weighted by another constant (1 ⁇ ⁇ ), ⁇ and ⁇ being real positive constants.
  • the constant equals 1.
  • said second means providing the rapid fluctuations Wn comprise means for adding said increase dw n with the quantity w n ⁇ 1 of the previous sampling instant.
  • the invention makes it possible to easily correct echoes affected by a significant frequency drift.
  • the known systems for updating the phase ⁇ n of an echo canceller comprise a circuit 21 for multiplying the value ⁇ n * estimated conjugate complex reconstituted for the previous sample by the value supplied. by the subtraction circuit 6 of FIG. 1.
  • the circuit 22 receiving the result of the multiplication of the circuit 21 provides as output the pure imaginary part of this quantity which is then multiplied by a by means of the multiplication circuit 23.
  • a is an appropriately chosen constant, extracted from a memory 24.
  • the quantity supplied at the output of circuit 23 is added by an addition circuit 25 with the value ⁇ n-1 supplied at the output of circuit 26 delaying by a sampling period T.
  • the invention consists in decomposing the phase ⁇ n into two components un and w n , one corresponding to a slow drift phenomenon capable of decreasing or increasing, the other w n corresponding to a rapid phenomenon, and to extract from the rapid phenomenon at each sampling instant the residues from the slow phenomenon.
  • the phase ⁇ n is then written as the sum of the components un and w n .
  • the compensation a represents an average value of the phase while w n represents variations of small amplitude around this average value of drift.
  • the component Wn is updated according to the invention by means of a first-order phase loop while the component Un is updated according to the invention by means of a phase order of a higher order.
  • this first updating system consists of a first circuit 38 for multiplying the term dw n by a constant suitably chosen extracted from a memory 39.
  • This quantity dw n is applied, at the output of circuit 38, to the input of an addition circuit 40.
  • This addition circuit 40 provides at output a quantity dF n .
  • the other input of this addition circuit 40 receives the quantity dF n-1 of the previous sampling instant (n ⁇ 1) T, contained in a register 41 delaying sampling time T, said quantity dF n -1 being weighted by a coefficient (1 ⁇ ⁇ ) chosen appropriately.
  • a multiplication circuit 42 performs this weighting of dF n - 1 , the constant 1 ⁇ ⁇ being extracted from a memory 43.
  • dF n is then applied to the input of a circuit 44 for adding another loop performing a filtering writing:
  • circuit 44 in fact supplies F n while the other input of circuit 44 receives the term F n -i contained in the shift register 45 delaying the sampling time T.
  • F n obtained at the output of circuit 44 is applied to the input of a multiplication circuit 46 which multiplies it by the quantity T equal to the sampling period extracted from a memory 47.
  • the output of circuit 46 multiplication is connected to the input of an addition circuit 48 which outputs the slow fluctuations Un of the phase.
  • the other input of the addition circuit 48 receives the term u n-1 stored in a register 49 with delay shift of a sampling time T. This new loop thus performs another filtering:
  • the component Un supplied by the addition circuit 48 is applied to the input of an addition circuit 37 where it is added with the other component Wn corresponding to the rapid fluctuations.
  • the addition circuit 37 thus provides the output as the estimated phase for the sample n.
  • the component w n present on the other input of the addition circuit 37 is also obtained from the increase dw n but by means of simple filtering.
  • This quantity dw n is applied to the input of an addition circuit 35, which performs the sum of this quantity dw n with the value w n-1 supplied at the previous sampling instant and kept by means of the register 36 with time delay offset T.
  • the slow phenomenon is updated according to the invention by means of a third-order phase correction loop while the fast phenomenon is itself updated by means of a first order phase correction loop.
  • the addition circuit 44 receives at its input directly the term ⁇ T dw n which it adds with F n-1 supplied by the delay circuit 45 to supply the term F n as an output at the input of the multiplication circuit 46.
  • the delay circuit 41 and the multiplication circuit 42 is eliminated.
  • the system for updating the slow phase variation goes from third to second order.
  • the present system for updating the phase ⁇ n according to the invention is essentially concerned with an increase dw n formed from the signal in data after suppression of the echo in the complex domain.
  • the phase updating system according to the invention is also applicable by reconstituting only the real part of in.
  • the present system for updating phase ⁇ n applies both to a signal A n in baseband as shown in FIG. 1 and to a signal A n in passband, in which case the modulation intervenes, in the canceller a little differently.
  • the canceller 5 operates in baseband as shown in FIG. 1 the coefficients C n are formed by a system 51 for updating directly from the signal A n data complex.
  • the modulation by a phase-shifted carrier f c of a phase ⁇ n provided by the phase updating system according to the invention therefore occurs at the output of the system for updating the coefficients.
  • phase compensation system would also apply to an echo canceller operating in bandwidth.
  • the system for updating the coefficients C n then receives the data signal A n already modulated by the carrier f c and the phase shift of ⁇ n provided by the phase compensation system according to the invention is only carried out at the output of the system for updating the coefficients.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Bidirectional Digital Transmission (AREA)
  • Communication Control (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
EP82401285A 1981-07-09 1982-07-07 Dispositif de compensation de phase d'écho et son application aux annuleurs d'écho Expired EP0070236B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR8113498 1981-07-09
FR8113498A FR2509552A1 (fr) 1981-07-09 1981-07-09 Dispositif de compensation de phase d'echo et son application aux annulateurs d'echo

Publications (2)

Publication Number Publication Date
EP0070236A1 EP0070236A1 (fr) 1983-01-19
EP0070236B1 true EP0070236B1 (fr) 1985-01-23

Family

ID=9260379

Family Applications (1)

Application Number Title Priority Date Filing Date
EP82401285A Expired EP0070236B1 (fr) 1981-07-09 1982-07-07 Dispositif de compensation de phase d'écho et son application aux annuleurs d'écho

Country Status (11)

Country Link
EP (1) EP0070236B1 (fi)
JP (1) JPS5817735A (fi)
CA (1) CA1194953A (fi)
DE (1) DE3262044D1 (fi)
DK (1) DK307782A (fi)
ES (1) ES513728A0 (fi)
FI (1) FI73553C (fi)
FR (1) FR2509552A1 (fi)
HU (1) HU186079B (fi)
NO (1) NO157679C (fi)
SU (1) SU1414332A3 (fi)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3327467A1 (de) * 1983-07-29 1985-02-14 Siemens AG, 1000 Berlin und 8000 München Verfahren und schaltungsanordnung zur kompensation von echosignalen
NZ214905A (en) * 1985-01-29 1988-09-29 British Telecomm Noise cancellation by adaptive filter compensates for timing variations

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4072830A (en) * 1976-10-04 1978-02-07 Bell Telephone Laboratories, Incorporated Variable phase shifter for adaptive echo cancellers

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
IEEE Transactions on Communications, Vol. COM-25, No. 7, July 1977, pages 654 to 664 *

Also Published As

Publication number Publication date
ES8305172A1 (es) 1983-03-16
EP0070236A1 (fr) 1983-01-19
FI73553C (fi) 1987-10-09
FI73553B (fi) 1987-06-30
ES513728A0 (es) 1983-03-16
CA1194953A (en) 1985-10-08
NO822375L (no) 1983-01-10
FI822436L (fi) 1983-01-10
FR2509552A1 (fr) 1983-01-14
JPS644699B2 (fi) 1989-01-26
SU1414332A3 (ru) 1988-07-30
JPS5817735A (ja) 1983-02-02
NO157679B (no) 1988-01-18
FI822436A0 (fi) 1982-07-08
DK307782A (da) 1983-01-10
NO157679C (no) 1988-04-27
DE3262044D1 (en) 1985-03-07
FR2509552B1 (fi) 1983-12-02
HU186079B (en) 1985-05-28

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