EP0053735B1 - Circuitry for a coin tester - Google Patents

Circuitry for a coin tester Download PDF

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Publication number
EP0053735B1
EP0053735B1 EP81109571A EP81109571A EP0053735B1 EP 0053735 B1 EP0053735 B1 EP 0053735B1 EP 81109571 A EP81109571 A EP 81109571A EP 81109571 A EP81109571 A EP 81109571A EP 0053735 B1 EP0053735 B1 EP 0053735B1
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EP
European Patent Office
Prior art keywords
coin
amplification
value
oscillator
threshold value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
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EP81109571A
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German (de)
French (fr)
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EP0053735A1 (en
Inventor
Pierre Dubey
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ascom Autelca AG
Autelca AG
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Ascom Autelca AG
Autelca AG
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Priority to AT81109571T priority Critical patent/ATE15288T1/en
Publication of EP0053735A1 publication Critical patent/EP0053735A1/en
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    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07DHANDLING OF COINS OR VALUABLE PAPERS, e.g. TESTING, SORTING BY DENOMINATIONS, COUNTING, DISPENSING, CHANGING OR DEPOSITING
    • G07D5/00Testing specially adapted to determine the identity or genuineness of coins, e.g. for segregating coins which are unacceptable or alien to a currency
    • G07D5/08Testing the magnetic or electric properties

Definitions

  • the invention relates to a circuit arrangement in a coin validator according to the preamble of claim 1.
  • a circuit arrangement of this type is known from DE-A 2 159 599.
  • a negative feedback of the amplifier of an oscillator which determines the gain, is set during coin validation to a first, predetermined tolerance limit value, at which an acceptable coin suspends the oscillator oscillations, and to a second, predetermined tolerance limit value, at which an acceptable coin does not oscillate suspends.
  • a coin acceptance signal accordingly occurs when the oscillator vibrations stop at the first tolerance limit value and start again at the second tolerance limit value.
  • the tolerance limit values could not be set according to the limit values of the conductivity range of acceptable coins. Otherwise acceptable coins would not have been accepted due to changed conditions.
  • a relatively large tolerance range has therefore been specified and the disadvantage accepted that even unacceptable coins or coin-like bodies, the conductivity of which differs only slightly from that of acceptable coins, are accepted.
  • the invention as characterized in the Asnprüchen, solves the problem of making the coin check independent of changes in external conditions and influences, such as temperature, aging of the circuit parts and contamination of the coin channel.
  • the advantages achieved by the invention are essentially to be seen in the fact that the tolerance range of the coin check can be limited precisely to the properties of acceptable coins, in particular precisely to the permissible conductivity range, so that no additional tolerances have to be provided for changing external parameters.
  • the invention ensures that any change in all parameters influencing the test is compensated for.
  • the resonant circuit of the circuit arrangement according to the invention can be self-excited, i. H. form an oscillator together with the amplifier. However, it can also be inductively or capacitively coupled to an oscillator or another external source, the coin to be tested influencing the coupling field and the amplifier amplifying the oscillating circuit voltage which is dependent on this influence.
  • the output 1 of an operational amplifier 2 is connected to its feedback input 3 by a feedback path 4 and 5, to which an oscillating circuit 6, 7 is connected.
  • a coin channel (not shown) leads through the field of the oscillating circuit coil 6.
  • At a negative feedback input 8 of the operational amplifier 2 is part of the output voltage of the same, which is tapped at a voltage divider.
  • the voltage divider consists of a fixed resistor 9 connected between the output 1 and the input 8 and one or more of the resistors 11 to 18 which can be switched into the voltage divider by applying one or more of the switching transistors 21 to 28.
  • the resistance value of the voltage divider part resistor 11 to 18, at which the negative feedback voltage is tapped, can be changed in 255 steps.
  • the switching transistors 21 to 28 can be acted upon individually and in combinations by a program control device 29, as a result of which 255 different degrees of negative feedback can be set.
  • the relevant part of the program is - as will be described in more detail below - in such a way that all 255 or selected gain levels are set successively in increasing (or decreasing) order.
  • a comparator 30 compares the output signal of the amplifier 2 with a reference voltage at the output 31 of a voltage stabilizer 32.
  • the reactance one between the resistor 9 and the counter Stands 11 to 18 connected capacitor 33 is small compared to a discharge resistor 34 connected in parallel.
  • a calibration resistor 35 can be connected in parallel to the resonant circuit capacitor 7 by means of a transistor 36.
  • the resistor 35 when it is connected in parallel to the resonant circuit 6, 7 by the application of the transistor 36, has the same effect as a coin 37 of a certain acceptable type in the coil field 6.
  • the one that is used is expediently determined from the various types of coin which has a medium damping of the resonant circuit, based on the damping range given by all coins.
  • the resistor 35 is small compared to a resistor 38, via which the stabilized direct voltage at the output 31 is led to the amplifier input 3.
  • the program control device 29 has a memory 39 with two memory parts, namely a read-only memory 49 (ROM or REPROM) and a read / write memory 59 (RAM), and an arithmetic logic unit 69.
  • ROM read-only memory
  • RAM read / write memory
  • a normal value of the gain as well as two predetermined tolerance limit values of the gain are stored for each acceptable coin type, which are referred to as normal limit values in the following.
  • the amplification values are the resistance values of the voltage divider partial resistor 11-18 which determine the amplification and from which the negative feedback voltage is tapped.
  • the storage takes place in each case together with a code word which indicates which of the transistors 21 to 28 are conductive and which are not conductive.
  • the normal value of the gain is determined under normal conditions (temperature, operating voltage) and without a coin being in the field of the coil 6, as follows: First, the resistor 35 is connected in parallel with the resonant circuit 6, 7 by applying the transistor 36. The program controller 29 then acts on the transistors 21 to 28 in such a way that the partial resistor 11 to 18 is gradually increased starting with the smallest of the 255 resistance values (all transistors 11-18 acted on). At the smallest resistance value, the negative feedback is minimal, that is to say the amplification is maximum and the oscillator 2, 6, 7 oscillates. The comparator 30 supplies pulses to the program controller 29 in time with the upper half-wave of the oscillator oscillations.
  • two normal limit values for the gain are stored in the read-only memory 49 for each acceptable coin type. These are determined in a similar way to the normal value of the amplification: first, the transistor 36 is blocked, so that the resistor 35 is not connected to the resonant circuit 6, 7. A coin of the acceptable type is then brought into the field of the coil 6. Under normal conditions, the partial resistance 11 to 18 is then gradually increased in the same way as in the determination of the normal value of the amplification until the resistance level is reached at which the oscillator vibrations cease. Two values of the partial resistance are then stored in the read-only memory 49 as normal limit values for the amplification, one of which is smaller by a tolerance and the other of which is greater than the resistance of the resistance level reached.
  • the tolerances are measured according to the allowable tolerance range of acceptable coins of the type concerned for strict testing.
  • the normal limit values of the gain can also be determined by placing a coin representing the lower and an upper limit of the tolerance range of the coin type in the field of the coil 6 and determining the resistance value of the partial resistor 11 to 18, at which the oscillator vibrations cease.
  • the circuit arrangement is put into operation by a signal from a coin detector (not shown) arranged at the entrance of the coin channel.
  • the program controller 29 acts on the transistor 36, which connects the resistor 35 in parallel with the resonant circuit 6, 7.
  • the program controller 29 then triggers the operations of a first program section described below, which are ended before the inserted coin enters the field of the coil 6: the partial resistor 11 to 18 is gradually increased starting from the smallest resistance value until the resistance level is reached , where the oscillator vibrations stop. If conditions other than normal prevail, the value of the partial resistor 11 to 18 corresponding to this stage is not equal to the normal value stored in the read-only memory 49. Rather, there is a deviation.
  • the arithmetic unit 69 determines the ratio of this value of the partial resistance to the normal value and multiplies the upper and lower normal limit values of the individual coin types stored in the read-only memory 49 by this ratio. As a result, relevant upper and lower limit values for coin acceptance are obtained under the prevailing conditions. For each upper limit value obtained in this way, the next resistance level lying above it, and for each lower level the next resistance level lying below it, is the upper and lower, corrected tolerance limit value of the relevant coin type for coin testing in RAM memory 59 saved. In the following, these corrected tolerance limit values are referred to as target limit values. The transistor 36 is then blocked. This concludes the first part of the program.
  • the coin belongs to an acceptable coin type if the oscillator 2, 6, 7 oscillates at the lower target limit value of a coin type and does not oscillate at the upper target limit value of the same coin type.
  • the lower target limit is the smaller resistance value, it causes a greater degree of amplification).
  • the coin belongs to an acceptable coin type if the resistance level at which the oscillator vibrations are between the lower and upper nominal value of a coin type.
  • test in case a) has the advantage that it takes place much faster than in case b).
  • the oscillator 2, 6, 7 oscillates in the idle state and the partial resistance 11 to 18 is increased in stages.
  • the oscillator could not oscillate in the idle state and the partial resistance, starting with the largest resistance value (or the largest stored target limit value), could be gradually reduced until the resistance level at which the oscillator vibrations set in is reached. The gain would not be gradually reduced, but rather increased.
  • the circuit arrangement according to FIG. 2 differs from that according to FIG. 1 by the circuit part drawn with a dash-dotted line.
  • the feedback path 4, 5 is omitted and the operational amplifier 2 is inductively coupled to the coil 42 of an AC generator (or oscillator) 43, which forms a primary coupling element, by a coil 41 forming a secondary coupling element.
  • the coin 37 gets into the coupling field between the two coils 41, 42 and changes the degree of coupling.
  • the transmitted signal passes through a capacitor 44 to the amplifier input 3.
  • the comparator 30 compares the amplitude of the output signal of the amplifier 2 with the reference voltage at the output 31 and emits signals to the program controller 29 in time with the upper half-wave of the transmitted and amplified AC signal until the signal amplitude with a corresponding reduction in the degree of coupling falls below the reference voltage (the threshold value). Otherwise, the circuit arrangement according to FIG. 2 operates in accordance with the circuit arrangement according to FIG. 1: A normal value of the gain is likewise stored in the read-only memory 49.
  • partial resistor 11 to 18 is gradually increased, starting with the smallest resistance value, until the resistance level and thus the gain level is reached, at which the amplitude of the output signal of amplifier 2 is equal to Comparison voltage at the output 31 is or falls below this.
  • the resistance value of the resistance level reached is then stored as the normal value of the amplification.
  • two predetermined normal limit values of the amplification or the partial resistance 11 to 18 are stored for each type of coin, between which the amplitude of the output signal of the amplifier 2 assumes the reference voltage for an acceptable coin 37.
  • the coin check is then also analogous to that described above, in that the program controller 29 gradually increases the partial resistance 11 to 18 before the coin check until the output signal amplitude of the amplifier 2 assumes or falls below the reference voltage.
  • the arithmetic unit 69 then multiplies the quotient from the value of the partial resistance 11 to 18 thus obtained and the normal value by the lower and upper normal limit values stored in the read-only memory 49 for each coin type. For each lower and upper limit value calculated in this way, the next resistance level below and above it is stored in RAM memory 59 as the lower and upper target limit value of the coin type in question. During coin testing, the partial resistance 11 to 18 is then also gradually increased.
  • a coin acceptance signal is emitted if the output signal amplitude of the amplifier 2 assumes the comparison voltage at the output 31 when the value of the resistance level reached lies between the two target limit values. If only the target limit values of the resistance levels stored in the RAM memory 59 are run through from bottom to top, a coin acceptance signal is emitted if the amplitude of the amplifier output signal exceeds the reference voltage for the smaller of the two resistance target limit values of a coin type and falls below it for the larger one. Of course, the partial resistance could also be gradually reduced starting with the greatest resistance value.
  • the accuracy of the coin check in the described embodiments does not depend on any external influences, it is only limited by the number of gain values that can be set by the resistors 11 to 18. A slight increase in the number of resistors 11 to 18 (and the corresponding switching transistors 21-28) achieved a considerable increase in the adjustable gain values and thus the accuracy.
  • the resistors 11 to 18 could of course also be connected to the feedback path of the oscillator instead of to the negative feedback path.
  • the advantage of the arrangement in the negative feedback path is that the quality of the resonant circuit is not influenced, which is essential for an accurate, selective coin check.
  • the gain could be controlled by capacitors instead of resistors 11 to 18.
  • an oscillator circuit with two coupled oscillating circuits could also be provided, in the coupling field of which the coin arrives.
  • the circuit could also be designed so that the oscillator vibrations start when an acceptable coin gets into the coil field.
  • the first part of the program described in connection with FIG. 1 can be shortened by gradually increasing the partial resistance 11 to 18 instead of the smallest resistance value with a larger resistance value which is selected so that the oscillator vibrations even under the most extreme conditions (temperature. not heavily soiled coin channel).
  • predetermined normal limit values and a predetermined normal value of the gain can be stored in the ROMs 49 during the manufacture of the coin validators for the entire series of coin validators.
  • the value of the partial resistor 11 to 18 is determined in the manner described there, at which the oscillator oscillations cease when the resistor 35 is connected in parallel to the resonant circuit 6, 7 and no coin in the coil field 6 is.
  • the arithmetic logic unit 69 only determines the difference between this value and the predetermined normal value stored in the ROM 49 and stores this difference as a correction value in RAM 59. (No target limit values are therefore yet calculated).
  • arithmetic logic unit 69 successively determines all target limit values by adding the correction value stored in ram 59 to the word-determined normal limit values stored in ROM 49. Immediately after each calculation of a target limit value, the corresponding resistance level 11 to 18 is set and it is determined in the manner described above whether the oscillator vibrations stop.

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  • General Physics & Mathematics (AREA)
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  • Testing Of Coins (AREA)
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Abstract

The coins (37) come within the coil field of an oscillator (2,6,7). Within a reverse feedback path of the oscillator amplifier (2), several resistances (11 to 18) are arranged, switchable parallel to each other individually or in any desired combination, by switching transistors (21 to 28), each controlled by a program (29). This makes the amplification controllable step by step. The program (29) has a constant-value-storage (49) with a stored standard value for the amplification in which oscillations cease whenever the field coil area is free and a calibrating resistance (35) is connected parallel to the condenser (7) of the oscillator (2,6,7). For each coin type, two pre-determined standard limit values of amplification are stored in the constant-value-storage (49), with the oscillations ceasing between them in the presence of an acceptable coin (37). Prior to each testing operation, the program (29), with calibrating resistance (35) being connected parallel to the condenser (7) increases the amplification step by step until oscillations cease. The quotient of the thus obtained amplification value and the standard value is multiplied by the two standard limit values of each type of coin, and the product is stored in the read-write-memory (59) as the nominal limit value. During the coin testing, the amplification is altered step by step from the highest nominal limit value to the next lower, and so on. A coin acceptance signal is issued whenever the oscillator oscillations do not cease with the higher of the two nominal limit values and do stop with the lower of the two nominal limit values.

Description

Die Erfindung betrifft eine Schaltungsanordnung in einem Münzprüfer gemäss dem Obergegriff des Patentanspruchs 1.The invention relates to a circuit arrangement in a coin validator according to the preamble of claim 1.

Eine Schaltungsanordnung dieser Art ist aus der DE-A 2 159 599 bekannt. Bei ihr wird eine die Verstärkung bestimmende Gegenkopplung des Verstärkers eines Oszillators bei der Münzprüfung auf einen ersten, vorgegebenen Toleranzgrenzwert, bei dem eine annehmbare Münze die Oszillatorschwingungen zum Aussetzen bringt, und auf einen zweiten, vorgebebenen Toleranzgrenzwert eingestellt, bei dem eine annehmbare Münze die Schwingungen nicht zum Aussetzen bringt. Ein Münzannahmesignal erfolgt dementsprechend, wenn die Oszillatorschwingungen beim ersten Toleranzgrenzwert ausetzen und beim zweiten Toleranzgrenzwert wieder einsetzen.A circuit arrangement of this type is known from DE-A 2 159 599. In this case, a negative feedback of the amplifier of an oscillator, which determines the gain, is set during coin validation to a first, predetermined tolerance limit value, at which an acceptable coin suspends the oscillator oscillations, and to a second, predetermined tolerance limit value, at which an acceptable coin does not oscillate suspends. A coin acceptance signal accordingly occurs when the oscillator vibrations stop at the first tolerance limit value and start again at the second tolerance limit value.

Weil die Verstärkungs- bzw. Rückkopplungswerte, bei denen die Oszillatorschwingungen aus- bzw. einsetzen nicht nur von den Münzeigenschaften sondern auch von den jeweiligen Bedingungen, z. B. der Temperatur, der Alterung der Schaltungsteile, sowie weterer Einflüsse, wie Metallrückstände in einem verschmutzten Münzkanal, abhängen, konnte man bei der bisherigen Schaltungsanordnung die Toleranzgrenzwerte nicht entsprechend den Grenzwerten des Leitfähigkeitsbereichs annehmbarer Münzen festlegen. Sonst wären annehmbare Münzen infolge geänderter Bedingungen nicht angenommen worden. Man hat deshalb einen verhältnismässig grossen Toleranzbereich vorgegeben und den Nachteil in Kauf genommen, dass auch nicht annehmbare Münzen oder münzartige Körper, deren Leitfähigkeit sich nur wenig von derjenigen annehmbarer Münzen unterscheidet, angenommen werden.Because the gain or feedback values at which the oscillator vibrations expose or start not only from the coin properties but also from the respective conditions, e.g. B. the temperature, the aging of the circuit parts, and other influences, such as metal residues in a dirty coin channel, depending on the previous circuit arrangement, the tolerance limit values could not be set according to the limit values of the conductivity range of acceptable coins. Otherwise acceptable coins would not have been accepted due to changed conditions. A relatively large tolerance range has therefore been specified and the disadvantage accepted that even unacceptable coins or coin-like bodies, the conductivity of which differs only slightly from that of acceptable coins, are accepted.

Bei einem aus der US-A3749220 bekannten Münzprüfer anderer Art, bei dem die zu prüfende Münze einen Zweig einer Brückenschaltung beeinflusst, hat man schon vorgeschlagen, ein der Temperatur ausgesetztes Referenzelement am anderen Zweig anzuordnen. Damit lassen sich aber nur Temperaturänderungen und keine anderen Einflüsse kompensieren.In a coin validator of another type known from US-A3749220, in which the coin to be tested influences a branch of a bridge circuit, it has already been proposed to arrange a reference element exposed to the temperature on the other branch. However, this can only compensate for temperature changes and no other influences.

Aus der FR-A 2 408 183 war es ferner bekannt, die Münzen dadurch zu prüfen, dass die in Form von typischen Kurven vorgegebenen Toleranzgrenzen durch eine Programmsteuervorrichtung schrittweise abgetastet und mit der von einem Oszillator erzeugten Ausgangsspannung verglichen werden. Auch durch diese kompliziertere Schaltungsanordnung lassen sich die im Zusammenhang mit der DE-A 2159 599 erläuterten Nachteile nicht vermeiden.From FR-A 2 408 183 it was also known to check the coins in that the tolerance limits specified in the form of typical curves are scanned step by step by a program control device and compared with the output voltage generated by an oscillator. This more complicated circuit arrangement also cannot avoid the disadvantages explained in connection with DE-A 2159 599.

Die Erfindung, wie sie in den Asnprüchen gekennzeichnet ist, löst die Aufgabe, die Münzprüfung von den Aedderungen der äusseren Bedingungen und Einflüsse, wie zum Beispiel der Temperatur, der Alterung der Schaltungsteile und der Verschmutzung des Münzkanals, unabhänzig zu machen.The invention, as characterized in the Asnprüchen, solves the problem of making the coin check independent of changes in external conditions and influences, such as temperature, aging of the circuit parts and contamination of the coin channel.

Die durch die Erfindung erreichten Vorteile sind im wesentlichen darin zu sehen, dass der Toleranzbereich der Münzprüfung genau auf die Eigenschaften annehmbarer Münzen, insbesondere genau auf den zulässigen Leitfähigkeitsbereich beschränkt werden kann, also keine zusätzlichen Toleranzen für die Aenderung äusserer Parameter vorgesehen werden müssen. Die Erfindung stellt sicher, dass jegliche Aenderung aller die Prüfung beeinflussender Parameter kompensiert wird.The advantages achieved by the invention are essentially to be seen in the fact that the tolerance range of the coin check can be limited precisely to the properties of acceptable coins, in particular precisely to the permissible conductivity range, so that no additional tolerances have to be provided for changing external parameters. The invention ensures that any change in all parameters influencing the test is compensated for.

Der Schwingkreis der erfindungsgemässen Schaltungsanordnung kann selbsterregt sein, d. h. zusammen mit dem Verstärker einen Oszillator bilden. Er kann aber auch induktiv oder kapazitiv an einen Oszillator oder eine andere Fremdquelle gekoppelt sein, wobei die zu prüfende Münze das Kopplungsfeld beeinflusst und der Verstärker die von dieser Beeinflussung abhängige Schwingkreisspannung verstärkt.The resonant circuit of the circuit arrangement according to the invention can be self-excited, i. H. form an oscillator together with the amplifier. However, it can also be inductively or capacitively coupled to an oscillator or another external source, the coin to be tested influencing the coupling field and the amplifier amplifying the oscillating circuit voltage which is dependent on this influence.

Im folgenden werden anhand der beiliegenden Zeichnung Ausführungsbeispiele der Erfindung näher beschrieben. Es zeigen :

  • Figur 1 eine Schaltungsanordnung in einem Münzprüfer und
  • Figur 2 eine Variante eines Schaltungsteils der Anordnung nach Fig. 1.
Exemplary embodiments of the invention are described in more detail below with reference to the accompanying drawing. Show it :
  • Figure 1 shows a circuit arrangement in a coin validator and
  • FIG. 2 shows a variant of a circuit part of the arrangement according to FIG. 1.

Bei der in Fig. 1 dargestellten Schaltungsanordnung ist der Ausgang 1 eines Operationsverstärkers 2 mit dessen Rückkopplungseingang 3 durch einen Rückkopplungspfad 4 und 5 verbunden, an den ein Schwingkreis 6, 7 angeschlossen ist. Durch das Feld der Schwingkreisspule 6 führt ein (nicht dargestellter) Münzkanal. An einem Gegenkopplungseingang 8 des Operationsverstärkers 2 liegt ein Teil der Ausgangsspannung desselben, der an einem Spannungsteiler abgegriffen ist. Der Spannungsteiler besteht aus einem zwischen den Ausgang 1 und den Eingang 8 geschalteten, festen Widerstand 9 und einem oder mehreren der Widerstände 11 bis 18, die durch Beaufschlagung eines bzw. mehrerer der Schalttransistoren 21 bis 28 in den Spannungsteiler geschaltet werden können. Der Widerstandswert des Spannungsteiler-Teil-widerstandes 11 bis 18, an dem die Gegenkopplungsspannung abgegriffen ist, ist in 255 Stufen veränderbar. Die Schalttransistoren 21 bis 28 sind durch eine Programmsteuervorrichtung 29 einzeln und in Kombinationen beaufschlagbar, wodurch 255 verschiedene Gegenkopplungsgrade einstellbar sind. Der diesbezügliche Teil des Programms ist - wie weiter unten näher beschriben - so, dass sämtliche 255 oder ausgewählte Verstärkungsgrade in zunehmender (oder abnehmender) Folge schrittweise nacheinander eingestellt werden. Ein Komparator 30 vergleicht das Ausgangsignal des Verstärkers 2 mit einer Vergleichsspannung am Ausgang 31 eines Spannungsstabilisators 32. Der Blindwiderstand eines zwischen den Widerstand 9 und die Widerstände 11 bis 18 geschalteten Kondensators 33 ist klein gegenüber einem parallel geschalteten Entladewiderstand 34.In the circuit arrangement shown in FIG. 1, the output 1 of an operational amplifier 2 is connected to its feedback input 3 by a feedback path 4 and 5, to which an oscillating circuit 6, 7 is connected. A coin channel (not shown) leads through the field of the oscillating circuit coil 6. At a negative feedback input 8 of the operational amplifier 2 is part of the output voltage of the same, which is tapped at a voltage divider. The voltage divider consists of a fixed resistor 9 connected between the output 1 and the input 8 and one or more of the resistors 11 to 18 which can be switched into the voltage divider by applying one or more of the switching transistors 21 to 28. The resistance value of the voltage divider part resistor 11 to 18, at which the negative feedback voltage is tapped, can be changed in 255 steps. The switching transistors 21 to 28 can be acted upon individually and in combinations by a program control device 29, as a result of which 255 different degrees of negative feedback can be set. The relevant part of the program is - as will be described in more detail below - in such a way that all 255 or selected gain levels are set successively in increasing (or decreasing) order. A comparator 30 compares the output signal of the amplifier 2 with a reference voltage at the output 31 of a voltage stabilizer 32. The reactance one between the resistor 9 and the counter Stands 11 to 18 connected capacitor 33 is small compared to a discharge resistor 34 connected in parallel.

Ein Eichwiderstand 35 ist mittels eines Transistors 36 parallel zum Schwingkreiskondensator 7 schaltbar. Der Widerstand 35 hat, wenn er durch Beaufschlagung des Transistors 36 parallel zum Schwingkreis 6, 7 geschaltet ist, dieselbe Wirkung wie eine Münze 37 einer bestimmten annehmbaren Sorte im Spulenfeld 6. Zweckmässig wird dazu aus den verschiedenen Münzsorten diejenige bestimmt, welche, eine mittlere Dämpfung des Schwingkreisses, bezogen auf den durch sämtliche Münzen gegebenen Dämpfungsbereich, bewirkt. Der Widerstand 35 ist klein gegenüber einem Widerstand 38, über den die stabilisierte Gleichspannung am Ausgang 31 zum Verstärkereingang 3 geführt ist.A calibration resistor 35 can be connected in parallel to the resonant circuit capacitor 7 by means of a transistor 36. The resistor 35, when it is connected in parallel to the resonant circuit 6, 7 by the application of the transistor 36, has the same effect as a coin 37 of a certain acceptable type in the coil field 6. For this purpose, the one that is used is expediently determined from the various types of coin which has a medium damping of the resonant circuit, based on the damping range given by all coins. The resistor 35 is small compared to a resistor 38, via which the stabilized direct voltage at the output 31 is led to the amplifier input 3.

Die Programmsteuervorrichtung 29 hat einen Speicher 39 mit zwei Speicherteilen, nämlich einem Festwertspeicher 49 (ROM oder REPROM) und einem Schreib-/Lese-Speicher 59 (RAM), sowie ein Rechenwerk 69.The program control device 29 has a memory 39 with two memory parts, namely a read-only memory 49 (ROM or REPROM) and a read / write memory 59 (RAM), and an arithmetic logic unit 69.

Im Festwertspeicher 49 sind ein Normalwert der Verstärkung sowie für jede annehmbare Münzsorte zwei vorbestimmte Toleranzgrenzwerte der Verstärkung gespeichert, die im folgenden als Normalgrenzwerte bezeichnet werden. Als Verstärkungswerte sind die die Verstärkung bestimmenden Widerstandswerte des Spannungsteiler-Teilwider-standes 11-18, an dem die Gegenkopplungsspannung abgegriffen ist, gespeichert. Die Speicherung erfolgt jeweils zusammen mit einem Codewort, das angibt, welche der Transistoren 21 bis 28 leitend und welche nicht leitend sind.In the read-only memory 49, a normal value of the gain as well as two predetermined tolerance limit values of the gain are stored for each acceptable coin type, which are referred to as normal limit values in the following. The amplification values are the resistance values of the voltage divider partial resistor 11-18 which determine the amplification and from which the negative feedback voltage is tapped. The storage takes place in each case together with a code word which indicates which of the transistors 21 to 28 are conductive and which are not conductive.

Der Normalwert der Verstärkung wird unter Normalbedingungen (Temperatur, Betriebsspannung) und ohne dass eine Münze im Feld der Spule 6 liegt, wie folgt bestimmt: Zunächst wird der Widerstand 35 durch Beaufschlagung des Transistors 36 parallel zum Schwingkreis 6, 7 geschaltet. Darauf beaufschlagt die Programmsteuerung 29 die Transistoren 21 bis 28 so, dass der Teilwiderstand 11 bis 18 beginnend mit dem kleinsten der 255 Widerstandswerte (alle Transistoren 11-18 beaufschlagt) stufenweise heraufgezetzt wird. Beim kleinsten Widerstandswert ist die Gegenkopplung minimal, die Verstärkung also maximal und der Oszillator 2, 6, 7 schwingt. Der Komparator 30 liefert im Takt der oberen Halbwelle der oszillatorschwingungen Impulse an die Programmsteuerung 29. Im Zuge der schrittweisen Erhöhung des Teilwiderstands 11 bis 18 wird eine Widerstandsstufe erreicht, bei der die Oszillatorschwingungen infolge des heraufgesetzten Gegenkopplungsgrads bzw. der herabgesetzten Verstärkung abklingen. Sobald die Schwingungsamplitude am Ausgang 1 kleiner als die Vergleichsspannung (der Schwellwert) am Ausgang 31 ist, setzen die periodisch vom Komparator 30 abgegebenen Impulse aus. Der Widerstandswert dieser erreichten Widerstandsstufe 11 bis 18 wird als Normalwert der Verstärkung im Festwertspeicher 49 gespeichert.The normal value of the gain is determined under normal conditions (temperature, operating voltage) and without a coin being in the field of the coil 6, as follows: First, the resistor 35 is connected in parallel with the resonant circuit 6, 7 by applying the transistor 36. The program controller 29 then acts on the transistors 21 to 28 in such a way that the partial resistor 11 to 18 is gradually increased starting with the smallest of the 255 resistance values (all transistors 11-18 acted on). At the smallest resistance value, the negative feedback is minimal, that is to say the amplification is maximum and the oscillator 2, 6, 7 oscillates. The comparator 30 supplies pulses to the program controller 29 in time with the upper half-wave of the oscillator oscillations. In the course of the gradual increase in the partial resistance 11 to 18, a resistance level is reached in which the oscillator oscillations decay as a result of the increased degree of negative feedback or the reduced amplification. As soon as the oscillation amplitude at output 1 is less than the comparison voltage (the threshold value) at output 31, the pulses emitted periodically by comparator 30 cease. The resistance value of this achieved resistance level 11 to 18 is stored as the normal value of the gain in the read-only memory 49.

Wie erwähnt, sind für jede annehmbare Münzsorte zwei Normalgrenzwerte der Verstärkung im Festwertspeicher 49 gespeichert. Diese werden ähnlich wie der Normalwert der Verstärkung bestimmt: Zuerst wird der Transistor 36 gesperrt, so dass der Widerstand 35 nicht zum Schwingkreis 6, 7 geschaltet ist. Darauf wird eine Münze der annehmbaren Sorte in das Feld der Spule 6 gebracht. Unter Normalbedingungen wird dann in derselben Weise wie bei der Bestimmung des Normalwerts der Verstärkung der Teilwiderstand 11 bis 18 stufenweise erhöht, bis die Widerstandsstufe erreicht ist, bei der die Oszillatorschwingungen aussetzen. Als Normalgrenzwerte der Verstärkung werden dann zwei Werte des Teilwiderstands im Festwertspeicher 49 gespeichert, deren einer um eine Toleranz kleiner und deren anderer um eine toleranz grösser als der Widerstand der erreichten Widerstandsstufe ist. Die Toleranzen werden zwecks strenger Prüfung genau entsprechend dem zulässigen Toleranzbereich annehmbarer Münzen der betreffenden Sorte bemessen. Die Normalgrenzwerte der Verstärkung können auch bestimmt werden, indem jeweils eine die untere und eine die obere Grenze des Toleranzbereichs der Münzsorte repräsentierende Münze in das Feld der Spule 6 gebracht und der Widerstandswert des Teilwiderstands 11 bis 18 bestimmt wird, bei dem die Oszillatorschwingungen aussetzen.As mentioned, two normal limit values for the gain are stored in the read-only memory 49 for each acceptable coin type. These are determined in a similar way to the normal value of the amplification: first, the transistor 36 is blocked, so that the resistor 35 is not connected to the resonant circuit 6, 7. A coin of the acceptable type is then brought into the field of the coil 6. Under normal conditions, the partial resistance 11 to 18 is then gradually increased in the same way as in the determination of the normal value of the amplification until the resistance level is reached at which the oscillator vibrations cease. Two values of the partial resistance are then stored in the read-only memory 49 as normal limit values for the amplification, one of which is smaller by a tolerance and the other of which is greater than the resistance of the resistance level reached. The tolerances are measured according to the allowable tolerance range of acceptable coins of the type concerned for strict testing. The normal limit values of the gain can also be determined by placing a coin representing the lower and an upper limit of the tolerance range of the coin type in the field of the coil 6 and determining the resistance value of the partial resistor 11 to 18, at which the oscillator vibrations cease.

Die Schaltungsanordnung wird durch ein Signal eines am Eingang des Münzkanals angeordneten (nicht dargestellten) Münzdetektors in Betrieb gesetzt. Beim Auftreten dieses Signals beaufschlagt die Programmsteuerung 29 den Transistor 36, der den Widerstand 35 parallel zum Schwingkreis 6, 7 schaltet. Darauf löst die Programmsteuerung 29 die im folgenden beschriebenen Vorgänge eines ersten Programmteils aus, die beendet werden, bevor die eingeworfene Münze in das Feld der Spule 6 gelangt: der Teilwiderstand 11 bis 18 wird beginnend mit dem kleinsten Widerstandswert stufenweise heraufgesetzt, bis die Widerstandsstufe erreicht ist, bei der die Oszillatorschwingungen aussetzen. Wennandere als die Normalbedingungen herrschen, ist der dieser Stufe entsprechende Wert des Teilwiderstands 11 bis 18 nicht gleich dem im Festwertspeicher 49 gespeicherten Normalwert. Vielmehr ergibt sich dann eine Abweichung. Das Rechenwerk 69 bestimmt das Verhältnis dieses Werts des Teilwiderstands zum Normalwert und multipliziert die im Festwertspeicher 49 gespeicherten oberen und unteren Normalgrenzwerte der einzelnen Münzsorten mit diesem Verhältnis. Dadurch werden unter den herrschenden Bedingungen massgebende obere und untere Grenzwerte für die Münzahnnahme erhalten. Zu jedem so erhaltenen oberen Grenzwert wird die nächste über ihm liegende, zu jedem unteren die nächste unter ihm liegende Widerstandsstufe als oberer und unterer, korrigierter Toleranzgrenzwert der betreffenden Münzsorte für die Münzprüfung im RAM-Speicher 59 gespeichert. Im folgenden werden diese korrigierten Toleranzgrenzwerte als Sollgrenzwerte bezeichnet. Der Transistor 36 wird darauf gesperrt. Damit ist der erste Teil des Programs beendet.The circuit arrangement is put into operation by a signal from a coin detector (not shown) arranged at the entrance of the coin channel. When this signal occurs, the program controller 29 acts on the transistor 36, which connects the resistor 35 in parallel with the resonant circuit 6, 7. The program controller 29 then triggers the operations of a first program section described below, which are ended before the inserted coin enters the field of the coil 6: the partial resistor 11 to 18 is gradually increased starting from the smallest resistance value until the resistance level is reached , where the oscillator vibrations stop. If conditions other than normal prevail, the value of the partial resistor 11 to 18 corresponding to this stage is not equal to the normal value stored in the read-only memory 49. Rather, there is a deviation. The arithmetic unit 69 determines the ratio of this value of the partial resistance to the normal value and multiplies the upper and lower normal limit values of the individual coin types stored in the read-only memory 49 by this ratio. As a result, relevant upper and lower limit values for coin acceptance are obtained under the prevailing conditions. For each upper limit value obtained in this way, the next resistance level lying above it, and for each lower level the next resistance level lying below it, is the upper and lower, corrected tolerance limit value of the relevant coin type for coin testing in RAM memory 59 saved. In the following, these corrected tolerance limit values are referred to as target limit values. The transistor 36 is then blocked. This concludes the first part of the program.

Der zweite Programmteil - die eigentliche Münzprüfung - wird ausgelöst, sobald die Münze 37 in das Feld der Spule 6 gelangt. Die Auslösung kann entweder eine vorbestimmte Zeit nach dem Signal des Münzdetektors oder durch einen unmittelbar vor der Spule 6 angeordneten Münzdetektor erfolgen. Bei diesem zweiten Programmteil werden entweder

  • a) die im Speicher 59 gespeicherten Sollgrenzwerte der Widerstandsstufen oder
  • b) sämtliche 255 Widerstandsstufen von unten nach oben durchlaufen.
The second part of the program - the actual coin check - is triggered as soon as the coin 37 enters the field of the coil 6. The triggering can take place either a predetermined time after the signal of the coin detector or by a coin detector arranged directly in front of the coil 6. In this second part of the program, either
  • a) the target limit values of the resistance levels or stored in the memory 59
  • b) Go through all 255 resistance levels from bottom to top.

Im Falle a) gehört die Münze dann zu einer annehmbaren Münzsorte, wenn der oszillator 2, 6, 7 beim unteren Sollgrenzwert einer Münzsorte schwingt und beim oberen Sollgrenzwert derselben Münzsorte nicht schwingt. (Der untere Sollgrenzwert ist der kleinere Widerstandswert, er bewirkt einen grösseren Verstärkungsgrad).In case a), the coin belongs to an acceptable coin type if the oscillator 2, 6, 7 oscillates at the lower target limit value of a coin type and does not oscillate at the upper target limit value of the same coin type. (The lower target limit is the smaller resistance value, it causes a greater degree of amplification).

Im Falle b) gehört die Münze dann zu einer annehmbaren Münzsorte, wenn die Widerstandsstufe, bei der die Oszillatorschwingungen aussetzen, zwischen dem unteren und oberen Sollgranzwert einer Münzsorte liegt.In case b) the coin belongs to an acceptable coin type if the resistance level at which the oscillator vibrations are between the lower and upper nominal value of a coin type.

Die Prüfung im Falle a) hat den Vorteil, dass sie wesentlich rascher erfolgt als im Falle b).The test in case a) has the advantage that it takes place much faster than in case b).

Bei der beschriebenen Ausführungsform schwingt der Oszillator 2, 6, 7 im Ruhezustand und der Teilwiderstand 11 bis 18 wird stufenweise erhölt. Selbstverständlich könnte der Oszillator im Ruhezustand auch nicht schwingen und der Teilwiderstand beginnend mit dem grössten Widerstandswert (bzw. dem grössten gespeicherten Sollgrenzwert) stufenweise herabgesetzt werden, bis die Widerstandsstufe erreicht ist, bei der die Oszillatorschwingungen einsetzen. Dabei würde die Verstärkung also nicht stufenweise herabgesetzt sondern heraufgesetzt.In the described embodiment, the oscillator 2, 6, 7 oscillates in the idle state and the partial resistance 11 to 18 is increased in stages. Of course, the oscillator could not oscillate in the idle state and the partial resistance, starting with the largest resistance value (or the largest stored target limit value), could be gradually reduced until the resistance level at which the oscillator vibrations set in is reached. The gain would not be gradually reduced, but rather increased.

Die Schaltungsanordnung nach Fig. 2 unterscheidet sich von derjenigen nach Fig. 1 durch den über strichpunktierten Linie gezeichneten Schaltungsteil. Dabei entfällt der Rückkopplungsfad 4, 5 und der Operationsverstärker 2 ist durch eine ein sekundäres Koppelglied bildende Spule 41 induktiv mit der ein primäres Koppelglied bildenden Spule 42 eines Wechselstromgenerators (bzw. Oszillators) 43 gekoppelt. Die Münze 37 gelangt dabei in das Kopplungsfeld zwischen den beiden Spulen 41, 42 und ändert den Kopplungsgrad. Das übertragene Signal gelangt über einen Kondensator 44 zum Verstärkereingang 3. Der Komparator 30 vergleicht die Amplitude des Ausgangssignals der Verstärkers 2 mit der Vergleichsspannung am Ausgang 31 und gibt im Takt der oberen Halbwelle des übertragenen und verstärkten Wechselstromsignals Signale an die Programmsteuerung 29, bis die Signalamplitude bei einer entsprechenden Verringerung des Kopplungsgrads die Vergleichsspannung (den Schwellwert) unterschreitet. Im übrigen arbeitet die Schaltungsanordnung nach Fig. 2 entsprechend der Schaltungsanordnung nach Fig. 1: Im Festwertspeicher 49 ist ebenfalls ein Normalwert der Verstärkung gespeichert. Zur Bestimmung dieses Normalwerts wird bei freiem Kopplungsfeld und parallel zur Spule 41 geschalteten Widerstand 35 der Teilwiderstand 11 bis 18 beginnend mit dem kleinsten Widerstandswert stufenweise heraufgesetzt, bis die Widerstandsstufe und damit der Verstärkungsgrad erreicht ist, bei der die Amplitude des Ausgangssignals des Verstärkers 2 gleich der Vergleichsspannung am Ausgang 31 ist oder diese unterschreitet. Als Normalwert der Verstärkung ist dann der Widerstandswert der erreichten Widerstandsstufe gespeichert. Ebenso sind für jede Münzsorte zwei vorbestimmte Normalgranzwerte der Verstärkung bzw. des Teilwiderstandes 11 bis 18 gespeichert, zwischen denen die Amplitude des Ausgangssignals des Verstärkers 2 bei einer annehmbaren Münze 37 die Vergleichsspannung annimmt. Die Münzprüfung ist dann ebenfalls analog der oben beschriebenen, indem die Programmsteuerung 29 vor der Münzprüfung den Teilwiderstand 11 bis 18 schrittweise heraufsetzt, bis die Ausgangssignalamplitude des Verstärkers 2 die Vergleichsspannung annimmt oder unterschreitet. Das Rechenwerk 69 multipliziert dann den Quotienten aus dem so erhaltenen Wert des Teilwiderstands 11 bis 18 und dem Normalwert mit den im Festwertspeicher 49 für jede Münzsorte gespeicherten unteren und oberen Normalgrenzwerten. Zu jedem so berechneten unteren und oberen Grenzwert werden die nächste unter und über ihm liegende Widerstandsstufe als unterer und oberer Sollgrenzwert der betreffenden Münzsorte im RAM-Speicher 59 gespeichert. Bei der Münzprüfung wird der Teilwiderstand 11 bis 18 dann ebenfalls stufenweise heraufgesetzt. Wird er über sämtliche 255 Widerstandsstufen heraufgesetzt, so wird ein Münzannahmesignal dann abgegeben, sofern die Ausgangssignalamplitude der Verstärkers 2 die Vergleichsspannung am Ausgang 31 dann annimmt, wenn der Wert der dabei erreichten Widerstandsstufe zwischen den beiden Sollgrenzwerten liegt. Werden nur die im RAM-Speicher 59 gespeicherten Sollgrenzwerte der Widerstandsstufen von unten nach oben durchlaufen, so wird ein Münzannahmesignal abgegeben, wenn die Amplitude des Verstärkerausgangssignals beim kleineren der beiden Widerstandssollgrenzwerte einer Münzsorte die Vergleichsspannung überschreitet und beim grösseren unterschreitet. Selbstverständlich könnte der Teilwiderstand auch beginnend mit dem grössten Widerstandswert stufenweise herabgesetzt werden.The circuit arrangement according to FIG. 2 differs from that according to FIG. 1 by the circuit part drawn with a dash-dotted line. The feedback path 4, 5 is omitted and the operational amplifier 2 is inductively coupled to the coil 42 of an AC generator (or oscillator) 43, which forms a primary coupling element, by a coil 41 forming a secondary coupling element. The coin 37 gets into the coupling field between the two coils 41, 42 and changes the degree of coupling. The transmitted signal passes through a capacitor 44 to the amplifier input 3. The comparator 30 compares the amplitude of the output signal of the amplifier 2 with the reference voltage at the output 31 and emits signals to the program controller 29 in time with the upper half-wave of the transmitted and amplified AC signal until the signal amplitude with a corresponding reduction in the degree of coupling falls below the reference voltage (the threshold value). Otherwise, the circuit arrangement according to FIG. 2 operates in accordance with the circuit arrangement according to FIG. 1: A normal value of the gain is likewise stored in the read-only memory 49. To determine this normal value, with a free coupling field and resistor 35 connected in parallel with coil 41, partial resistor 11 to 18 is gradually increased, starting with the smallest resistance value, until the resistance level and thus the gain level is reached, at which the amplitude of the output signal of amplifier 2 is equal to Comparison voltage at the output 31 is or falls below this. The resistance value of the resistance level reached is then stored as the normal value of the amplification. Likewise, two predetermined normal limit values of the amplification or the partial resistance 11 to 18 are stored for each type of coin, between which the amplitude of the output signal of the amplifier 2 assumes the reference voltage for an acceptable coin 37. The coin check is then also analogous to that described above, in that the program controller 29 gradually increases the partial resistance 11 to 18 before the coin check until the output signal amplitude of the amplifier 2 assumes or falls below the reference voltage. The arithmetic unit 69 then multiplies the quotient from the value of the partial resistance 11 to 18 thus obtained and the normal value by the lower and upper normal limit values stored in the read-only memory 49 for each coin type. For each lower and upper limit value calculated in this way, the next resistance level below and above it is stored in RAM memory 59 as the lower and upper target limit value of the coin type in question. During coin testing, the partial resistance 11 to 18 is then also gradually increased. If it is increased over all 255 resistance levels, then a coin acceptance signal is emitted if the output signal amplitude of the amplifier 2 assumes the comparison voltage at the output 31 when the value of the resistance level reached lies between the two target limit values. If only the target limit values of the resistance levels stored in the RAM memory 59 are run through from bottom to top, a coin acceptance signal is emitted if the amplitude of the amplifier output signal exceeds the reference voltage for the smaller of the two resistance target limit values of a coin type and falls below it for the larger one. Of course, the partial resistance could also be gradually reduced starting with the greatest resistance value.

Die Genauigkeit der Münzprüfung hängt bei den beschriebenen Ausführungsformen von keinerlei äusseren Einflüssen ab, sie ist lediglich durch die Anzahl der durch die Widerstände 11 bis 18 einstellbaren Verstärkungswerte beschränkt. Dabei wird schon durch eine geringfügige Erhöhung der Anzahl der Widerstände 11 bis 18 (und der entsprechenden Schalttransistoren 21-28) eine erhebliche Vergrösserung der einstellbaren Verstärkungswerte und damit der Genauigkeit erzielt.The accuracy of the coin check in the described embodiments does not depend on any external influences, it is only limited by the number of gain values that can be set by the resistors 11 to 18. A slight increase in the number of resistors 11 to 18 (and the corresponding switching transistors 21-28) achieved a considerable increase in the adjustable gain values and thus the accuracy.

Grundsätzlich könnten die Widerstände 11 bis 18 natürlich statt in den Gegenkopplungspfad auch in den Rückkopplungspfad des Oszillators geschaltet sein. Der Vorteil der Anordnung im Gegenkopplungspfad besteht aber darin, dass die Güte des Schwingkreises nicht beeinflusst, wird, was für eine genaue, selektive Münzprüfung wesentlich ist.In principle, the resistors 11 to 18 could of course also be connected to the feedback path of the oscillator instead of to the negative feedback path. The advantage of the arrangement in the negative feedback path is that the quality of the resonant circuit is not influenced, which is essential for an accurate, selective coin check.

Die Steuerung der Verstärkung könnte statt durch die Widerstände 11 bis 18 auch durch Kondensatoren erfolgen.The gain could be controlled by capacitors instead of resistors 11 to 18.

Statt der in Fig. 1 dargestellten Oszillatorschaltung 2, 6, 7 mit einem Schwingkreis 6, 7 könnte auch eine Oszillatorschaltung mit zwei gekoppelten Schwingkreisen vorgesehen werden, in deren Kopplungsfeld die Münzegelangt. Dabei könnte die Schaltung auch so ausgeführt sein, dass die oszillatorschwingungen einsetzen, wenn eine annehmbare Münze in das Spulenfeld gelangt.Instead of the oscillator circuit 2, 6, 7 shown in FIG. 1 with an oscillating circuit 6, 7, an oscillator circuit with two coupled oscillating circuits could also be provided, in the coupling field of which the coin arrives. The circuit could also be designed so that the oscillator vibrations start when an acceptable coin gets into the coil field.

Ferner sind bei der Ausführungsform nach Fig. 2 statt der induktiven Koppelglieder 41, 42 auch Kapazitive Koppelglieder möglich, deren elektrisches Feld durch die Münze beeinflusst wird.Furthermore, in the embodiment according to FIG. 2, instead of the inductive coupling elements 41, 42, capacitive coupling elements are also possible, the electrical field of which is influenced by the coin.

Der im Zusammenhang mit Fig. 1 beschriebene, erste Programmteil kann verkurzt werden, indem die stufenweise Heraufsetzung des Teilwiderstands 11 bis 18 statt mit dem kleinsten Widerstandswert mit einem grösseren Widerstandswert beginnt, der so gewählt ist, dass die Oszillatorschwingungen auch bei extremsten Bedingungen (Temperatur. stark verschmutzter Münzkanal) noch nicht aussetzen.The first part of the program described in connection with FIG. 1 can be shortened by gradually increasing the partial resistance 11 to 18 instead of the smallest resistance value with a larger resistance value which is selected so that the oscillator vibrations even under the most extreme conditions (temperature. not heavily soiled coin channel).

Ferner können bereits bei der Herstellung der Münzprüfer für die ganze Münzprüferserie vorbestimmte Normalgrenzwerte sowie ein vorbestimmter Normalwert der Verstärkung (bzw. des Teilwiderstands 11 bis 18) in den ROMs 49 gespeichert werden. Beim im Zusammenhang mit Fig. 1 erläuterten, ersten Programmteil wird in der dort beschriebenen Weise der Wert des Teilwiderstands 11 bis 18 bestimmt, bei dem die Oszillatorschwingungen aussetzen, wenn der Widerstand 35 parallel zum Schwingkreis 6, 7 geschaltet ist und keine Münze im Spulenfeld 6 ist. Das Rechenwerk 69 bestimmt in diesem ersten Programmteil lediglich die Differenz zwischen diesem Wert und dem vorbestimmten, im ROM 49 gespeicherten Normalwert und speichert diese Differenz als Korrekturwert in RAM 59. (Es werden also noch keine Sollgrenzwerte berechnet). Im zweiten Porgrammteil bestimmt das Rechenwerk 69 nacheinander sämtliche Sollgrenzwerte, indem es zu den im ROM 49 gespeicherten, worbestimmten Normalgrenzwerten jeweils den im ram 59 gespeicherten Korrekturwert addiert. Unmittelbar nach jeder Berechnung eines Sollgrenzwerts wird die entsprechende Widerstandsstufe 11 bis 18 eingestellt und in der oben beschriebenen Weise festgestellt, ob die Oszillatorschwingungen aussetzen.Furthermore, predetermined normal limit values and a predetermined normal value of the gain (or the partial resistance 11 to 18) can be stored in the ROMs 49 during the manufacture of the coin validators for the entire series of coin validators. In the first program section explained in connection with FIG. 1, the value of the partial resistor 11 to 18 is determined in the manner described there, at which the oscillator oscillations cease when the resistor 35 is connected in parallel to the resonant circuit 6, 7 and no coin in the coil field 6 is. In this first program part, the arithmetic logic unit 69 only determines the difference between this value and the predetermined normal value stored in the ROM 49 and stores this difference as a correction value in RAM 59. (No target limit values are therefore yet calculated). In the second part of the program, arithmetic logic unit 69 successively determines all target limit values by adding the correction value stored in ram 59 to the word-determined normal limit values stored in ROM 49. Immediately after each calculation of a target limit value, the corresponding resistance level 11 to 18 is set and it is determined in the manner described above whether the oscillator vibrations stop.

Claims (4)

1. A circuit arrangement for a coin tester, with an oscillatory circuit (6, 7 ; 41, 44) which is influenced by the coin (37) that is to be tested and the oscillations of which are amplified by an amplifier (2), and a programme control device (29) which acts on the amplification thereof and which has a store (39) in which are programmed two tolerance limiting values for the amplifications for each kind of coin that is to be sorted, in which respect a coin acceptance signal ensues when the output voltage of the amplifier (2) in the case of the one tolerance limiting value of one kind of coin is greater and in the case of the other is smaller than a threshold value, characterised in that stored in the store (39) is a normal value of the amplification at which the output voltage falls below or exceeds respectively the threshold value when the oscillatory circuit (6, 7 ; 41, 44) is uninfluenced, and the programme control device (29), prior to each coin testing by gradual changing of the amplification, determines that amplification value at which the output voltage falls below or exceeds respectively the threshold value, and from the ratio of the thus determined amplification value to the normal value and the two tolerance limiting values of each kind of coin forms two corrected tolerance limiting values each of the amplification, in which respect upon the actual coin testing upon which the coin (37) influence the oscillatory circuit (6, 7 ; 41, 44) the amplification is gradually changed afresh, either in accordance with the corrected tolerance limiting values or in other steps, in which respect the coin acceptance signal ensues in the first case when the output voltage in the case of the one corrected tolerance limiting value of one kind of coin is greater and in the case of the other is smaller than the threshold value, and in the latter case when the amplification at which the output voltage falls below or exceeds respectively the threshold value lies between the two corrected tolerance limiting values of one kind of coin.
2. A circuit arrangement according to claim 1, characterised in that a resistor (35) is connectable by means of a switching transistor (36) to the oscillatory circuit (6, 7 ; 41, 44), this resistor (35) is so dimensioned that it brings about approximately the same damping of the oscillatory circuit (6, 7 ; 41, 44) as an acceptable coin (37), and the normal value stored in the store (39), of the amplification is the value at which the output voltage falls below or exceeds respectively the threshold value when the resistor (35) is connected to the oscillatory circuit (6, 7 ; 41, 44), and in that the resistor (35) prior to each coin testing upon the gradual changing of the amplification is connected to the oscillatory circuit (6, 7 ; 41, 44) and during the actual coin testing is not connected thereto.
3. A circuit arrangement according to claim 1 or 2, characterised in that several resistors (11-18) or capacitors are switchable by a respective switching transistor (21-28) controlled by the programme control device (29), individually and in parallel combinations with one another into a feedback path of the amplifier (2).
4. A circuit arrangement according to one of claims 1 to 3, characterised in that connected to the output (1) of the amplifier (2) is a threshold value detector (3) which is connected to the programme control device (29).
EP81109571A 1980-12-05 1981-11-07 Circuitry for a coin tester Expired EP0053735B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT81109571T ATE15288T1 (en) 1980-12-05 1981-11-07 CIRCUIT ARRANGEMENT IN A COIN CHECKER.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CH897980 1980-12-05
CH8979/80 1980-12-05

Publications (2)

Publication Number Publication Date
EP0053735A1 EP0053735A1 (en) 1982-06-16
EP0053735B1 true EP0053735B1 (en) 1985-08-28

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AT (1) ATE15288T1 (en)
AU (1) AU7797181A (en)
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DE (1) DE3172063D1 (en)
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Also Published As

Publication number Publication date
ZA818443B (en) 1982-10-27
YU284081A (en) 1983-06-30
DE3172063D1 (en) 1985-10-03
US4492296A (en) 1985-01-08
ATE15288T1 (en) 1985-09-15
GB2090034B (en) 1984-08-30
CA1169940A (en) 1984-06-26
GB2090034A (en) 1982-06-30
NO814162L (en) 1982-06-07
EP0053735A1 (en) 1982-06-16
AU7797181A (en) 1982-06-10

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