EP0051342A1 - Synthétiseur digital de parole pour plusieurs canaux utilisant des paramètres ajustables - Google Patents

Synthétiseur digital de parole pour plusieurs canaux utilisant des paramètres ajustables Download PDF

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Publication number
EP0051342A1
EP0051342A1 EP19810201230 EP81201230A EP0051342A1 EP 0051342 A1 EP0051342 A1 EP 0051342A1 EP 19810201230 EP19810201230 EP 19810201230 EP 81201230 A EP81201230 A EP 81201230A EP 0051342 A1 EP0051342 A1 EP 0051342A1
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EP
European Patent Office
Prior art keywords
adjusting
computing
digital
speech
channels
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Application number
EP19810201230
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German (de)
English (en)
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EP0051342B1 (fr
Inventor
Petrus Gerardus Maria Maathuis
Maarten Roelof Oberman
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Staat der Nederlanden (Staatsbedrijf der Posterijen Telegrafie en Telefonie)
Nederlanden Staat
Original Assignee
Staat der Nederlanden (Staatsbedrijf der Posterijen Telegrafie en Telefonie)
Nederlanden Staat
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Publication of EP0051342A1 publication Critical patent/EP0051342A1/fr
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    • G—PHYSICS
    • G10—MUSICAL INSTRUMENTS; ACOUSTICS
    • G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
    • G10L13/00—Speech synthesis; Text to speech systems
    • G10L13/02—Methods for producing synthetic speech; Speech synthesisers
    • G10L13/04—Details of speech synthesis systems, e.g. synthesiser structure or memory management
    • G10L13/047—Architecture of speech synthesisers

Definitions

  • the invention relates to a digital speech synthesizer comprising a digital noise generator, an adjustable digital pitch generator, an adjustable digital filter and a digital-to-analog converter, the pitch generator, the multiplier and the filter being adjusted according to parameters derived from the original speech signal by the "linear predictive coding (LPC)" method, and means for computing the adjusting coefficients.
  • LPC linear predictive coding
  • Devices of this type are generally known and have the advantage that for synthesizing the speech signal storage and processing require a considerably smaller number of bits than with other digital speech synthesizing methods.
  • the device according to the invention provides a solution for the said problem, because a large number of channels can be handled simultaneously, so that a considerably higher efficiency can be achieved.
  • Another object of the invention consists in providing a device of the said type, in which the quality of the speech produced depends on the degree of occupation.
  • the degree of occupation can be considerably changed. This can be done, for example, by decreasing or increasing the number of interpolations between successive speech samples, by changing the adjustment of the adjustable filter or by changing the de-emphasis.
  • the quantity of the speech channels handled by the device can be increased, albeit - as has been said - at the expense of the quality.
  • the quality can be improved considerably.
  • Such a device offers great advantages, e.g. with message sources, such as those for time (speaking clock), weather forecasts, cueing systems and-so.on.
  • a special embodiment offers the possibility of providing, already at the transmitting end, means for transmitting a reduced quantity of information per channel on the transmission medium in periods of increased traffic density.
  • the device according to the invention is the synthesizing part and is characterized in that the means for computing the adjusting coefficients can serve a plurality of channels on a time-division basis. Thus, a more efficient use can be made of these relatively expensive means.
  • Another feature of the device according to the invention consists in that the quality of the reproduced speech signal is adjustable, because this device comprises means for computing the number of bits per adjusting coefficient according to the number of channels for which speech samples have to be computed.
  • the device may comprise means for computing the number of bits of the adjusting coefficients according to the information content of the signal supplied to the input of the device.
  • Fig. 1 is a general block diagram of a speech synthesizer.
  • the adjusting parameters for the device are designated by the letters a, b, c and d.
  • the circuit comprises a digital noise source 1, which generates white noise for unvoiced speech components, and a digital pitch generator 2, which generates the fundamental frequency for voiced speech components and is adjusted according to parameter a.
  • the choice between generators 1 and 2 is made by switch 3 as controlled by parameter b.
  • the digital signal is applied successively to an adjustable digital ladder filter 4, controlled by parameter c, and a digital volume regulator 5, controlled by parameter d.
  • a digital-to-analog converter 6 converts the digital signal into an analog signal.
  • Fig. 2 is a block diagram of the device according to the invention.
  • a digital input signal incorporating the parameters a, b, c and d is applied to input 7 of the speech synthesizer and led to a buffer 8.
  • the parameters a, b, c and d have been determined by the "linear predictive coding" method and can come from a storage medium, in the case of a message that has to be repeated regularly or from a transmission line.
  • a preprocessing unit 9 ensures the reading of the parameters and their storage in portion 10.1 of store 10, the interpolation of two successive groups of parameters, the transfer of the interpolation results to other parts of the circuit and the passing of control data to the central processing unit 11.
  • the data stored in store portion 10.1 can be transferred to a second store portion 10.2-, when the preceding data stored in 10..2 - have been processed. Processing takes place in a computing unit 12, which employs the interpolated data for adjusting the ladder filter (Fig. 1;4) incorporated in the computing unit. In the meantime store portion 10.1 is filled again.
  • the computing unit 12 of this embodiment can compute the digital speech signals for 16 speech channels simultaneously. These digital speech signals are-stored in "first-in- - first-out" buffers 13.1 ... 13.16 (one signal per channel) and then led to digital-to-analog converters 6.1... 6.16, respectively.
  • the computing unit 12 is controlled in conformity with fixed rules by.a control unit 14, which receives its instructions from the central processing unit 11.
  • Fig. 3 illustrates a preferred embodiment of the pre-processing unit 9 according to the invention, and store portion 10.1.
  • the data coming from the buffer (Fig. 2; 8) are led to a series-to-parallel converter 15.
  • the discriminator 16 infers from the first few bits of a 24-bit frame whether this frame contains speech data or control information, in which cases a data buffer 17 or a control buffer 18 is opened, respectively.
  • the speech data are led from the data buffer 17 via a data bus 19 to a microprocessor 20, which is connected to the central processing unit (Fig. 2; 11) via a control bus 21 and an address bus 22.
  • Store 23 (RAM) and decoding store 24 (ROM) are also connected to this data bus.
  • the circuit comprises an adder-multiplier 25 for carrying out parts of interpolation calculations.
  • the group of parameters comprises, as has already been observed, the following four:
  • the function of the speech data portion of the circuit of Fig. 3 is described as separating the parameters a, b, c and d and interpolating - the parameters c and d. Interpolation is necessary, because the speech information arrives in bursts and because annoying clicks could occur without interpolation.
  • the coefficients and are generated by the microprocessor 20.
  • the reflection coefficients interpolated on the basis of rule (1) and the interpolated volume are led to store 10.1.
  • the pre-processing unit comprises means for adjusting the quality of the speech reproduced according to the degree of occupation of the transmission medium. Therefore, at the transmitting end, relevant data are sent along with the control signals. These data are interpreted in the function decoder 28.
  • the circuit comprises a register 29, for recording the number of interpolations to be carried out by the microprocessor 20 on the unvoiced part of the speech, and a register 30, which has an analogous function with regard to the voiced part of the speech. Registers 29 and 30 are connected to ROM store 31, which converts the number of interpolations to be carried out into a signal for positioning counter 32, stepping in synchronism with a counter incorporated in microprocessor 20.
  • the position of counter 32 is passed to a fraction table 33 (ROM), connected via a selector 34 to control bus 21 and address bus 22. Under the control of the central processing unit (Fig. 2; 11), the number of interpolations to be carried out by the microprocessor 20 can be fixed.
  • the circuit of Fig. 3 also contains registers 35 and 36 for recording adjusting data for the adjustable filter incorporated in the computing unit (Fig. 2; 12). The adjusting data for unvoiced speech are stored in register 35, those for voiced speech in register 36.
  • a ROM 37, - converts the adjusting data into positioning data for counter 38. Via selector 39 the counter position is passed to buses 21 and 22, after which the number of calculations to be carried out by the control unit (Fig. 2: 14) is fixed under the control of the central processing unit (Fig. 2; 12).
  • the circuit may contain a register 40 for recording a signal indicating that the next one or two frames contain no speech.
  • the relevant data can be passed via selector 41 and buses 21 and 22 to the central processing unit (Fig. 2; 12), so that the computing unit (Fig.2; 14) can spend the time thus saved in dealing with-other channels.
  • the circuit may comprise a register 42 and a selector 43 for recording the signal indicating that one or two new frames contain the same information as the preceding frame, so that the new frames need not be transmitted. Because the preceding frame is in the buffer (Fig. 2; 8) for interpolation purposes, repetition will suffice, so that transmission capacity is saved. In an analogous way information concerning the degree of compression and expansion of the speech signal can be received and handled.
  • Fig. 4 illustrates a preferred elaboration of store 10.2, computing unit 12, buffers 13 and control unit 14.
  • the data stored in 10.1 (Fig. 2) are transferred to store 10.2 under the control of the central processing unit 11.
  • the data stored in 10.2, containing the information for computing the digital signal to be supplied to the buffers 13, are led to multipliers 44 and 45 working in parallel, adder-subtractor 46, AND-circuit 47 and D-flip-flop 48.
  • Selector 49 determines the number of bits to be calculated per PCM-word and a round-off factor.
  • D-flip-flop 50 ensures in a well-known manner the adaptation to bus traffic.
  • the results of a first calculation are written, for sixteen separate channels, in buffers 51, from which they can be output via D-flip-flops 52.
  • the voiced/unvoiced and pitch data are sent via output 42 to electronic switch 3 and via output 43 to generator 2, respectively, and combined by means of D ⁇ flip ⁇ fl ⁇ p 53 with the digital signal to be calculated.
  • the whole algorithm can be represented by the following formulae: and in which and
  • Multipliers 44 and 45 ensure the multiplications and adder-subtractor 46 carries out the adding and subtracting operations.
  • the intermediate results of the operations are put away, every time, in the 5.I-buffer associated with the channel dealt with. Every time one sample has been calculated, its value is multiplied by the volume factor C n .
  • the various operations carried out on the data from memory 10.2 are controlled by a programmable store (PROM) 54, which, under the control of a counter 55, makes a step every time after the calculation of one PCM-sample for each of the 16 channels.
  • the stepping of counter 55 is timed by clock 56.
  • Store 54 supplies the data required for carrying out the various operations via a control bus 57 and the address data for store 10 via address bus 58.
  • the last instruction in store 54 relates to writing the calculated final results in buffers 13 and signalling to the central processing unit 11 (Fig. 2) that the programme has finished. Then, under the control of central processing unit 11 (Fig. 2), a fresh set of data is transferred from store 10.1 to store 10.2, clock 56 being started in order to carry out again the programme contained in store 54.
  • the data produced by the programme will only be stored when the central processing unit 11 (Fig. 2) has found that the buffers 13 are not full. After the data have been stored in buffers 13, the programme is started again under the control of the central processing unit 11.
  • the invention provides a relatively simple device for generating, from an input signal produced by the LPC-method referred to hereinabove, an analog signal for a large number of channels.
  • the pre-processing unit 9 and the central processing unit 11 comprise microcomputers, for which the flow-charts are given in Figs. 5 and 6, respectively.
  • the arrangement is not relevant for a good understanding of the invention, so that the - flow-chart need not be described in detail.

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  • Engineering & Computer Science (AREA)
  • Computational Linguistics (AREA)
  • Health & Medical Sciences (AREA)
  • Audiology, Speech & Language Pathology (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
  • Multimedia (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
EP19810201230 1980-10-31 1981-10-30 Synthétiseur digital de parole pour plusieurs canaux utilisant des paramètres ajustables Expired EP0051342B1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NL8005989A NL8005989A (nl) 1980-10-31 1980-10-31 Inrichting voor digitale spraaksynthese voor meer kanalen met instelbare parameters.
NL8005989 1980-10-31

Publications (2)

Publication Number Publication Date
EP0051342A1 true EP0051342A1 (fr) 1982-05-12
EP0051342B1 EP0051342B1 (fr) 1986-01-29

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EP19810201230 Expired EP0051342B1 (fr) 1980-10-31 1981-10-30 Synthétiseur digital de parole pour plusieurs canaux utilisant des paramètres ajustables

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EP (1) EP0051342B1 (fr)
DE (1) DE3173669D1 (fr)
NL (1) NL8005989A (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101847404B (zh) * 2010-03-18 2012-08-22 北京天籁传音数字技术有限公司 一种实现音频变调的方法和装置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3715512A (en) * 1971-12-20 1973-02-06 Bell Telephone Labor Inc Adaptive predictive speech signal coding system
US3975587A (en) * 1974-09-13 1976-08-17 International Telephone And Telegraph Corporation Digital vocoder
EP0016427A2 (fr) * 1979-03-15 1980-10-01 CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A. Synthétiseur numérique de parole à plusieurs canaux

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3715512A (en) * 1971-12-20 1973-02-06 Bell Telephone Labor Inc Adaptive predictive speech signal coding system
US3975587A (en) * 1974-09-13 1976-08-17 International Telephone And Telegraph Corporation Digital vocoder
EP0016427A2 (fr) * 1979-03-15 1980-10-01 CSELT Centro Studi e Laboratori Telecomunicazioni S.p.A. Synthétiseur numérique de parole à plusieurs canaux

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
ICASSP 79, Proceedings of a IEEE International Conference on Acoustics, Speech and Signal Processing, (April 2-4, 1979, Washington) New York (US) L. NEBBIA et al.: "Eight-Channel Digital Speech Synthesizer Based on LPC Techniques" pages 884-886 * figures 2,5; page 88, left-hand column * *

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Publication number Publication date
DE3173669D1 (en) 1986-03-13
NL8005989A (nl) 1982-05-17
EP0051342B1 (fr) 1986-01-29

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