EP0014127B1 - Dispositif générateur de courbes pour la visualisation de symboles sur un écran cathodique - Google Patents
Dispositif générateur de courbes pour la visualisation de symboles sur un écran cathodique Download PDFInfo
- Publication number
- EP0014127B1 EP0014127B1 EP80400057A EP80400057A EP0014127B1 EP 0014127 B1 EP0014127 B1 EP 0014127B1 EP 80400057 A EP80400057 A EP 80400057A EP 80400057 A EP80400057 A EP 80400057A EP 0014127 B1 EP0014127 B1 EP 0014127B1
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- EP
- European Patent Office
- Prior art keywords
- receiving
- circuit
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- trace
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- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
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Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
- G09G1/08—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system
- G09G1/10—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam directly tracing characters, the information to be displayed controlling the deflection and the intensity as a function of time in two spatial co-ordinates, e.g. according to a cartesian co-ordinate system the deflection signals being produced by essentially digital means, e.g. incrementally
Definitions
- the present invention relates to a device for generating curves representing symbols in the form of circles or vectors, with a view more particularly to their display on the screen of a cathode-ray tube.
- the invention can thus be applied to cathodic display systems such as, in particular, graphic display consoles and electronic piloting indicator systems.
- a digital computer supplies data to a curve generating device in order to develop the deflection signals corresponding to the display of the various symbols.
- the scanning of the tube is of the random type, also called jumper scanning, according to which the current symbol is drawn directly by the cathode ray.
- the different sumboles are displayed one after the other in an order established in advance during an image scan of the tube.
- a buffer memory which contains the words of the data to view. These words are supplied initially by the computer which then only has to transfer the replacement words corresponding to data modifications.
- the memory is read at the rate of the image scan due to the tube during which the display of all the different data to be displayed is carried out.
- the data successively extracted from the memory are generally transformed by decoding and applied to the generator of curves.
- the curve generator device consists of circuits performing operational processing corresponding to parametric equations or algorithms, determined according to the various symbols to be displayed made up of vectors, or curves of higher degree such as circle, ellipse, conic, or alphanumeric characters.
- the generator device relates more particularly to the development of signals intended for the representation of circular symbols, the device also making it possible to represent linear or vector symbols.
- the processing can be analog or logical depending on whether the computer data is converted or not before application to the generator device.
- the resolution of the problem requires circuits that are all the more complex as the refinement, that is to say the precision required for the tracing, is higher, the algorithms corresponding to circles becoming very complex.
- the linear path is defined by its location in one of the eight octants of 45 ° possible and the path of a circle is formed of tangents at points of the circle distributed in the eight octants.
- the plot is made from a certain number of stored slope data to cover the extent of a octant and the accuracy of the plot is linked to the number of these stored values and therefore to the memory capacity. corresponding.
- the object of the invention is to provide a device for generating curves which allows great precision of the layout using relatively simple circuits since it results from the implementation of an original drawing process which results in simple algorithms.
- the trace on the screen of the cathode ray tube is constituted in a known manner by a series of elementary vectors of short length U, constant for the speed of the trace considered.
- the succession of directions of these successive elementary vectors determines the type of tracing, straight in the case where the symbol to be represented is a vector, curved in the case where it is for example a circle.
- a second range or range R 1 to R 2 is determined, according to the invention, by considering a second value 02 of angle at the center of value half of that initial 01 corresponding to the first range R 0 to R 1 .
- Several ranges can thus be determined successively by dividing by 2 each time the value of the angle at the center 0, the maximum radius being each time doubled. The number of ranges is determined based on the total range of variation to be covered.
- the parameter 0 can be written in the form m being an integer of the form G o + G where G o is a non-zero constant and where G varies from 0 to a predetermined value K, to produce K + 1 ranges of variation.
- the resolution for ⁇ L is equal to U. 2k .
- the tracing cannot generally be carried out exactly because it is carried out by means of elementary vectors whose fixed length U is generally different from that L on the side of the theoretical polygon defined above.
- the condition is imposed that each elementary vector ends at a point belonging to the theoretical polygon of side L considered.
- x n the distance which separates the end of the n th elementary vector from the next vertex of the polygon, it is agreed that: when this distance x n is greater than or at least equal to the value U, the elementary vector of order n + 1 is drawn exactly along the side of the polygon and in the opposite case, that is to say for x n less than U, the drawing of the vector n + 1 is carried out according to the polar angle of the next side of the corrected polygon at an angle ⁇ n + 1 .
- the value P is equal to the angle made by the direction AB with a reference direction for measuring the angles, not shown.
- the plot algorithm is deduced from the foregoing relationships by using the binary factor ⁇ n-1 by convention equal to I for x n-1 ⁇ U and equal to 0 for x n-1 ⁇ U to facilitate writing. .
- the realization of the curve generator device can be carried out in multiple ways, the essential means responding to the general layout algorithm have been symbolized on the general diagram of FIG. 4, disregarding the time synchronization, for the sake of simplification. .
- Calculation means 1 forming part of an annex digital computer, develop the parameter ⁇ L as a function of the radius R displayed or programmed and also deliver, the data U and 0 (or m), the initial angular value ⁇ o and incidentally, and 0 / U which result from simple calculations.
- the processing is preferably digital and the corresponding logic circuits comprise; a first summing circuit 2 which performs the summation relative to x n , a circuit 3 which produces the factor ⁇ n by comparison of the values U and x n ′ a multiplier circuit 4 solving a n , a second summing circuit 5 which produces ⁇ n and a third summing circuit 6 which delivers the polar angle P n or real direction of the trace.
- the signal Pn is then processed in a known manner in additional circuits, comprising a sine-cosine table 7 which delivers the sin P n and cos P n values respectively to integration circuits 8 and 9 whose integration time corresponds to that of the symbol to be traced.
- This duration is controlled and determined by the computer by using, for example, up-counting means supplied by a clock signal.
- the downstream circuits can consist of digital-analog conversion circuits 10 and 11 preceding or following conventional multiplication and addition circuits 12 and 13 to produce the format. and the initial positioning of the route.
- the operators and the initial coordinates are also provided by the computer.
- the resulting deflection signals feed beam deflecting members 14 and 15 of the cathode ray tube 16.
- a linear vector plot is obtained simply as can be seen by forcing the control value ⁇ n of circuits 2, 4, 5 and 6 to 1 so as to keep the polar direction of the plot constant.
- This can be obtained by a control signal SV supplied by the computer and transmitted through a gate circuit or 17 receiving ⁇ n by a second input.
- FIG. 5 An exemplary embodiment of the logic processing circuits is shown in FIG. 5. It includes a first memory register 30 or waiting register which receives from the annex computer the digital data ⁇ L, m relating to the radius R as well as the data S of the direction of layout. The data are entered in parallel in the register 20 upon reception by the latter of a loading signal S1 (FIG. 6). It is considered that the transferred word comprises eight bis for the data ⁇ L, three bits for the parameter m defining the angle at the center 0 and one bit for the parameter S.
- a second register 21 constitutes a buffer memory. On receipt of a loading pulse S2 the data ⁇ L, m and S are transferred to the register 21. From then on, the data relating to the circle or vector symbols can be entered in the register 20.
- a circuit 22 grouping a multiplexer and a register is initially loaded at the value It then receives the output of an addition circuit 23 itself supplied by the output of the register 22 and by the value ⁇ L of the register 21.
- the weight of the registers 20, 21, 22 is U length of the elementary vector.
- the value x o is produced using the seven most significant bits of ⁇ L and a bit 1.
- the command S3 is applied to initialize the content of the register 22 at x o then the output of the summator 23 remains connected to the register which is periodically controlled by the signal H ⁇ n , H being the clock signal shown in FIG. 6.
- the factor ⁇ n is produced using an AND circuit 24 of a flip-flop PQ 25. L ' integration of the length error ⁇ L takes place in the register 22.
- the overflow of the integrator is memorized by the signal S4 in the flip-flop 25 which produces ⁇ n .
- the content of register 22 is increased by ⁇ L, or decreased by U and the flip-flop reset to 0, which does the first relation of the algorithm well.
- the content M1 of register 22 of weight 2 8 considered as an integer represents
- the other relations of the algorithm are realized by means of a complement circuit 26, of an OR gate 27 of a bit shift circuit 28, of an AND gate circuit 29 and of a summing assembly 30 and multiplexer -register 31 similar to the set 23 and 22.
- the clock signal H is equal to 0 during a first half-period and to 1 during the following half-period (fig. 6).
- the initial value ⁇ o is introduced into the integrator register 31 and added or subtracted from the output M4 of the AND circuit 29 according to the sign of the parameter S of direction of the trace.
- the output of the summator 30 is looped back to the register 31 to produce the value P n responding to the algorithm.
- the polar angle value P n is transmitted downstream through a buffer register circuit 32.
- the other circuits' represented comprise waiting registers 33 and 34 in which the initial value ⁇ o and an image rotation value ⁇ are respectively written. This value ⁇ is added to the value ⁇ o by means of a summing circuit 35.
- the number M4 at the output of the gate circuit 29 is forced to 0 by the signal SV applied to the AND gate circuit 29 via of an OR gate circuit 37 which receives the signal ⁇ n by its second input.
- the output value P n retains the initial value B o , or ⁇ o + ⁇ in the case of an image rotation of angle ⁇ .
- An important advantage of the invention is to allow the plotting at constant speed of the circles whatever their diameter in the total range of variation R o to R K , the ratio of the extreme radii being equal to 2 8 in the example considered.
- a speed change may be necessary, for example, because the number of symbols to be represented becomes very high, or else, as a result of a change of colors in the case of a color representation on a three-color tube.
- the parameter V of the speed is introduced into the exponent m to vary the speed in the ratio 2 each time and the range of the circles G is previously added to the speed in a summing circuit 36 which allows to compensate for the effect of the size of the elementary vector on the radius of the traced circle.
- Parameter 0 is thus of the form
- the dividend 2 m is doubled when the speed is halved, which amounts to halving the angle 0 and having smaller elementary vectors to keep the same radius value on the screen.
- the circular arc tracing is obtained by checking the integration time in the integrator circuits 8 and 9 from the annex computer programmed accordingly.
- the particular process implemented in a curve generating device is characterized in that a quasi-continuous variation of the radius R desired for the circle to be displayed is obtained over a wide range of variation using a binary variation parameter 0 angle at the center, as well as possibly, a binary variation of the value U of the elementary vector combined with a binary variation of the speed V of the plot; the corresponding digital processing is carried out according to a relatively simple logic assembly, of small overall size and therefore particularly suitable for constituting airborne equipment and being integrated into an electronic piloting indicator system.
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- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Image Generation (AREA)
- Spark Plugs (AREA)
- Investigating, Analyzing Materials By Fluorescence Or Luminescence (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR7902281A FR2448194A1 (fr) | 1979-01-30 | 1979-01-30 | Dispositif generateur de courses pour la visualisation de symboles sur un ecran cathodique |
FR7902281 | 1979-01-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0014127A1 EP0014127A1 (fr) | 1980-08-06 |
EP0014127B1 true EP0014127B1 (fr) | 1983-03-16 |
Family
ID=9221338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP80400057A Expired EP0014127B1 (fr) | 1979-01-30 | 1980-01-15 | Dispositif générateur de courbes pour la visualisation de symboles sur un écran cathodique |
Country Status (4)
Country | Link |
---|---|
US (1) | US4314351A (bs) |
EP (1) | EP0014127B1 (bs) |
DE (1) | DE3062305D1 (bs) |
FR (1) | FR2448194A1 (bs) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4481605A (en) * | 1982-03-05 | 1984-11-06 | Sperry Corporation | Display vector generator utilizing sine/cosine accumulation |
ZA834723B (en) * | 1982-07-08 | 1984-03-28 | Int Computers Ltd | Digital display system |
US4692887A (en) * | 1983-05-10 | 1987-09-08 | Casio Computer Co., Ltd. | Circle and circular arc generator |
US4646075A (en) * | 1983-11-03 | 1987-02-24 | Robert Bosch Corporation | System and method for a data processing pipeline |
GB2204216B (en) * | 1987-04-30 | 1991-02-06 | Ibm | Curve generation in a display system |
JPH0668771B2 (ja) * | 1987-12-07 | 1994-08-31 | 沖電気工業株式会社 | Dda円発生表示方法 |
US4987554A (en) * | 1988-08-24 | 1991-01-22 | The Research Foundation Of State University Of New York | Method of converting continuous three-dimensional geometrical representations of polygonal objects into discrete three-dimensional voxel-based representations thereof within a three-dimensional voxel-based system |
AU2001239926A1 (en) * | 2000-02-25 | 2001-09-03 | The Research Foundation Of State University Of New York | Apparatus and method for volume processing and rendering |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3696391A (en) * | 1969-09-19 | 1972-10-03 | Thomson Csf T Vt Sa | System for the display of synthesized graphic symbols |
US3728528A (en) * | 1971-03-24 | 1973-04-17 | Allen Bradley Co | Circular interpolation by finite differences |
FR2218646B1 (bs) * | 1973-02-20 | 1976-09-10 | Thomson Csf | |
US4023027A (en) * | 1975-11-10 | 1977-05-10 | Rockwell International Corporation | Circle/graphics CRT deflection generation using digital techniques |
US4115863A (en) * | 1976-12-07 | 1978-09-19 | Sperry Rand Corporation | Digital stroke display with vector, circle and character generation capability |
-
1979
- 1979-01-30 FR FR7902281A patent/FR2448194A1/fr active Granted
-
1980
- 1980-01-15 DE DE8080400057T patent/DE3062305D1/de not_active Expired
- 1980-01-15 EP EP80400057A patent/EP0014127B1/fr not_active Expired
- 1980-01-28 US US06/115,885 patent/US4314351A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US4314351A (en) | 1982-02-02 |
EP0014127A1 (fr) | 1980-08-06 |
FR2448194A1 (fr) | 1980-08-29 |
DE3062305D1 (en) | 1983-04-21 |
FR2448194B1 (bs) | 1981-10-30 |
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