EA201700119A1 - DEVICE FOR DIRECT DISPLAY OF ADDRESSES OF DATA, LOCATED IN EXTERNAL SEQUENTIAL ROM, INTO ADDRESS OF MICROPROCESSOR CORE, COMPUTER SYSTEM AND DATA TRANSMISSION METHOD - Google Patents

DEVICE FOR DIRECT DISPLAY OF ADDRESSES OF DATA, LOCATED IN EXTERNAL SEQUENTIAL ROM, INTO ADDRESS OF MICROPROCESSOR CORE, COMPUTER SYSTEM AND DATA TRANSMISSION METHOD

Info

Publication number
EA201700119A1
EA201700119A1 EA201700119A EA201700119A EA201700119A1 EA 201700119 A1 EA201700119 A1 EA 201700119A1 EA 201700119 A EA201700119 A EA 201700119A EA 201700119 A EA201700119 A EA 201700119A EA 201700119 A1 EA201700119 A1 EA 201700119A1
Authority
EA
Eurasian Patent Office
Prior art keywords
data
address
microprocessor core
rom
addresses
Prior art date
Application number
EA201700119A
Other languages
Russian (ru)
Other versions
EA039007B1 (en
Inventor
Дмитрий Сергеевич КОРОЛЕВ
Константин Львович ГУРИН
Павел Николаевич ОСИПЕНКО
Константин КРАСИК
Original Assignee
Открытое Акционерное Общество "Байкал Электроникс"
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Открытое Акционерное Общество "Байкал Электроникс" filed Critical Открытое Акционерное Общество "Байкал Электроникс"
Publication of EA201700119A1 publication Critical patent/EA201700119A1/en
Publication of EA039007B1 publication Critical patent/EA039007B1/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/445Program loading or initiating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Microcomputers (AREA)
  • Digital Computer Display Output (AREA)

Abstract

Изобретение относится к системам памяти и способам управления ими с возможностью выполнять программу с того же накопителя, где она размещена, без ее предварительной загрузки в оперативную память микропроцессора применительно к недорогим компьютерным системам с небольшим объемом оперативной памяти и к способам передачи данных в них. Компьютерная система, включающая в себя систему на кристалле и внешнее последовательное ПЗУ, и соответствующий способ передачи данных основаны на работе устройства прямого отображения адресов данных внешнего последовательного ПЗУ в адресное пространство микропроцессорного ядра, которое характеризуется тем, что включает в себя регистр считанных данных, регистр адреса и конечный автомат устройства прямого отображения адресов, с возможностью осуществления прямого отображения адресов данных внешнего последовательного ПЗУ, в адресное пространство микропроцессорного ядра, преобразования запросов на чтение со стороны микропроцессорного ядра в последовательность обращений к контроллеру внешнего последовательного ПЗУ и передачи по шине данных последовательности слов данных, считанных из внешнего последовательного ПЗУ, в микропроцессорное ядро.The invention relates to memory systems and methods for managing them with the ability to execute a program from the same drive where it is located, without preloading it into the microprocessor’s main memory as applied to low-cost computer systems with a small amount of RAM and to methods for transmitting data to them. The computer system, which includes a system-on-chip and an external serial ROM, and the corresponding data transfer method are based on the operation of a device for directly mapping data addresses of an external serial ROM to the address space of the microprocessor core, which is characterized by the fact that it includes the read data register, the address register and the state machine of the device for direct address mapping, with the possibility of realizing the direct mapping of data addresses of the external sequential ROM, to the address a space of the microprocessor core, the conversion of requests to read from the microprocessor core in a sequence of calls to a controller external serial ROM and transmission over the data bus the sequence of data words read from the external serial ROM in the microprocessor core.

EA201700119A 2014-09-01 2015-09-01 Device for direct mapping of data addresses located in the external serial rom into the address space of microprocessor core, computer system, and data transmission method EA039007B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
RU2014135505/08A RU2579942C2 (en) 2014-09-01 2014-09-01 Device for direct mapping of data addresses, located in external serial rom, to address space of microprocessor core, computer system and method of transmitting data
PCT/RU2015/000553 WO2016036281A1 (en) 2014-09-01 2015-09-01 Device for the direct mapping of data addresses

Publications (2)

Publication Number Publication Date
EA201700119A1 true EA201700119A1 (en) 2017-10-31
EA039007B1 EA039007B1 (en) 2021-11-22

Family

ID=53284987

Family Applications (1)

Application Number Title Priority Date Filing Date
EA201700119A EA039007B1 (en) 2014-09-01 2015-09-01 Device for direct mapping of data addresses located in the external serial rom into the address space of microprocessor core, computer system, and data transmission method

Country Status (3)

Country Link
EA (1) EA039007B1 (en)
RU (1) RU2579942C2 (en)
WO (1) WO2016036281A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111858457B (en) * 2020-07-15 2023-01-10 苏州浪潮智能科技有限公司 Data processing method, device and system and FPGA
CN112817902B (en) * 2021-02-05 2022-08-02 中国电子科技集团公司第五十八研究所 Interconnected bare chip interface management system and initialization method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5546546A (en) * 1994-05-20 1996-08-13 Intel Corporation Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge
US5535360A (en) * 1994-08-31 1996-07-09 Vlsi Technology, Inc. Digital computer system having an improved direct-mapped cache controller (with flag modification) for a CPU with address pipelining and method therefor
US6601167B1 (en) * 2000-01-14 2003-07-29 Advanced Micro Devices, Inc. Computer system initialization with boot program stored in sequential access memory, controlled by a boot loader to control and execute the boot program
JP2004334486A (en) * 2003-05-07 2004-11-25 Internatl Business Mach Corp <Ibm> Starting system using boot code and starting method
KR100693924B1 (en) * 2005-01-31 2007-03-12 삼성전자주식회사 Booting system using high speed serial interface and booting method of the same

Also Published As

Publication number Publication date
RU2014135505A (en) 2015-05-27
WO2016036281A1 (en) 2016-03-10
EA039007B1 (en) 2021-11-22
RU2579942C2 (en) 2016-04-10

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