DE9318885U1 - Circuit arrangement for binary coding of the converter of phase-shifted periodic input signals - Google Patents

Description

Circuit arrangement· for binary coding· of the converter of phase-shifted periodic input signals

Known analog-digital converters have in common that they convert an analog signal amplitude into a digital value using various methods (parallel method, weighing method, counting method). For measuring and testing processes or, for example, for the rapid control of machines that perform rotary movements, it is desirable that not only the signal amplitude value is available digitally, but also the angle value of the periodic signal. It is possible to determine the angle value from a periodic signal time-sampled with a conventional analog-digital converter; however, this requires, for example, that the time-sampled, discrete values are first stored in a memory and then evaluated using a calculation method.

The object of the invention is therefore to provide a circuit arrangement for the binary coding of phase-shifted periodic input signals, with which the angle value can be determined directly, i.e. without the interposition of a storage device and complex arithmetic operations, as a digital value from the applied periodic signals.

This object is achieved by a circuit arrangement according to claim 1.

Appropriate embodiments and further developments of the invention are the subject of the subclaims.

In the following, two possible embodiments of the invention are described in more detail with reference to the drawings.

·

where PHI is the angle value of the signals and phi is the count value of a counter.

Show it:
Fig. 1 shows a first embodiment of the invention with

two feedback loops,
Fig. 2 two sinusoidal, 90° phase-shifted

Input signals eL (PHI), e ₂ (PHI), Fig. 3 the counter control depending on phi,

PHI-PHI,
Fig. 4 the counting direction signal f (phi, PHI) =

sin (PHI - phi),
Fig. 5 a second embodiment of the invention with

a feedback loop, a

Switching control and an EXOR gate, Fig. 6 the counting direction signal f(phi,PHI) =

(sin (PHI)-cos(PHI)*tan(phi))*sign(cos(phi)), Fig. 7 one of the tan and cot functions

composite, section-defined

Transmission function,
Fig. 8 the counting direction signal f(phi,PHI) for the

composite transfer function according to

Fig.7,
Fig. 9 an embodiment of a tan D/A converter,

which consists of the functional network, the D/A converter and the multiplier of the

Circuit arrangement as shown in Fig. 5,

and
Fig. 10 the transfer function of the

Functional network in different

Input signals e-j_ and e.2 -

Fig. 1 shows a possible first circuit arrangement for a sine-digital converter for determining a digital angle value from two sinusoidal input signals e^ (PHI), e.<^ (PHI) shifted by 90°, where a predetermined

Counter reading phiy, preferably phiy=0, of counter 2 is assigned to a predetermined angle value PHIy, preferably PHIy=O°, of the input signals.

The circuit arrangement shown in Fig. 1 comprises a comparator 1, a counter 2 and two feedback loops 4, 5 as a comparison device, which are connected between the output of the counter 7 and one of the two multipliers 11, 12 arranged in front of the inputs of the comparator 9, 10. Each of the two feedback loops 4, 5 comprises a D/A converter 14, 15 and a function network 16, 17, each of which has a trigonometric function as a transfer function.

If, for example, the two sinusoidal input signals e _x (PHI) = sin PHI and e ₂ (PHI) = cos PHI, which are shifted by 90° and are shown in Fig. 2 together with a possible division of the angle range from 0 to 360° into a plurality of discrete values 18, are applied to the circuit arrangement, these are multiplied in the multipliers 11, 12 by the signals T ₁ (phi) and r ₂ (phi) fed back from the counter to form a signal n ₁ (PHI, phi) and n ₂ (PHI, phi) and compared with each other in the comparator 1. The following counting direction signal f(PHI, phi) is present at the counting direction input 20 of counter 2, depending on the value PHI of the input signals e-|_, e ₂ and the counting value phi, which is converted into an analog value and fed back via loops 4, 5:

1 for -360°<PHI-phi<-180°; PHI,phi e [-180°..180°]

-1 for -180°<PHI-phi< 0°; PHI,phi e [-180°..180°]

1 for 0°<PHI-phi< 180°; PHI,phi e [-180°..180°] (1)

-1 for 180°<PHI-phi< 360°; PHI,phi e [-180°..180°],

where the counting direction signal f(PHI, phi) controls the counter 2 in such a way that it counts backwards when -1 is applied and

counts forward when +1 is applied. The counter control as a function of PHI and phi is illustrated in Fig. 3 as a projection in a two-dimensional plane. An arrow 22 pointing to the left stands for the counting direction signal -1 and an arrow pointing to the right stands for a counting direction signal +1. As can be seen from the figure, this counter control changes an initial counting value phi^ along the shortest path until the counting value phi of the counter 2 has reached the discrete value 18, which corresponds to the angle value PHI of the input signals e-j_, e.^ . This achieves an optimum speed of the converter.

One way to realize such a counting direction signal f (phi, PHI) with the input signals e-^ (PHI) = sin PHI and e-2 (PHI) = cos PHI is for the function network 17 to have the function cos phi as the transfer function and the function network 16 to have the function sin phi as the transfer function. The counting direction signal f(PHI, phi) then behaves according to the function:

f(PHI, phi) = sin (PHI)* cos (phi) - cos (PHI) *sin (phi) = sin (PHI - phi), (2)

whose graph f(phi, PHI) is shown in Fig. 4.

Since the function values for which f(phi, PHI) > 0 only have to cause counter 2 to count up and the function values for which f(phi; PHI) < 0 should cause the counter to count down, it is sufficient to use only the sign of the function f(phi, PHI) to control the counter as a counting direction signal.

Disadvantageous to the above-described

Circuit arrangement is that two feedback loops 4, with two multipliers 11, 12, two function networks 16, 17 and two digital-analog converters 14, 15 are required

&bull; *

·1

in order to realize the sine/digital converter according to the invention.

The disadvantages described are avoided in the second circuit arrangement of a sine-digital converter shown in Fig. 5, in which a predetermined counter reading phiy, preferably phiy=0, of the counter 2 is assigned as a reference value to a predetermined angle value PHI _V , preferably PHIy=O ⁰ , of the input signals.

This second embodiment is characterized by the fact that it comprises only one feedback loop 4 with a multiplier 11, a functional network 16, which has a tangent or cotangent transfer function, and a D/A converter 14. To illustrate the functionality of this circuit arrangement, whereby the switching control 40, 41 is initially disregarded, two sinusoidal signals e-j_ = sin (PHI), e ₂ = ^cos (PHI) are applied to the circuit arrangement. The signals at the comparator inputs 9, 10 are then:

U ₁ = sin (PHI) and n ₂ = cos (PHI) * tan (phi),

where the function network 16 should have a tangent transfer function. The signal at the comparator output 25 f]_ (phi, PHI) is then given as:

f-L (phi,PHI) = sin (PHI) - cos (PHI) * tan (phi). (3)

In order to obtain the counting direction signal f(phi, PHI) required for the counter control according to the previously given definition, it is necessary to multiply the function f]_ (phi, PHI) by the function cos (phi). Since only the sign of the function f (phi, PHI) is processed as the counting direction signal, the multiplication of f-j_ by cos (phi) can be carried out very simply by inserting a controlled EXOR gate 3 0 between the

Implement comparator output 25 and counting direction input 20 of counter 2.

The function f (phi, PHI) for the example described above is shown in Fig. 6. As can be seen from this diagram, the function f (phi, PHI) has poles in addition to the desired properties, which are caused by the tangent function at phi = 270°, 90°, -90°, -270°. These infinity points prevent it from being possible to display the counting direction signal f (phi, PHI) over a full period of 3 60° in a circuit arrangement with a feedback loop without switching control 40, 41. This is also not possible for the expert if the cotangent function is selected as the transfer function of one function network 16 instead of the tangent function, since poles then occur at the angles phi = 180°, 0° and -180°.

As is known, the poles of the tangent and cotangent functions are each offset by 90°, so that the representation of a function f (phi, PHI) over the full period is possible for the case of two sinusoidal signals e-j_, e ₂ with a feedback loop if the tangent and cotangent functions are only used in sections as transfer functions Ü. Such a section-wise transfer function Ü of the function network 16, formed from tangent and cotangent, is shown in Fig. 7. For this transfer function, the counting direction signal f (phi, PHI) is:

[sin(PHI)-cos(PHI)*Un(phi)]*sign[cos(pht)] ,for -180° < phi < -135°

[ sin (PHI)* cot (phi)- cos (PHI)] * sign[sin (p/w)] ,for -135° <phi< -45°

[sm(PHI)-cos(PHI)*Un(pht)]*sign[cos(phi)] ,for -45° <phi<

[sin (PHI) * cot (phi) - cos ( PHI)] * signfsin (phi)] , for 45° < phi <

[ sin (PHI) - cos (PJET/) * tan (phi)] * signfcos (phi)] , for 135° < phi < 180°

&bull; · &bull; ·

·

·

As Fig. 8 shows, the above section-wise defined counting direction signal f (phi, PHI) has no poles for sinusoidal or cosinusoidal input signals el, e2 and thus enables the control of the counter 2 according to Fig. 3. In order to be able to select the respective functional areas for forming a section-wise defined counting direction signal, the circuit arrangement shown in Fig. 5 comprises the switching control 40, 41. The switching control 40, 41 controls both the switching of the input signals e-^ and e ₂ to the inputs 9, 10 of the comparator and the switching of the function network 16 between the tangent and cotangent functions. The selection of the transfer function and the respective input signals &&khgr;,&2 to be multiplied by it depends only on the count value phi, which is determined by the decoder 40 of the switching control. The switching points of the switching control 40, 41 for the sectionally used tan and cot transfer function Ü according to Fig.7 are the angle values phi = 2K+1 * 45°, KeZ.

The functioning of the switching control is described below for the example e ₁ = sin (PHI); e ₂ = cos (PHI) and the angular range -180° < phi < -45°. If the decoder 40 detects a value phi in the interval [ -180° - 135° [, the tan function is selected in the function network and the segment switching selects the signal nL = e-^ = sin (PHI) for input 9 of the comparator. The signal n ₂ = cos (PHI) * tan(phi) is then present at input 10, resulting in the function f(phi,PHI) in the interval [ -180° -135° [ according to equation 4. If the value determined by the decoder 40 is in the range [ 135°; 45°[, the function n ₂ = e ₂ = cos (PHI) is selected as the signal for input 9 and the cot function is selected in the function network, so that the signal n ₂ = sin(PHI) * cot(phi) is applied to input 10 and the inverted function f(phi,PHI) is obtained in the interval [ -135° -45° [ according to Eq.4.

The switching to and between the other intervals of Eq.4 is done in an analogous manner.

In order to obtain the counting direction signal f(phi,PHI) according to equation 4, the switching control 40,41 described above requires an inversion of the comparator output signal for the ranges phi e [-135°; -45°[ and phi e [-45°; 135° [. This is achieved by controlling the EXOR gate 3, which thus fulfils two functions: firstly, it carries out the signum function, which corresponds to multiplication by sin phi or cos phi; secondly, it inverts the signal in the ranges specified above.

In an expedient embodiment of the invention, the D/A converter 14, the functional network 16 with the tangent or cotangent transfer function and the multiplier 11 are combined to form a single component, the tan D/A converter 50. A possible circuit implementation of such a tan D/A converter 50 is shown in Fig. 9. In this embodiment, the tan D/A converter 50 is implemented by resistors R ₁ , R2, R3 connected in series. Their resistance values are not all the same, as is usual with parallel converters, but are weighted with the tangent function. In the present example, the values selected were R ₁ = 420 Ω, R ₂ = 310 Ω and R ₁ = 270 Ω.

Since the curves of the tan or cot function are identical in terms of magnitude or mirror image at intervals of 45° (see also Fig. 8), it is sufficient, with appropriate design of the switching control 40, 41, that the tan D/A converter used in a circuit arrangement according to Fig. 5 is only constructed for an angle range of 0° to 45°, as in the embodiment shown in Fig. 9.

The multiplication in the tan D/A converter 50 is carried out by applying the function e _lf e ₂ e.g. e ₂ = cos (PHI), e-j_ = sin (PHI) as a reference voltage to one terminal 51 of the converter 50, the other terminal 52 being on

a reference potential U _ß , preferably OV, and the correct reference voltage is switched on at taps 56, 57, 58, 59 according to the counter reading of phi. For phi e [0°,45°] the reference potential U _B applied to tap 56 corresponds exactly to the predetermined counter reading phiy, for example 0. With a signal e2 = cos (PHI) applied to terminal 51 and the previously listed resistances Rl = 420 Ω, R ₂ = 310 Ω and R ₃ = 270 Ω, tap 59 represents a value tan (45°) * cos (PHI), tap 58 a value tan (30°) * cos (PHI), tap 57 a value tan (15°) * cos (PHI) and tap 56 a value tan (0°) * cos (PHI). Since a tan D/A converter of the form described above constantly counts a least significant bit (LSB) up or down with a constant input signal, the converter would never come to rest. To prevent this, taps 60, 61, 62 can be provided, which ensure that a constant output value is also supplied by the converter when the angle value at the input is constant. This is achieved by comparing the mean voltage at the respective tap, e.g. 61, between two taps, e.g. taps 58 and 57, with the input signal in an intermediate step. If the mean voltage is lower, the counter reading is applied to comparator 1. The counter reading cannot change here. If the input signal again contains an angle value that is in the angle range of the first step, the same mean voltage will result again and the counter reading will no longer change.

Instead of taps 60, 61, 62, it is also possible to connect a voltage divider with an adjustable divider ratio to the respective tap, which is constructed as a capacitor with a capacitive divider.

In order to process non-sinusoidal, periodic input signals e-j_ and e ₂ or distorted

In order to enable the use of sinusoidal input signals, a further embodiment of the tan D/A converter advantageously provides that the functional network comprises an adjustment device 70, 71, 72 with which the voltage values assigned to the counter reading can be changed in such a way that the angular range 5phi, which corresponds to a change in the counter reading by ± 1, is ^always the same size for any input signals e-^ e ₂ .

For example, with two triangle signals that are 90° out of phase,

e-L = (A * PHI) /90° and

e ₂ = A * (1 - PHI/9O°) PHI e [0°,90°]

instead of the tangent function, the following transfer function can be represented by the function network:

phi / (90° - phi). (5)

phi e [0°,90°]

The transfer functions tan phi and phi / (90 - phi) determined for the two examples shown are shown in Fig. 10. The function phi / (90 - phi) is very similar to the tangent function, but more curved.

Both functions can be implemented in a single circuit arrangement if the weighting of the individual resistors R ₁ , R ₂ , R3 can be changed so that one or the other transfer function Ü is represented discretely by the respective selected resistor chain. In addition, the adjustment device 70, 71, 72 enables the transfer function to be adapted to any distorted signals, thus enabling a customer-specific setting of the respective circuit arrangement.

With the device according to the invention it is thus possible for the first time in a simple manner to determine angular positions of any periodic signals that are phase-shifted against each other in digital form, whereby

This comprises a compact circuit arrangement that can easily be implemented as an integrated, customer-specific circuit.

Claims (10)

Sayings 1. Circuit arrangement for the binary coding of the angle value (PHI) of at least two phase-shifted, periodic input signals Ce ₁ (PHI), e ₂ (PHI)) with at least one comparison device (1), a counter (2), a digital-analog converter (3,4) and a signal combination device (7,8), characterized in that that the comparison device (1) comprises at least two inputs (9, 10) and one output (11), that the output of the comparison device is connected to a counting direction input (12) of the counter (2), that the output (13) of the counter (2), which supplies a count value (phi), is fed back to at least one input (9,10) of the comparison device via at least one loop (14,15), that each loop (14, 15) comprises at least one digital-analog converter (3, 4) and a functional network (5, 6) and that a signal combination device (7, 8) is arranged in front of at least one input (9, 10) of the comparison device. 2. Circuit arrangement according to claim 1, characterized in that at least one feedback signal (r-j_ (phi) ,r ₂ (phi) ) is combined via the one loop (14,15) with the associated input signal Ce ₁ (PHI),e ₂ (PHI)) by at least one signal combination device (7, 8) to form a signal (n-]_ (PHI,phi) ,n ₂ (PHI,phi) ) which is applied to the associated input (9, 10) of the Comparator is present, and that the following applies to the counting direction signal f(PHI,phi) formed in the comparison device and applied to the counting direction input of the counter: 1 for -360°<PHI-phi<-180°; PHI,phi e [-180°..180°] -1 for -180°<PHI-phi< 0°; PHI,phi e [-180°..180°] 1 for 0°<PHI-phi< 180°; PHI,phi e [-180°..180°] -1 for 180°<PHI-phi< 360°; PHI,phi e [-180°..180°] where the counting direction signal f((PHI,phi)) controls the counter (2) in such a way that it counts backwards when -1 is present and forwards when 1 is present. 3. Circuit arrangement according to claim 1 or 2, characterized in that that the comparison device is a comparator (1) and that the signal combination device is a multiplier (7, 8). 4. Circuit arrangement according to one of claims 1 to 3, characterized in that in the case of periodic signals which have sections with curve progressions that are identical in magnitude or mirror image per period (3 60°), a switching control (16, 17) is provided such that the signal processing can only take place for the sections. 5. Circuit arrangement according to one of claims 1 to 4, characterized in that that one input signal (Ce ₁ (PHI)) is a sine signal (sin (PHI)) and the other input signal (e ₂ (PHI)) is a cosine signal (cos (PHI)), that the two input signals have the same period and a fixed phase shift of 90° to each other, that one functional network (5) has a sine function (sin(phi)) as a transfer function and the other functional network (6) has a cosine function (cos(phi)) as a transfer function, that one multiplier (7) multiplies the sine signal (sin (PHI)) with the cosine function (cos(phi)) of one function network (5) and that the other multiplier (8) multiplies the cosine signal (cos (PHI)) with the sine function (sin(phi)) of the other function network (6) such that a counting direction signal f(PHI,phi) is present at the counting direction input, for which the following applies: f(PHI,phi)=sin(PHI-phi). 6. Circuit arrangement according to one of claims 1 to 4, characterized in that the function network (6) of the loop (14) has a tangent function (tan(phi)) or a cotangent function (cot(phi)) or, depending on the section, a tangent function (tan(phi)) or cotangent function (cot(phi)) as a transfer function. 7. Circuit arrangement according to claim 6, characterized in that the functional network (6) and the D/A converter (4) as well as the multiplier (7) form a tan D/A converter (20) which two connections (21, 22) and between them N series-connected resistors (25) which have different resistance values, with a tap (26) for tapping voltage values being arranged in front of and behind each resistor. 8. Circuit arrangement according to claim 7, characterized in that taps (27) are provided on each resistor or that a voltage divider with an adjustable divider ratio is connected to each tap. 9. Circuit arrangement according to one of claims 6 or 7, characterized in that the functional network comprises an adjustment device (70, 71, 72) with which the voltage values assigned to the counter reading can be changed such that the angular range 6phi, which corresponds to a change in the counter reading by ± 1, is always the same size for any input signals (e-j_ (PHI) ,e ₂ (PHI) ). 10. Circuit arrangement according to one of claims 5 to 9, characterized in that an EXOR gate (3 0) is connected between the output of the comparison device and the counting direction input of the counter.