DE8816454U1 - Device for examining individual signals from a time-division multiplex signal during digital transmission - Google Patents

Description

Company Nikolai Wiens, Stauffenbergstraße 36. 4937 Lage

Device for examining individual signals from a
Time-division multiplex signal in digital transmission

The present innovation relates to a device according to the preamble of claim 1.

Time division multiplexing is one of the most important processes in digital transmission technology.

To make better use of the transmission channels
transmit several low-bandwidth digital signals into a higher-bandwidth channel.

Certain time periods of a common signal (frame) are assigned to the original signals in a cyclical order.

In order to inform the receiver of the timely location, synchronization and/or monitoring information is added to the payload signals.

The investigation of individual signals combined in a time-multiplex frame is of great importance in general measurement technology.

Particularly in the new ISDN, standardized by the responsible standards committee, it is necessary to examine the individual signals from the time-division multiplex frame without disturbing the transmission.

This procedure is also applicable in the ISDN of the Deutsche Bundespost.

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In order to meet these requirements, devices are currently in use that are very expensive to manufacture and that are not or only slightly suitable for different requirements in terms of their usability.

The most serious impact, however, is the high price.

which significantly limits the use of these devices.

The present innovation is therefore based on the task of creating a device of the generic type with which a large number of signals decoded from the time-division multiplex frame can be examined with little equipment expenditure and the overall operating costs are significantly reduced.

This object is achieved according to the invention by the features mentioned in the characterising part of claim 1.

Instead of expensive special equipment, data analyzers or other devices, such as the personal computers mentioned above, which are widely used in digital transmission technology, can now be used to examine transmission on time-division multiplex channels.

A further advantage of the innovation is that if the transmission method is changed, only the measuring adapter needs to be replaced, but the measuring device itself can continue to be used.

In addition, the user can select which of the original signals should be examined. The new measuring adapter extracts the electrical

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see signal from the Ze &igr;tmu11ip1ex frame.

Further advantageous embodiments of the innovation are characterized in the subclaims.

Examples of the device according to the innovation as well as explanations of how it works are described or given below using the attached drawings.

Show it:

Fig. 1 is a schematic representation of the arrangement of ^the device according to the invention.

Fig. 2 shows an embodiment of the measuring adapter according to the innovation.

Fig. 3 shows another embodiment of the measuring adapter.

As can be seen in Figure 1, a measuring adapter 4 is connected to a connection point 8 of a transmission channel ¹¹ or 2, which connects a signal source to a signal sink 3, and to this adapter 4 a measuring device 5 is connected, whereby this is used in the form of a data analyzer, e.g. a data recording device or a personal computer.

To examine individual signals from a time-division multiplex signal in digital transmission, the signal to be examined is selectively decoded from a time-division multiplex frame&eegr; and then further examined via a known interface 28. such as CCITT-V.11, CCITT-V.24 or TTL.

An exemplary embodiment of the measuring adapter or an exemplary functional sequence is shown very clearly in Figure 2.

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The measuring adapter 4 consists of two switching blocks 6./ where the switching block 7 is connected to a forward direction signal and the

Switch block 6 is connected to a reverse direction signal. Both switch blocks 6,7 are connected to an interface driver 11.

The switching block 7 connected to the forward signal 9 consists of the following switching elements: a receiving circuit and clock recovery 13. a serial input/parallel output shift register connected to it 15 and a parallel input/serial output shift register connected to it 14.

In common time-division multiplex systems, the forward direction usually sets the clock. The transmitted data is then synchronized with this clock.

The receiving circuit and clock recovery 13 regenerates the bit clock 20 and the frame repetition clock 21 present in time-division multiplex systems from the received data. These clocks are made available for the purpose of clocking the entire device.

The receiving circuit and clock recovery 13 stores the information from the time-division multiplex frame in the shift register 15. This is able to store an entire time-division multiplex frame. Before the next frame arrives, the stored information is passed on to the shift register 14.

The switching block 6 coupled with the reverse direction signal

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also uses the mentioned bit and frame repetition clocks 20.21.

However, the one receiving circuit 16 connected to the reverse direction signal 10 must have a phase buffer to compensate for the

Carry out a propagation delay on the transmission line. The storage of the frame in a serial input/parallel output shift register 17 and the forwarding to a parallel input/serial output shift register 18 are carried out in the same way as described in the functional description of the switching block 7.

The bit and frame repetition clock 20, 21 are fed to the switching element 12, the multiplexer and the clock processing. This generates the readout clock for the data stored in the two shift registers 18 and 14 according to a selection specified by an operator in a selection part 19.

Only the data that is important for the selection is passed on to the interface driver 11. In addition, the switching element 12 produces the clock T corresponding to the selected channel, which is transmitted to the measuring device 5 via the interface 28. The clock thus obtained and the data read from the shift registers 18 and 14 are fed to the interface driver 11, which carries out the corresponding level adjustments and produces the signal in accordance with the interface definition (V.11, V.24, TTL etc.). The forward direction signal is marked 1 - 2 in Figures 2 and 3 and the reverse direction signal is marked 2 - 1.

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A further embodiment is shown in Figure 3.

This embodiment differs from that shown in Figure 2 in that the entire frame iriha 11 is not stored, but the selected information packet from the frame is decoded and adopted upon reception.

The receiving circuit and clock recovery 13 and the receiving circuit 16 correspond in their functions to the circuits assigned the same reference numerals according to Figure 2.

However, unlike the shift registers shown and described in Figure 2, the serial input/parallel output shift registers 24.26 only store 8 bits of the time period of each frame.

The switching element 26 generates a pulse in the sense of a run preparation as a function of the selection step specified by an operator whenever the information corresponds to the desired channel. The parallel input/serial output shift registers 25.27 then take over the information stored in the shift registers 24 and 26.

The switching element 26 generates a readout clock which causes the information from the shift registers 25 and 27 to be sent to the interface driver 11.

Claims (3)

Vienna - 1 - Protection claims 1. Device for examining individual signals from a time-division multiplex signal in digital transmission, whereby a measuring device is provided to which the signal selectively decoded from the time-division multiplex frame is transmitted via an interface for further examination, characterized in that the measuring device (5) in the form of a data analyzer, e.g. a data recording device or a personal computer, is connected via the interface to a measuring adapter (4). 2. Device according to claim 1, characterized in that the measuring adapter (4) consists of two switching blocks (6,7.22.23), wherein one switching block (7.23) is connected to a forward direction signal (9) via a receiving circuit (13) and the other switching block (6.22) is also connected to a reverse direction signal (10) via a receiving circuit (16) and where both switching blocks (6.7.22.23) are connected to an interface driver (11). 3. Device according to claim 2, characterized in that the receiving circuit (13.16) is connected to a serial input/parallel output shift register (15.17) and this in turn is connected to a "parallel input/serial output" shift register (14.18), the shift register (14,18) being connected to the interface driver (11).