DE7410152U - HYBRID CIRCUIT ARRANGEMENT ON CERAMIC SUBSTRATE - Google Patents

HYBRID CIRCUIT ARRANGEMENT ON CERAMIC SUBSTRATE

Info

Publication number
DE7410152U
DE7410152U DE7410152U DE7410152U DE7410152U DE 7410152 U DE7410152 U DE 7410152U DE 7410152 U DE7410152 U DE 7410152U DE 7410152 U DE7410152 U DE 7410152U DE 7410152 U DE7410152 U DE 7410152U
Authority
DE
Germany
Prior art keywords
circuit arrangement
protective layer
hybrid circuit
ceramic substrate
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE7410152U
Other languages
German (de)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE7410152U priority Critical patent/DE7410152U/en
Publication of DE7410152U publication Critical patent/DE7410152U/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • C—CHEMISTRY; METALLURGY
    • C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B41/00—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone
    • C04B41/009—After-treatment of mortars, concrete, artificial stone or ceramics; Treatment of natural stone characterised by the material treated
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/017—Glass ceramic coating, e.g. formed on inorganic substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0175—Inorganic, non-metallic layer, e.g. resist or dielectric for printed capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor

Description

SISMENS AKTIEKGESSLLSCHAFT Erlangen,SISMENS AKTIEKGESSLSCHAFT Erlangen,

Berlin und !'Tünchen V/emer-von-Siemens-Ctr.Berlin and! 'Tünchen V / emer-von-Siemens-Ctr.

Unser Zeichen: ιOur reference: ι

76/352776/3527

Hybride Schaltungsanordnung auf KerainiksubstratHybrid circuit arrangement on Kerainik substrate

Die Erfindung bezieht sich auf eine hybride Schaltungsanordnung auf Kerainiksubstrat mit einer die Elemente der Schaltung bedeckenden Schutzschicht.The invention relates to a hybrid circuit arrangement on Kerainiksubstrat with one of the elements of Circuit covering protective layer.

Als Dickschicht— oder Dünnschichtsehaltungen slrsa Schal— tungsanordnungen bekanntgeworden, bei denen auf plattenförmigen Keramiksubstraten Leiterbahnen und passive Bauelemente, wie Widerstände, Kondensatoren usw., häufig in mehreren Schichten mittels Druckverfahren aufgebracht sind. Enthalten derartige Schaltungen auch aktive Bauelemente, wie Transistoren, so ist es im allgemeinen notwendig, solche hybride Schaltungsanordnungen mit einer Schutzschicht, die sie von der Umgebung abschließt, zu versehen.As thick-film or thin-film connections slrsa scarf processing arrangements become known in which on plate-shaped Ceramic substrates, conductor tracks and passive components, such as resistors, capacitors, etc., are often used in several layers are applied by means of a printing process. If such circuits also contain active components, like transistors, it is generally necessary to have such hybrid circuits with a To provide a protective layer that seals it off from the environment.

¥ie auch in der übrigen Leiterplattentechnik, können Schutzschichten aus organischen Kunststoffen aufgebracht werden, deren wesentliche Nachteile jedoch darin bestehen, daß die in den aktiven Bauelementen erzeugte Wärme schlecht ableitbar ist und daß besondere Vorkehrungen getroffen werden müssen, um die Schutzschicht bei relativ niedriger Temperatur aufzubringen, sie fest mit der hybriden Schaltungsanordnung zu verbinden und eine Beschädigung der Bauelemente durch chemischen Angriff des Schutzschichtmaterials zu verhindern.¥ ie also in other printed circuit board technology, protective layers made of organic plastics can be applied are, the main disadvantages of which, however, are that the heat generated in the active components is poor can be deduced and that special precautions must be taken to keep the protective layer at a relatively low temperature to apply them firmly to the hybrid circuit arrangement to connect and damage to the components due to chemical attack on the protective layer material to prevent.

Der Erfindung liegt die Aufgabe zugrunde, die Nachteile der bekannten Schutzschichten aus organischem Kunststoffmaterial zu vermeiden.The invention is based on the problem of the disadvantages to avoid the known protective layers made of organic plastic material.

VPA 9/362/4509, Sp/Sei - 2 -VPA 9/362/4509, Sp / Sei - 2 -

- 2 - VPA 9/362A509- 2 - VPA 9 / 362A509

Sine Lösung der Aufgabe wird in einer hybriden Schaltungsanordnung auf Keramiksubstrat mit einer die Elemente der Schaltung bedeckenden Schutzschicht gesehen, die dadurch gekennzeichnet ist, daß die Schutzschicht aus aufgedampftem, anorganischem Material mit in bezug auf das Keramiksubstrat wenigstens annähernd gleichen physikalischen und chemischen Eigenschaften besteht.The solution to the problem is in a hybrid circuit arrangement seen on ceramic substrate with a protective layer covering the elements of the circuit, which thereby is characterized in that the protective layer of vapor-deposited, inorganic material with respect to the ceramic substrate consists of at least approximately the same physical and chemical properties.

Das Aufdampfen kann bei relativ niedrigen Temperaturen vonstatten gehen, so daß eine WärmeSchädigung der aktiven Bauelemente der hybriden Schaltungsanordnung vermieden wird. Wird ein Material mit den gleichen oder wenigstens annähernd gleichen physikalischen und chemischen Eigenschaften wie das Keramiksubstrat gewählt, so läßt sich eine sehr gute mechanische Verbindung zwischen Schutzschicht und Substrat erzielen, die alle Veränderungen dieses Substrats unter Umgebungseinflüssen, z.B.. Tempe- f ϊ raturänderungen, mitmacht. | <The vapor deposition can take place at relatively low temperatures, so that heat damage to the active Components of the hybrid circuit arrangement is avoided. Will a material with the same or at least approximately the same physical and chemical properties as the ceramic substrate selected, so can achieve a very good mechanical connection between protective layer and substrate, all changes of this substrate under environmental influences, e.g. tempe- f ϊ changes in nature, participate. | <

Darüber hinaus ist die Wärmeleitfähigkeit im wesentlichen |; ; größer als die von organischen Kunststoff schichten, so |. ( daß auch die von den aktiven Bauelementen erzeugte ¥ärme § besser abgeleitet werden kann. j|In addition, the thermal conductivity is essentially | ; ; layers larger than that of organic plastic, so |. ( that the poor § generated by the active components can also be better derived. j |

Da üblicherweise das Keramiksubstrat Aluminiumoxyd enthält SSince the ceramic substrate usually contains aluminum oxide, S

oder aus solchem besteht, ist in einer bevorzugten Aus- % ] or consists of such, is in a preferred aus %]

führungsform der Erfindung auch das Schutzschichtmaterial Iembodiment of the invention also the protective layer material I.

aus Aluminiumoxyd oder enthält solches. f· - : of aluminum oxide or contains such. f - :

Zur Erläuterung der Erfindung ist in der Figur ein Ausfüh- f rungsbeispiel schematisch dargestellt. |To explain the invention, the figure shows an embodiment example shown schematically. |

Auf einem aus Aluminiumoxyd bestehenden, plattenförmigen | Keramiksubstrat 1 ist eine Dickschichtschaltung 2 aufgedruckt, die auch diskrete aktive Bauelemente 3 enthält. Um die mit Bauelementen versehene Seite dieser hybridenOn a plate-shaped | Ceramic substrate 1 is a thick film circuit 2 printed on it, which also contains discrete active components 3. To the componentized side of this hybrid

7410152 21.D4.777410152 21.D4.77

VPA 9/362/4509VPA 9/362/4509

Schaltungsanordnung vor Umgebungseinflüssen zu schützen, ist als Schutzschicht 5 eine Aluminiumoxydschicht aufgedampft, die außer den Anschlüssen 4 die ganze Schaltung bedeckt. Die Schutzschicht 5 verbindet sich aufgrund des gleichen verwendeten Materials gut mit dem Substrat 1, wie auch mit den zu dein Substrat passenden Leiter- oder Isoliermaterialien der Schaltung 2.To protect the circuit arrangement from environmental influences, an aluminum oxide layer is vapor-deposited as a protective layer 5, which, apart from the connections 4, covers the entire circuit. The protective layer 5 connects well to the substrate 1 due to the same material used, as well as to the conductor or insulating materials of the circuit 2 that match your substrate.

2 Patentansprüche
1 Figur2 claims
1 figure

7410152 21.04.777410152 04/21/77

Claims (2)

Fat ent ansprii ehe - 4 - VPA 9/362/4509Fat contested before - 4 - VPA 9/362/4509 1. Hybride Schaltungsanordnung auf Kerainiksubstrat mit einer die Elemente der Schaltung bedeckenden Schutzschicht, dadurch gekennzeichnet, daß die Schutzschicht (5) aus aufgedampftem anorganischem Material mit in bezug auf das Keramiksubotrat (1) wenigstens annähernd gleichen physikalischen chemischen Eigenschaften besteht. 1. Hybrid circuit arrangement on Kerainik substrate with a protective layer covering the elements of the circuit, characterized in that the protective layer (5) made of vapor-deposited inorganic material with at least approximately in relation to the ceramic subotrate (1) the same physical chemical properties. 2. Hybride Schaltungsanordnung nach Anspruch 1, dadurch gekennzeichnet;, daß das Schutzschichtmaterial aus Aluminiumoxyd besteht oder dieses enthält. 2. Hybrid circuit arrangement according to claim 1, characterized in that the protective layer material consists of or contains aluminum oxide. 7410152 21.04.77 7410152 04/21/77
DE7410152U 1974-03-22 1974-03-22 HYBRID CIRCUIT ARRANGEMENT ON CERAMIC SUBSTRATE Expired DE7410152U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE7410152U DE7410152U (en) 1974-03-22 1974-03-22 HYBRID CIRCUIT ARRANGEMENT ON CERAMIC SUBSTRATE

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE7410152U DE7410152U (en) 1974-03-22 1974-03-22 HYBRID CIRCUIT ARRANGEMENT ON CERAMIC SUBSTRATE

Publications (1)

Publication Number Publication Date
DE7410152U true DE7410152U (en) 1977-04-21

Family

ID=31957111

Family Applications (1)

Application Number Title Priority Date Filing Date
DE7410152U Expired DE7410152U (en) 1974-03-22 1974-03-22 HYBRID CIRCUIT ARRANGEMENT ON CERAMIC SUBSTRATE

Country Status (1)

Country Link
DE (1) DE7410152U (en)

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