DE69841551D1 - Verzweigungsvorhersage mit rückauswahl-bits zur ka - Google Patents
Verzweigungsvorhersage mit rückauswahl-bits zur kaInfo
- Publication number
- DE69841551D1 DE69841551D1 DE69841551T DE69841551T DE69841551D1 DE 69841551 D1 DE69841551 D1 DE 69841551D1 DE 69841551 T DE69841551 T DE 69841551T DE 69841551 T DE69841551 T DE 69841551T DE 69841551 D1 DE69841551 D1 DE 69841551D1
- Authority
- DE
- Germany
- Prior art keywords
- forecast
- branching
- selection bits
- return selection
- return
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3802—Instruction prefetching
- G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
- G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30054—Unconditional branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
- G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
- G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
- G06F9/3844—Speculative instruction execution using dynamic branch prediction, e.g. using branch history tables
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/994,869 US6108774A (en) | 1997-12-19 | 1997-12-19 | Branch prediction with added selector bits to increase branch prediction capacity and flexibility with minimal added bits |
PCT/US1998/011987 WO1999032966A1 (en) | 1997-12-19 | 1998-06-10 | Branch prediction with return selection bits to categorize type of branch prediction |
Publications (1)
Publication Number | Publication Date |
---|---|
DE69841551D1 true DE69841551D1 (de) | 2010-04-22 |
Family
ID=25541164
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69841551T Expired - Lifetime DE69841551D1 (de) | 1997-12-19 | 1998-06-10 | Verzweigungsvorhersage mit rückauswahl-bits zur ka |
Country Status (6)
Country | Link |
---|---|
US (1) | US6108774A (de) |
EP (1) | EP1049970B1 (de) |
JP (1) | JP3794918B2 (de) |
KR (1) | KR100603067B1 (de) |
DE (1) | DE69841551D1 (de) |
WO (1) | WO1999032966A1 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6219784B1 (en) * | 1997-11-17 | 2001-04-17 | Advanced Micro Devices, Inc. | Processor with N adders for parallel target addresses calculation |
US6304959B1 (en) * | 1999-03-05 | 2001-10-16 | International Business Machines Corporation | Simplified method to generate BTAGs in a decode unit of a processing system |
US6425069B1 (en) | 1999-03-05 | 2002-07-23 | International Business Machines Corporation | Optimization of instruction stream execution that includes a VLIW dispatch group |
US6286094B1 (en) | 1999-03-05 | 2001-09-04 | International Business Machines Corporation | Method and system for optimizing the fetching of dispatch groups in a superscalar processor |
US6442679B1 (en) * | 1999-08-17 | 2002-08-27 | Compaq Computer Technologies Group, L.P. | Apparatus and method for guard outcome prediction |
US6735689B1 (en) * | 2000-05-01 | 2004-05-11 | Raza Microelectronics, Inc. | Method and system for reducing taken branch penalty |
US20040250054A1 (en) * | 2003-06-09 | 2004-12-09 | Stark Jared W. | Line prediction using return prediction information |
US20050223203A1 (en) * | 2004-03-30 | 2005-10-06 | Gabriel Loh | Segmented branch predictor |
JP5145809B2 (ja) * | 2007-07-31 | 2013-02-20 | 日本電気株式会社 | 分岐予測装置、ハイブリッド分岐予測装置、プロセッサ、分岐予測方法、及び分岐予測制御プログラム |
US8181005B2 (en) * | 2008-09-05 | 2012-05-15 | Advanced Micro Devices, Inc. | Hybrid branch prediction device with sparse and dense prediction caches |
US9213551B2 (en) | 2011-03-11 | 2015-12-15 | Oracle International Corporation | Return address prediction in multithreaded processors |
US10338928B2 (en) | 2011-05-20 | 2019-07-02 | Oracle International Corporation | Utilizing a stack head register with a call return stack for each instruction fetch |
US9489204B2 (en) | 2013-03-15 | 2016-11-08 | Qualcomm Incorporated | Method and apparatus for precalculating a direct branch partial target address during a misprediction correction process |
CN117369872A (zh) * | 2022-06-29 | 2024-01-09 | 中科寒武纪科技股份有限公司 | 指令执行方法、系统控制器及相关产品 |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4179737A (en) * | 1977-12-23 | 1979-12-18 | Burroughs Corporation | Means and methods for providing greater speed and flexibility of microinstruction sequencing |
US4679141A (en) * | 1985-04-29 | 1987-07-07 | International Business Machines Corporation | Pageable branch history table |
US4860197A (en) * | 1987-07-31 | 1989-08-22 | Prime Computer, Inc. | Branch cache system with instruction boundary determination independent of parcel boundary |
US5142634A (en) * | 1989-02-03 | 1992-08-25 | Digital Equipment Corporation | Branch prediction |
JPH02287626A (ja) * | 1989-04-28 | 1990-11-27 | Toshiba Corp | パイプライン方式の分岐命令制御装置 |
US5235697A (en) * | 1990-06-29 | 1993-08-10 | Digital Equipment | Set prediction cache memory system using bits of the main memory address |
WO1993017385A1 (en) * | 1992-02-27 | 1993-09-02 | Intel Corporation | Dynamic flow instruction cache memory |
US5418922A (en) * | 1992-04-30 | 1995-05-23 | International Business Machines Corporation | History table for set prediction for accessing a set associative cache |
EP0586057B1 (de) * | 1992-08-31 | 2000-03-01 | Sun Microsystems, Inc. | Schnelles Vorausholen und Zuteilung von Befehlen mittels vorausschauender Anmerkungen von früher vorausgeholten |
US5367703A (en) * | 1993-01-08 | 1994-11-22 | International Business Machines Corporation | Method and system for enhanced branch history prediction accuracy in a superscalar processor system |
JP2744882B2 (ja) * | 1993-01-15 | 1998-04-28 | インターナショナル・ビジネス・マシーンズ・コーポレイション | キューにより命令の実行を制御する装置及び方法 |
US5454117A (en) * | 1993-08-25 | 1995-09-26 | Nexgen, Inc. | Configurable branch prediction for a processor performing speculative execution |
US5623614A (en) * | 1993-09-17 | 1997-04-22 | Advanced Micro Devices, Inc. | Branch prediction cache with multiple entries for returns having multiple callers |
JP3639927B2 (ja) * | 1993-10-04 | 2005-04-20 | 株式会社ルネサステクノロジ | データ処理装置 |
EP0649084A1 (de) * | 1993-10-18 | 1995-04-19 | Cyrix Corporation | Verzweigungsverarbeitung in Mikroprozessor |
US5574871A (en) * | 1994-01-04 | 1996-11-12 | Intel Corporation | Method and apparatus for implementing a set-associative branch target buffer |
US5592634A (en) * | 1994-05-16 | 1997-01-07 | Motorola Inc. | Zero-cycle multi-state branch cache prediction data processing system and method thereof |
US5758142A (en) * | 1994-05-31 | 1998-05-26 | Digital Equipment Corporation | Trainable apparatus for predicting instruction outcomes in pipelined processors |
US5559975A (en) * | 1994-06-01 | 1996-09-24 | Advanced Micro Devices, Inc. | Program counter update mechanism |
US5649137A (en) * | 1994-10-20 | 1997-07-15 | Advanced Micro Devices, Inc. | Method and apparatus for store-into-instruction-stream detection and maintaining branch prediction cache consistency |
JP3494736B2 (ja) * | 1995-02-27 | 2004-02-09 | 株式会社ルネサステクノロジ | 分岐先バッファを用いた分岐予測システム |
US5764946A (en) * | 1995-04-12 | 1998-06-09 | Advanced Micro Devices | Superscalar microprocessor employing a way prediction unit to predict the way of an instruction fetch address and to concurrently provide a branch prediction address corresponding to the fetch address |
US5649178A (en) * | 1995-06-07 | 1997-07-15 | International Business Machines, Corporation | Apparatus and method for storing and initializing branch prediction with selective information transfer |
US5822575A (en) * | 1996-09-12 | 1998-10-13 | Advanced Micro Devices, Inc. | Branch prediction storage for storing branch prediction information such that a corresponding tag may be routed with the branch instruction |
US5794028A (en) * | 1996-10-17 | 1998-08-11 | Advanced Micro Devices, Inc. | Shared branch prediction structure |
US5954816A (en) * | 1996-11-19 | 1999-09-21 | Advanced Micro Devices, Inc. | Branch selector prediction |
-
1997
- 1997-12-19 US US08/994,869 patent/US6108774A/en not_active Expired - Lifetime
-
1998
- 1998-06-10 DE DE69841551T patent/DE69841551D1/de not_active Expired - Lifetime
- 1998-06-10 EP EP98930107A patent/EP1049970B1/de not_active Expired - Lifetime
- 1998-06-10 KR KR1020007006742A patent/KR100603067B1/ko not_active IP Right Cessation
- 1998-06-10 WO PCT/US1998/011987 patent/WO1999032966A1/en active Search and Examination
- 1998-06-10 JP JP2000525808A patent/JP3794918B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR100603067B1 (ko) | 2006-07-24 |
JP3794918B2 (ja) | 2006-07-12 |
EP1049970B1 (de) | 2010-03-10 |
JP2001527233A (ja) | 2001-12-25 |
KR20010033300A (ko) | 2001-04-25 |
EP1049970A1 (de) | 2000-11-08 |
US6108774A (en) | 2000-08-22 |
WO1999032966A1 (en) | 1999-07-01 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |