DE69832847D1 - Taktgebereinstellschaltung - Google Patents

Taktgebereinstellschaltung

Info

Publication number
DE69832847D1
DE69832847D1 DE69832847T DE69832847T DE69832847D1 DE 69832847 D1 DE69832847 D1 DE 69832847D1 DE 69832847 T DE69832847 T DE 69832847T DE 69832847 T DE69832847 T DE 69832847T DE 69832847 D1 DE69832847 D1 DE 69832847D1
Authority
DE
Germany
Prior art keywords
adjusting circuit
clock adjusting
clock
circuit
adjusting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69832847T
Other languages
English (en)
Other versions
DE69832847T2 (de
Inventor
Naoki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Application granted granted Critical
Publication of DE69832847D1 publication Critical patent/DE69832847D1/de
Publication of DE69832847T2 publication Critical patent/DE69832847T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
DE69832847T 1997-06-30 1998-06-23 Taktgebereinstellschaltung Expired - Fee Related DE69832847T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9174141A JP3006550B2 (ja) 1997-06-30 1997-06-30 クロック調整回路
JP17414197 1997-06-30

Publications (2)

Publication Number Publication Date
DE69832847D1 true DE69832847D1 (de) 2006-01-26
DE69832847T2 DE69832847T2 (de) 2006-08-31

Family

ID=15973393

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69832847T Expired - Fee Related DE69832847T2 (de) 1997-06-30 1998-06-23 Taktgebereinstellschaltung

Country Status (4)

Country Link
US (1) US6028461A (de)
EP (1) EP0889594B1 (de)
JP (1) JP3006550B2 (de)
DE (1) DE69832847T2 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6275086B1 (en) 1998-11-19 2001-08-14 Fujitsu Limited Clock signal generator for an integrated circuit
US6987824B1 (en) * 2000-09-21 2006-01-17 International Business Machines Corporation Method and system for clock/data recovery for self-clocked high speed interconnects
KR100567532B1 (ko) 2003-12-10 2006-04-03 주식회사 하이닉스반도체 펄스 폭 제어 회로 및 그 방법
US7471130B2 (en) * 2005-05-19 2008-12-30 Micron Technology, Inc. Graduated delay line for increased clock skew correction circuit operating range
US7250800B2 (en) 2005-07-12 2007-07-31 Hewlett-Packard Development Company, L.P. Clock pulse width control circuit
US8072253B2 (en) 2006-09-13 2011-12-06 Nec Corporation Clock adjusting circuit and semiconductor integrated circuit device

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60224344A (ja) * 1984-04-23 1985-11-08 Nec Corp 位相補正回路
JP2776925B2 (ja) * 1988-12-07 1998-07-16 株式会社日立製作所 クロック信号供給装置及び電子計算機
JPH02213412A (ja) * 1989-02-14 1990-08-24 Kobe Steel Ltd 浸炭用鋼の製造方法
US5142555A (en) * 1990-11-13 1992-08-25 Dallas Semiconductor Corporation Phase detector
JP2687788B2 (ja) * 1991-10-07 1997-12-08 日本電気株式会社 クロックスキュー自動調整回路
JPH0661807A (ja) * 1992-08-10 1994-03-04 Fujitsu Ltd ディジタルデューティファクタ調整回路
US5811998A (en) * 1993-01-28 1998-09-22 Digital Equipment Corporation State machine phase lock loop
JPH07121932A (ja) * 1993-10-22 1995-05-12 Sharp Corp 光磁気ディスクドライブ装置のライトパルス幅補正回路
JPH07152454A (ja) * 1993-11-30 1995-06-16 Toshiba Corp 情報処理装置
JPH07248847A (ja) * 1994-03-11 1995-09-26 Fujitsu Ltd クロック信号調整方法および装置
US5646564A (en) * 1994-09-02 1997-07-08 Xilinx, Inc. Phase-locked delay loop for clock correction
JP3561792B2 (ja) * 1995-09-06 2004-09-02 株式会社ルネサステクノロジ クロック発生回路
US5675273A (en) * 1995-09-08 1997-10-07 International Business Machines Corporation Clock regulator with precision midcycle edge timing
US5757218A (en) * 1996-03-12 1998-05-26 International Business Machines Corporation Clock signal duty cycle correction circuit and method

Also Published As

Publication number Publication date
EP0889594B1 (de) 2005-12-21
DE69832847T2 (de) 2006-08-31
EP0889594A1 (de) 1999-01-07
US6028461A (en) 2000-02-22
JP3006550B2 (ja) 2000-02-07
JPH1124783A (ja) 1999-01-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee