DE69807021T2 - Verfahren und Geraet zur Implementierung von mehrfachen Ruecksprungstellen - Google Patents

Verfahren und Geraet zur Implementierung von mehrfachen Ruecksprungstellen

Info

Publication number
DE69807021T2
DE69807021T2 DE69807021T DE69807021T DE69807021T2 DE 69807021 T2 DE69807021 T2 DE 69807021T2 DE 69807021 T DE69807021 T DE 69807021T DE 69807021 T DE69807021 T DE 69807021T DE 69807021 T2 DE69807021 T2 DE 69807021T2
Authority
DE
Germany
Prior art keywords
implementing multiple
multiple return
return points
points
implementing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69807021T
Other languages
English (en)
Other versions
DE69807021D1 (de
Inventor
Robert Greisemer
Urs Holzle
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69807021D1 publication Critical patent/DE69807021D1/de
Application granted granted Critical
Publication of DE69807021T2 publication Critical patent/DE69807021T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/448—Execution paradigms, e.g. implementations of programming paradigms
    • G06F9/4482—Procedural
    • G06F9/4484—Executing subprograms
    • G06F9/4486—Formation of subprogram jump address
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69807021T 1997-10-06 1998-09-24 Verfahren und Geraet zur Implementierung von mehrfachen Ruecksprungstellen Expired - Fee Related DE69807021T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/944,326 US6553426B2 (en) 1997-10-06 1997-10-06 Method apparatus for implementing multiple return sites

Publications (2)

Publication Number Publication Date
DE69807021D1 DE69807021D1 (de) 2002-09-12
DE69807021T2 true DE69807021T2 (de) 2002-12-12

Family

ID=25481199

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69807021T Expired - Fee Related DE69807021T2 (de) 1997-10-06 1998-09-24 Verfahren und Geraet zur Implementierung von mehrfachen Ruecksprungstellen

Country Status (6)

Country Link
US (1) US6553426B2 (de)
EP (1) EP0908813B1 (de)
JP (1) JP4005724B2 (de)
KR (1) KR100519827B1 (de)
CN (1) CN1122212C (de)
DE (1) DE69807021T2 (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6317796B1 (en) * 1997-10-06 2001-11-13 Sun Microsystems, Inc. Inline database for receiver types in object-oriented systems
US6754828B1 (en) * 1999-07-13 2004-06-22 Intel Corporation Algorithm for non-volatile memory updates
US7032100B1 (en) 1999-12-17 2006-04-18 Koninklijke Philips Electronics N.V. Simple algorithmic cryptography engine
GB2358261B (en) * 2000-01-17 2004-06-09 Advanced Risc Mach Ltd Data processing with native and interpreted program instruction words
US7196710B1 (en) 2000-08-23 2007-03-27 Nintendo Co., Ltd. Method and apparatus for buffering graphics data in a graphics system
US7207032B1 (en) * 2003-03-28 2007-04-17 Applied Micro Circuits Corporation Expanding a software program by insertion of statements
US7185329B1 (en) * 2003-03-28 2007-02-27 Applied Micro Circuits Corporation Use of different color sequences for variables of different sizes and different semantics
US20040250054A1 (en) * 2003-06-09 2004-12-09 Stark Jared W. Line prediction using return prediction information
KR100658918B1 (ko) * 2004-03-29 2006-12-15 주식회사 팬택앤큐리텔 블록 단위 입출력 명령어를 이용한 시스템 전역 변수초기화 장치 및 그 방법
US8266232B2 (en) * 2005-10-15 2012-09-11 International Business Machines Corporation Hardware processing of commands within virtual client computing environment
US8392895B2 (en) * 2009-01-13 2013-03-05 Mediatek Inc. Firmware extension method and firmware builder
US20140283060A1 (en) * 2013-03-15 2014-09-18 Oracle International Corporation Mitigating vulnerabilities associated with return-oriented programming
US9569185B2 (en) 2014-02-07 2017-02-14 Oracle International Corporation Changing de-optimization guard representation during the compilation process
GB2551548B (en) * 2016-06-22 2019-05-08 Advanced Risc Mach Ltd Register restoring branch instruction
US10152338B2 (en) * 2016-12-14 2018-12-11 International Business Machines Corporation Marking external sibling caller routines

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5856153A (ja) 1981-09-30 1983-04-02 Fujitsu Ltd サブル−チンリタ−ン方式
DE4211966A1 (de) * 1992-04-09 1993-10-14 Philips Patentverwaltung Anordnung zum Abspeichern und Auslesen von Rücksprungdaten
JP3499252B2 (ja) * 1993-03-19 2004-02-23 株式会社ルネサステクノロジ コンパイル装置及びデータ処理装置
US5606682A (en) * 1995-04-07 1997-02-25 Motorola Inc. Data processor with branch target address cache and subroutine return address cache and method of operation
JP2857600B2 (ja) * 1995-05-11 1999-02-17 松下電器産業株式会社 プロセッサ及びプログラム翻訳装置

Also Published As

Publication number Publication date
US6553426B2 (en) 2003-04-22
US20020062400A1 (en) 2002-05-23
EP0908813A3 (de) 1999-04-28
CN1122212C (zh) 2003-09-24
KR19990036884A (ko) 1999-05-25
KR100519827B1 (ko) 2005-12-16
JPH11224195A (ja) 1999-08-17
DE69807021D1 (de) 2002-09-12
JP4005724B2 (ja) 2007-11-14
EP0908813B1 (de) 2002-08-07
EP0908813A2 (de) 1999-04-14
CN1234549A (zh) 1999-11-10

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee