DE69800248T2 - Vorrichtung und Verfahren mit erweitert-ternär kodiertem Dezimalcode - Google Patents

Vorrichtung und Verfahren mit erweitert-ternär kodiertem Dezimalcode

Info

Publication number
DE69800248T2
DE69800248T2 DE69800248T DE69800248T DE69800248T2 DE 69800248 T2 DE69800248 T2 DE 69800248T2 DE 69800248 T DE69800248 T DE 69800248T DE 69800248 T DE69800248 T DE 69800248T DE 69800248 T2 DE69800248 T2 DE 69800248T2
Authority
DE
Germany
Prior art keywords
coded decimal
decimal code
ternary coded
extended
extended ternary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69800248T
Other languages
English (en)
Other versions
DE69800248D1 (de
Inventor
Paul Jeffrey Garnett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of DE69800248D1 publication Critical patent/DE69800248D1/de
Application granted granted Critical
Publication of DE69800248T2 publication Critical patent/DE69800248T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/16—Conversion to or from representation by pulses the pulses having three levels
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H04L25/4923—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes using ternary codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Analogue/Digital Conversion (AREA)
  • Logic Circuits (AREA)
  • Dc Digital Transmission (AREA)
DE69800248T 1997-05-22 1998-05-19 Vorrichtung und Verfahren mit erweitert-ternär kodiertem Dezimalcode Expired - Fee Related DE69800248T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/862,132 US5912563A (en) 1997-05-22 1997-05-22 Trinary signal apparatus and method

Publications (2)

Publication Number Publication Date
DE69800248D1 DE69800248D1 (de) 2000-09-14
DE69800248T2 true DE69800248T2 (de) 2001-05-23

Family

ID=25337751

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69800248T Expired - Fee Related DE69800248T2 (de) 1997-05-22 1998-05-19 Vorrichtung und Verfahren mit erweitert-ternär kodiertem Dezimalcode

Country Status (4)

Country Link
US (1) US5912563A (de)
EP (1) EP0880233B1 (de)
JP (1) JPH11112331A (de)
DE (1) DE69800248T2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6717429B2 (en) * 2000-06-30 2004-04-06 Texas Instruments Incorporated IC having comparator inputs connected to core circuitry and output pad
DE10162913C1 (de) * 2001-12-20 2003-10-09 Infineon Technologies Ag Integrierte Schaltung mit einem Anschlusspad zur Festlegung einer von mehreren Organisationsformen und Verfahren zu ihrem Betrieb (z.B. integrierte Speicherschaltung)
KR100506936B1 (ko) * 2003-04-15 2005-08-05 삼성전자주식회사 집적 회로의 입출력 인터페이스 회로 및 방법
US7795915B2 (en) * 2008-08-04 2010-09-14 Chil Semiconductor Corporation Multi-level signaling

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5284938A (en) * 1976-01-07 1977-07-14 Hitachi Ltd Logic circuit
JPS57119524A (en) * 1981-01-19 1982-07-26 Oki Electric Ind Co Ltd Tristate input circuit
US4631428A (en) * 1984-10-26 1986-12-23 International Business Machines Corporation Communication interface connecting binary logic unit through a trinary logic transmission channel
JPS61247123A (ja) * 1985-04-25 1986-11-04 Nec Corp ３値出力回路
US5714892A (en) * 1996-04-04 1998-02-03 Analog Devices, Inc. Three state logic input

Also Published As

Publication number Publication date
DE69800248D1 (de) 2000-09-14
EP0880233A1 (de) 1998-11-25
EP0880233B1 (de) 2000-08-09
JPH11112331A (ja) 1999-04-23
US5912563A (en) 1999-06-15

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Legal Events

Date Code Title Description
8332 No legal effect for de
8370 Indication related to discontinuation of the patent is to be deleted
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee