DE69721364D1 - Verfahren und Gerät zur Bitmuster-Erkennung - Google Patents

Verfahren und Gerät zur Bitmuster-Erkennung

Info

Publication number
DE69721364D1
DE69721364D1 DE69721364T DE69721364T DE69721364D1 DE 69721364 D1 DE69721364 D1 DE 69721364D1 DE 69721364 T DE69721364 T DE 69721364T DE 69721364 T DE69721364 T DE 69721364T DE 69721364 D1 DE69721364 D1 DE 69721364D1
Authority
DE
Germany
Prior art keywords
pattern recognition
bit pattern
bit
recognition
pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69721364T
Other languages
English (en)
Other versions
DE69721364T2 (de
Inventor
Olle Hedman
Haekan Grenabo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Telefonaktiebolaget LM Ericsson AB
Original Assignee
Telefonaktiebolaget LM Ericsson AB
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Telefonaktiebolaget LM Ericsson AB filed Critical Telefonaktiebolaget LM Ericsson AB
Application granted granted Critical
Publication of DE69721364D1 publication Critical patent/DE69721364D1/de
Publication of DE69721364T2 publication Critical patent/DE69721364T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
    • H04L7/042—Detectors therefor, e.g. correlators, state machines
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/02—Comparing digital values
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
    • G06V10/00—Arrangements for image or video recognition or understanding
    • G06V10/70—Arrangements for image or video recognition or understanding using pattern recognition or machine learning
    • G06V10/74—Image or video pattern matching; Proximity measures in feature spaces
    • G06V10/75—Organisation of the matching processes, e.g. simultaneous or sequential comparisons of image or video features; Coarse-fine approaches, e.g. multi-scale approaches; using context analysis; Selection of dictionaries
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/02—Indexing scheme relating to groups G06F7/02 - G06F7/026
    • G06F2207/025—String search, i.e. pattern matching, e.g. find identical word or best match in a string

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Health & Medical Sciences (AREA)
  • Medical Informatics (AREA)
  • Software Systems (AREA)
  • Databases & Information Systems (AREA)
  • Computing Systems (AREA)
  • Artificial Intelligence (AREA)
  • Multimedia (AREA)
  • Quality & Reliability (AREA)
  • General Health & Medical Sciences (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
DE69721364T 1996-03-04 1997-02-27 Verfahren und Gerät zur Bitmuster-Erkennung Expired - Fee Related DE69721364T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9600831A SE506241C2 (sv) 1996-03-04 1996-03-04 Förfarande och anordning för bitmönsterdetektering
SE9600831 1996-03-04

Publications (2)

Publication Number Publication Date
DE69721364D1 true DE69721364D1 (de) 2003-06-05
DE69721364T2 DE69721364T2 (de) 2004-04-01

Family

ID=20401653

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69721364T Expired - Fee Related DE69721364T2 (de) 1996-03-04 1997-02-27 Verfahren und Gerät zur Bitmuster-Erkennung

Country Status (5)

Country Link
US (1) US5943377A (de)
EP (1) EP0794485B1 (de)
JP (1) JPH1028113A (de)
DE (1) DE69721364T2 (de)
SE (1) SE506241C2 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6636994B1 (en) 2000-05-26 2003-10-21 Synthesys Apparatus and method for examining bit values during bit error location measurements
CA2363930C (en) * 2000-11-29 2004-08-24 Research In Motion Limited System and method for synchronization signal detection and recovery from false triggers
JP5913910B2 (ja) * 2011-04-26 2016-04-27 国際計測器株式会社 直動アクチュエータ及び加振装置
EP2547032B1 (de) 2011-07-12 2018-05-23 ADVA Optical Networking SE Verfahren zur Datenpaketverarbeitung bei sehr hohen Datenraten und extrem schlechten Übertragungsbedingungen

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4100532A (en) * 1976-11-19 1978-07-11 Hewlett-Packard Company Digital pattern triggering circuit
GB2089178B (en) * 1980-11-18 1984-07-04 Sony Corp Digital signal processing
US4404542A (en) * 1980-12-05 1983-09-13 Rca Corporation Digital sequence detector
JPS58168347A (ja) * 1982-03-29 1983-10-04 Mitsubishi Electric Corp 同期符号検出回路
EP0124238A3 (de) * 1983-05-02 1987-05-06 Tektronix, Inc. Speicherbasierter Digitalwortsequenzerkenner
JPS6068787A (ja) * 1983-09-26 1985-04-19 Hitachi Ltd フレ−ミングコ−ド検出回路
FR2559629B1 (fr) * 1984-02-15 1986-06-13 Telediffusion Fse Systeme de radiodiffusion de donnees, notamment vers des postes mobiles
EP0166838B1 (de) * 1984-06-29 1988-09-28 International Business Machines Corporation Verfahren und Anordnung zur Detektion einer besonderen Bitkonfiguration in einem seriellen Bitstrom
US4847877A (en) * 1986-11-28 1989-07-11 International Business Machines Corporation Method and apparatus for detecting a predetermined bit pattern within a serial bit stream
US4727558A (en) * 1987-02-12 1988-02-23 Dallas Semiconductor Corporation Method and apparatus for extracting a predetermined bit pattern from a serial bit stream
JPS63316166A (ja) * 1987-06-18 1988-12-23 Mitsubishi Electric Corp 半導体装置
US5295198A (en) * 1988-10-14 1994-03-15 Harris Corporation Pattern identification by analysis of digital words
EP0750252A3 (de) * 1990-10-30 1997-02-19 Siemens Ag Einrichtung zum Vergleich zweier dual kodierter Daten mit mindenstens 2-bit-breiten Speichern
US5459754A (en) * 1991-07-16 1995-10-17 The United States Of America As Represented By The Secretary Of The Navy Serial bit pattern recognizer system
US5491700A (en) * 1993-10-01 1996-02-13 Pacific Communication Sciences, Inc. Method and apparatus for code error correction using an ordered syndrome and error correction lookup table
US5588030A (en) * 1993-10-13 1996-12-24 Maxtor Corporation Apparatus and method for the synchronization of data in a bit stream
FR2718590B1 (fr) * 1994-04-12 1996-06-28 Sgs Thomson Microelectronics Procédé de détection d'un motif dans une transmission série.
GB2293949B (en) * 1994-10-08 1999-05-26 Plessey Telecomm Fast serial pattern recognition
US5727036A (en) * 1995-11-22 1998-03-10 Mitsubishi Semiconductor America, Inc. High bit rate start code searching and detecting circuit and method

Also Published As

Publication number Publication date
JPH1028113A (ja) 1998-01-27
DE69721364T2 (de) 2004-04-01
EP0794485A1 (de) 1997-09-10
EP0794485B1 (de) 2003-05-02
US5943377A (en) 1999-08-24
SE9600831L (sv) 1997-09-05
SE506241C2 (sv) 1997-11-24
SE9600831D0 (sv) 1996-03-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee