DE69607492D1 - Rücksprungstapelspeicherstruktur und superskalenmikroprozessor mit derselben - Google Patents

Rücksprungstapelspeicherstruktur und superskalenmikroprozessor mit derselben

Info

Publication number
DE69607492D1
DE69607492D1 DE69607492T DE69607492T DE69607492D1 DE 69607492 D1 DE69607492 D1 DE 69607492D1 DE 69607492 T DE69607492 T DE 69607492T DE 69607492 T DE69607492 T DE 69607492T DE 69607492 D1 DE69607492 D1 DE 69607492D1
Authority
DE
Germany
Prior art keywords
same
storage structure
return stack
stack storage
superscale
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69607492T
Other languages
English (en)
Other versions
DE69607492T2 (de
Inventor
K Pickett
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE69607492D1 publication Critical patent/DE69607492D1/de
Publication of DE69607492T2 publication Critical patent/DE69607492T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30054—Unconditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
DE69607492T 1996-07-16 1996-07-16 Rücksprungstapelspeicherstruktur und superskalenmikroprozessor mit derselben Expired - Lifetime DE69607492T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1996/011842 WO1998002802A1 (en) 1996-07-16 1996-07-16 A return stack structure and a superscalar microprocessor employing same

Publications (2)

Publication Number Publication Date
DE69607492D1 true DE69607492D1 (de) 2000-05-04
DE69607492T2 DE69607492T2 (de) 2001-01-18

Family

ID=22255472

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69607492T Expired - Lifetime DE69607492T2 (de) 1996-07-16 1996-07-16 Rücksprungstapelspeicherstruktur und superskalenmikroprozessor mit derselben

Country Status (3)

Country Link
EP (1) EP0912925B1 (de)
DE (1) DE69607492T2 (de)
WO (1) WO1998002802A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105700851B (zh) * 2016-01-08 2018-06-01 大唐微电子技术有限公司 一种实现压栈和弹栈的方法和装置
CN118210557B (zh) * 2024-05-20 2024-08-16 芯来智融半导体科技(上海)有限公司 用于过滤无效预取的预取方法、装置、设备和存储介质

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5274817A (en) * 1991-12-23 1993-12-28 Caterpillar Inc. Method for executing subroutine calls
SG47981A1 (en) * 1994-03-01 1998-04-17 Intel Corp Pipeline process of instructions in a computer system

Also Published As

Publication number Publication date
EP0912925A1 (de) 1999-05-06
EP0912925B1 (de) 2000-03-29
WO1998002802A1 (en) 1998-01-22
DE69607492T2 (de) 2001-01-18

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