DE69509717T2 - Modulare Chipauswahl-Steuerschaltung - Google Patents

Modulare Chipauswahl-Steuerschaltung

Info

Publication number
DE69509717T2
DE69509717T2 DE1995609717 DE69509717T DE69509717T2 DE 69509717 T2 DE69509717 T2 DE 69509717T2 DE 1995609717 DE1995609717 DE 1995609717 DE 69509717 T DE69509717 T DE 69509717T DE 69509717 T2 DE69509717 T2 DE 69509717T2
Authority
DE
Germany
Prior art keywords
control circuit
selection control
chip selection
modular chip
modular
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE1995609717
Other languages
English (en)
Other versions
DE69509717D1 (de
Inventor
Chinh Hoang Le Chinh Hoang Le
James B Eifert
Basil J Jackson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Motorola Solutions Inc
Original Assignee
Motorola Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/298,638 external-priority patent/US5511182A/en
Priority claimed from US08/298,868 external-priority patent/US5617559A/en
Application filed by Motorola Inc filed Critical Motorola Inc
Publication of DE69509717D1 publication Critical patent/DE69509717D1/de
Application granted granted Critical
Publication of DE69509717T2 publication Critical patent/DE69509717T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1416Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/1425Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block
    • G06F12/1441Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being physical, e.g. cell, word, block for a range
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G06F13/4243Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Microcomputers (AREA)
  • Dram (AREA)
DE1995609717 1994-08-31 1995-08-25 Modulare Chipauswahl-Steuerschaltung Expired - Fee Related DE69509717T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/298,638 US5511182A (en) 1994-08-31 1994-08-31 Programmable pin configuration logic circuit for providing a chip select signal and related method
US08/298,868 US5617559A (en) 1994-08-31 1994-08-31 Modular chip select control circuit and method for performing pipelined memory accesses
US08/445,817 US5649159A (en) 1994-08-31 1995-05-22 Data processor with a multi-level protection mechanism, multi-level protection circuit, and method therefor

Publications (2)

Publication Number Publication Date
DE69509717D1 DE69509717D1 (de) 1999-06-24
DE69509717T2 true DE69509717T2 (de) 1999-11-11

Family

ID=27404581

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1995609717 Expired - Fee Related DE69509717T2 (de) 1994-08-31 1995-08-25 Modulare Chipauswahl-Steuerschaltung

Country Status (3)

Country Link
EP (1) EP0700002B1 (de)
JP (2) JP3976808B2 (de)
DE (1) DE69509717T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5752267A (en) * 1995-09-27 1998-05-12 Motorola Inc. Data processing system for accessing an external device during a burst mode of operation and method therefor
US5860129A (en) * 1995-09-27 1999-01-12 Motorola, Inc. Data processing system for writing an external device and method therefor
DE19625627C2 (de) * 1996-06-26 1998-09-03 Siemens Ag Mikroprozessorvorrichtung
GB2325061B (en) * 1997-04-30 2001-06-06 Advanced Risc Mach Ltd Memory access protection
US8156343B2 (en) 2003-11-26 2012-04-10 Intel Corporation Accessing private data about the state of a data processing machine from storage that is publicly accessible
TW200805065A (en) * 2006-01-17 2008-01-16 Nxp Bv Region protection unit, instruction set and method for protecting a memory region
EP3511837B1 (de) * 2016-09-29 2023-01-18 Huawei Technologies Co., Ltd. Chip mit erweiterbarem speicher

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4851990A (en) * 1987-02-09 1989-07-25 Advanced Micro Devices, Inc. High performance processor interface between a single chip processor and off chip memory means having a dedicated and shared bus structure
US5151986A (en) 1987-08-27 1992-09-29 Motorola, Inc. Microcomputer with on-board chip selects and programmable bus stretching
JPH0210451A (ja) * 1988-06-28 1990-01-16 Nec Corp 半導体記憶装置
EP0440456B1 (de) * 1990-01-31 1997-01-08 Hewlett-Packard Company Stossbetrieb für Mikroprozessor mit externem Systemspeicher
US5335334A (en) * 1990-08-31 1994-08-02 Hitachi, Ltd. Data processing apparatus having a real memory region with a corresponding fixed memory protection key value and method for allocating memories therefor
US5559992A (en) * 1993-01-11 1996-09-24 Ascom Autelca Ag Apparatus and method for protecting data in a memory address range

Also Published As

Publication number Publication date
DE69509717D1 (de) 1999-06-24
EP0700002B1 (de) 1999-05-19
JPH08106446A (ja) 1996-04-23
EP0700002A1 (de) 1996-03-06
JP2007018522A (ja) 2007-01-25
JP4225513B2 (ja) 2009-02-18
JP3976808B2 (ja) 2007-09-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee