DE69333297D1 - Herstellung von stapeln von chips mittels segmentierung grösserer stapel - Google Patents

Herstellung von stapeln von chips mittels segmentierung grösserer stapel

Info

Publication number
DE69333297D1
DE69333297D1 DE69333297T DE69333297T DE69333297D1 DE 69333297 D1 DE69333297 D1 DE 69333297D1 DE 69333297 T DE69333297 T DE 69333297T DE 69333297 T DE69333297 T DE 69333297T DE 69333297 D1 DE69333297 D1 DE 69333297D1
Authority
DE
Germany
Prior art keywords
stacks
chips
production
segmenting
segmenting larger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69333297T
Other languages
English (en)
Inventor
A Minihan
A Pepe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Irvine Sensors Corp
Original Assignee
Irvine Sensors Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Irvine Sensors Corp filed Critical Irvine Sensors Corp
Application granted granted Critical
Publication of DE69333297D1 publication Critical patent/DE69333297D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67121Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
DE69333297T 1992-12-24 1993-12-16 Herstellung von stapeln von chips mittels segmentierung grösserer stapel Expired - Lifetime DE69333297D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US07/996,794 US5279991A (en) 1992-05-15 1992-12-24 Method for fabricating stacks of IC chips by segmenting a larger stack
PCT/US1993/012268 WO1994015358A1 (en) 1992-12-24 1993-12-16 Fabricating stacks of ic chips by segmenting a larger stack

Publications (1)

Publication Number Publication Date
DE69333297D1 true DE69333297D1 (de) 2003-12-18

Family

ID=25543322

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69333297T Expired - Lifetime DE69333297D1 (de) 1992-12-24 1993-12-16 Herstellung von stapeln von chips mittels segmentierung grösserer stapel

Country Status (5)

Country Link
US (1) US5279991A (de)
EP (1) EP0676087B1 (de)
JP (1) JPH08505267A (de)
DE (1) DE69333297D1 (de)
WO (1) WO1994015358A1 (de)

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US6205654B1 (en) * 1992-12-11 2001-03-27 Staktek Group L.P. Method of manufacturing a surface mount package
US5426072A (en) * 1993-01-21 1995-06-20 Hughes Aircraft Company Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate
US5644161A (en) * 1993-03-29 1997-07-01 Staktek Corporation Ultra-high density warp-resistant memory module
US5502667A (en) * 1993-09-13 1996-03-26 International Business Machines Corporation Integrated multichip memory module structure
WO1995025341A1 (en) * 1994-03-15 1995-09-21 Irvine Sensors Corporation 3d stack of ic chips having leads reached by vias through passivation covering access plane
EP0760530B1 (de) * 1994-05-16 1999-08-04 Citizen Watch Co. Ltd. Herstellung einer thermoelektrischen leistungserzeugungseinheit
MY114888A (en) * 1994-08-22 2003-02-28 Ibm Method for forming a monolithic electronic module by stacking planar arrays of integrated circuit chips
US5567653A (en) * 1994-09-14 1996-10-22 International Business Machines Corporation Process for aligning etch masks on an integrated circuit surface using electromagnetic energy
US5609772A (en) * 1995-06-05 1997-03-11 International Business Machines Corporation Cube maskless lead open process using chemical mechanical polish/lead-tip expose process
US5712747A (en) * 1996-01-24 1998-01-27 International Business Machines Corporation Thin film slider with on-board multi-layer integrated circuit
US5696031A (en) * 1996-11-20 1997-12-09 Micron Technology, Inc. Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
US7166495B2 (en) * 1996-02-20 2007-01-23 Micron Technology, Inc. Method of fabricating a multi-die semiconductor package assembly
US5903045A (en) * 1996-04-30 1999-05-11 International Business Machines Corporation Self-aligned connector for stacked chip module
US5778522A (en) * 1996-05-20 1998-07-14 Staktek Corporation Method of manufacturing a high density integrated circuit module with complex electrical interconnect rails having electrical interconnect strain relief
US5772835A (en) * 1996-05-29 1998-06-30 Ibm Corporation Vacuum oven chamber for making laminated integrated circuit devices
US5735196A (en) * 1996-05-29 1998-04-07 Ibm Corporation Apparatus for applying a force to laminated integrated circuit devices
US5772815A (en) * 1996-05-29 1998-06-30 International Business Machines Corporation Method for making laminated integrated circuit devices
US5892203A (en) * 1996-05-29 1999-04-06 International Business Machines Corporation Apparatus for making laminated integrated circuit devices
US5813113A (en) * 1996-12-09 1998-09-29 International Business Machines Corporation Fixture for making laminated integrated circuit devices
US5818107A (en) * 1997-01-17 1998-10-06 International Business Machines Corporation Chip stacking by edge metallization
US5903437A (en) * 1997-01-17 1999-05-11 International Business Machines Corporation High density edge mounting of chips
KR100214562B1 (ko) * 1997-03-24 1999-08-02 구본준 적층 반도체 칩 패키지 및 그 제조 방법
US5793103A (en) * 1997-05-08 1998-08-11 International Business Machines Corporation Insulated cube with exposed wire lead
US5904502A (en) * 1997-09-04 1999-05-18 International Business Machines Corporation Multiple 3-dimensional semiconductor device processing method and apparatus
US6572387B2 (en) 1999-09-24 2003-06-03 Staktek Group, L.P. Flexible circuit connector for stacked chip module
JP2001352035A (ja) * 2000-06-07 2001-12-21 Sony Corp 多層半導体装置の組立治具及び多層半導体装置の製造方法
WO2001097286A2 (en) * 2000-06-13 2001-12-20 Mcnc High density three dimensional chip package assembly systems and methods
US6608763B1 (en) 2000-09-15 2003-08-19 Staktek Group L.P. Stacking system and method
US6462408B1 (en) * 2001-03-27 2002-10-08 Staktek Group, L.P. Contact member stacking system and method
US6734370B2 (en) * 2001-09-07 2004-05-11 Irvine Sensors Corporation Multilayer modules with flexible substrates
EP1436834A4 (de) * 2001-09-07 2009-12-02 Aprolase Dev Co Llc Stapeln mehrschichtiger module
US6717061B2 (en) 2001-09-07 2004-04-06 Irvine Sensors Corporation Stacking of multilayer modules
US6560109B2 (en) 2001-09-07 2003-05-06 Irvine Sensors Corporation Stack of multilayer modules with heat-focusing metal layer
US6620651B2 (en) 2001-10-23 2003-09-16 National Starch And Chemical Investment Holding Corporation Adhesive wafers for die attach application
EP1472730A4 (de) * 2002-01-16 2010-04-14 Mann Alfred E Found Scient Res Platzsparende kapselung elektronischer schaltungen
DE102005030465B4 (de) * 2005-06-28 2007-12-20 Infineon Technologies Ag Halbleiterstapelblock mit Halbleiterchips und Verfahren zur Herstellung desselben
US7429785B2 (en) * 2005-10-19 2008-09-30 Littelfuse, Inc. Stacked integrated circuit chip assembly
TW200924148A (en) * 2007-11-26 2009-06-01 Ind Tech Res Inst Structure of three-dimensional stacked dies with vertical electrical self-interconnections and method for manufacturing the same
US20090188105A1 (en) * 2008-01-28 2009-07-30 Ming-Chin Chien Slim battery packaging method
US20110096511A1 (en) * 2009-10-26 2011-04-28 Christian Krutzik Ultra-low profile multi-chip module
US9190390B2 (en) 2012-08-22 2015-11-17 Freescale Semiconductor Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9093457B2 (en) 2012-08-22 2015-07-28 Freescale Semiconductor Inc. Stacked microelectronic packages having patterned sidewall conductors and methods for the fabrication thereof
US9064977B2 (en) 2012-08-22 2015-06-23 Freescale Semiconductor Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9299670B2 (en) 2013-03-14 2016-03-29 Freescale Semiconductor, Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9524950B2 (en) 2013-05-31 2016-12-20 Freescale Semiconductor, Inc. Stacked microelectronic packages having sidewall conductors and methods for the fabrication thereof
US9025340B2 (en) 2013-09-30 2015-05-05 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with in-trench package surface conductors and methods of their fabrication
US9036363B2 (en) 2013-09-30 2015-05-19 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with parallel conductors and intra-conductor isolator structures and methods of their fabrication
US9305911B2 (en) 2013-12-05 2016-04-05 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with package surface conductors and adjacent trenches and methods of their fabrication
US9263420B2 (en) 2013-12-05 2016-02-16 Freescale Semiconductor, Inc. Devices and stacked microelectronic packages with package surface conductors and methods of their fabrication
US20150168973A1 (en) * 2013-12-18 2015-06-18 Hashfast LLC Stacked chips powered from shared voltage sources
US10388607B2 (en) 2014-12-17 2019-08-20 Nxp Usa, Inc. Microelectronic devices with multi-layer package surface conductors and methods of their fabrication

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4646128A (en) * 1980-09-16 1987-02-24 Irvine Sensors Corporation High-density electronic processing package--structure and fabrication
US4525921A (en) * 1981-07-13 1985-07-02 Irvine Sensors Corporation High-density electronic processing package-structure and fabrication
EP0161246B1 (de) * 1983-11-07 1990-01-31 Irvine Sensors Corporation Detektoranordnungsstruktur und -herstellung
US4617160A (en) * 1984-11-23 1986-10-14 Irvine Sensors Corporation Method for fabricating modules comprising uniformly stacked, aligned circuit-carrying layers
JP2559700B2 (ja) * 1986-03-18 1996-12-04 富士通株式会社 半導体装置の製造方法
US4706166A (en) * 1986-04-25 1987-11-10 Irvine Sensors Corporation High-density electronic modules--process and product
US5104820A (en) * 1989-07-07 1992-04-14 Irvine Sensors Corporation Method of fabricating electronic circuitry unit containing stacked IC layers having lead rerouting

Also Published As

Publication number Publication date
JPH08505267A (ja) 1996-06-04
EP0676087A4 (de) 1997-04-16
EP0676087B1 (de) 2003-11-12
WO1994015358A1 (en) 1994-07-07
US5279991A (en) 1994-01-18
EP0676087A1 (de) 1995-10-11

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Legal Events

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8332 No legal effect for de