DE69330891D1 - Schnittstellenanordnung zur Verbindung von Mikroprozessoren - Google Patents

Schnittstellenanordnung zur Verbindung von Mikroprozessoren

Info

Publication number
DE69330891D1
DE69330891D1 DE69330891T DE69330891T DE69330891D1 DE 69330891 D1 DE69330891 D1 DE 69330891D1 DE 69330891 T DE69330891 T DE 69330891T DE 69330891 T DE69330891 T DE 69330891T DE 69330891 D1 DE69330891 D1 DE 69330891D1
Authority
DE
Germany
Prior art keywords
microprocessors
interface arrangement
interface
arrangement
connecting microprocessors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69330891T
Other languages
English (en)
Other versions
DE69330891T2 (de
Inventor
Jean-Claude Perraud
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Application granted granted Critical
Publication of DE69330891D1 publication Critical patent/DE69330891D1/de
Publication of DE69330891T2 publication Critical patent/DE69330891T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4072Drivers or receivers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/082Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
    • H03K17/0826Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit in bipolar transistor switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00307Modifications for increasing the reliability for protection in bipolar transistor circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Amplifiers (AREA)
  • Control Of Electrical Variables (AREA)
DE69330891T 1992-06-10 1993-06-02 Schnittstellenanordnung zur Verbindung von Mikroprozessoren Expired - Fee Related DE69330891T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR9206985 1992-06-10

Publications (2)

Publication Number Publication Date
DE69330891D1 true DE69330891D1 (de) 2001-11-15
DE69330891T2 DE69330891T2 (de) 2002-04-04

Family

ID=9430581

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69330891T Expired - Fee Related DE69330891T2 (de) 1992-06-10 1993-06-02 Schnittstellenanordnung zur Verbindung von Mikroprozessoren

Country Status (4)

Country Link
US (1) US5444409A (de)
EP (1) EP0574070B9 (de)
JP (1) JP3453403B2 (de)
DE (1) DE69330891T2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG54603A1 (en) * 1996-12-13 1998-11-16 Texas Instruments Inc Current limiting circuit and method that may be shared among different circuitry
KR100438776B1 (ko) 2001-11-06 2004-07-05 삼성전자주식회사 댐핑부재를 가지는 가요성 인쇄회로를 구비하는하드디스크 드라이브

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4709171A (en) * 1982-05-27 1987-11-24 Motorola, Inc. Current limiter and method for limiting current
DE3238880A1 (de) * 1982-10-21 1984-04-26 Robert Bosch Gmbh, 7000 Stuttgart Schaltungsanordnung
US4533845A (en) * 1984-02-22 1985-08-06 Motorola, Inc. Current limit technique for multiple-emitter vertical power transistor
US4656565A (en) * 1984-09-06 1987-04-07 Mag Instrument, Inc. Flashlight
US4847867A (en) * 1986-09-01 1989-07-11 Nec Corporation Serial bus interface system for data communication using two-wire line as clock bus and data bus
NL8801103A (nl) * 1988-04-28 1989-11-16 Philips Nv Transistorschakeling met stuurstroombegrenzing.
JPH0666678B2 (ja) * 1989-11-30 1994-08-24 株式会社東芝 Ecl回路

Also Published As

Publication number Publication date
US5444409A (en) 1995-08-22
DE69330891T2 (de) 2002-04-04
EP0574070B1 (de) 2001-10-10
JPH0677747A (ja) 1994-03-18
EP0574070B9 (de) 2002-08-28
JP3453403B2 (ja) 2003-10-06
EP0574070A1 (de) 1993-12-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Representative=s name: EISENFUEHR, SPEISER & PARTNER, 10178 BERLIN

8327 Change in the person/name/address of the patent owner

Owner name: NXP B.V., EINDHOVEN, NL

8339 Ceased/non-payment of the annual fee