DE69326314D1 - Durchführung aritmetische Operationen auf Daten - Google Patents
Durchführung aritmetische Operationen auf DatenInfo
- Publication number
- DE69326314D1 DE69326314D1 DE69326314T DE69326314T DE69326314D1 DE 69326314 D1 DE69326314 D1 DE 69326314D1 DE 69326314 T DE69326314 T DE 69326314T DE 69326314 T DE69326314 T DE 69326314T DE 69326314 D1 DE69326314 D1 DE 69326314D1
- Authority
- DE
- Germany
- Prior art keywords
- data
- arithmetic operations
- perform arithmetic
- perform
- operations
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
- G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/3808—Details concerning the type of numbers or the way they are handled
- G06F2207/3828—Multigauge devices, i.e. capable of handling packed numbers without unpacking them
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
- G06F2207/3804—Details
- G06F2207/386—Special constructional features
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Pure & Applied Mathematics (AREA)
- Mathematical Physics (AREA)
- Computing Systems (AREA)
- Mathematical Optimization (AREA)
- Executing Machine-Instructions (AREA)
- Image Processing (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/993,925 US5408670A (en) | 1992-12-18 | 1992-12-18 | Performing arithmetic in parallel on composite operands with packed multi-bit components |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69326314D1 true DE69326314D1 (de) | 1999-10-14 |
DE69326314T2 DE69326314T2 (de) | 2000-02-24 |
Family
ID=25540077
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69326314T Expired - Fee Related DE69326314T2 (de) | 1992-12-18 | 1993-12-08 | Durchführung aritmetische Operationen auf Daten |
Country Status (4)
Country | Link |
---|---|
US (1) | US5408670A (de) |
EP (1) | EP0602888B1 (de) |
JP (1) | JPH06222908A (de) |
DE (1) | DE69326314T2 (de) |
Families Citing this family (61)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5651121A (en) * | 1992-12-18 | 1997-07-22 | Xerox Corporation | Using mask operand obtained from composite operand to perform logic operation in parallel with composite operand |
US5655131A (en) * | 1992-12-18 | 1997-08-05 | Xerox Corporation | SIMD architecture for connection to host processor's bus |
US6112219A (en) * | 1993-09-23 | 2000-08-29 | Realnetworks, Inc. | Method and apparatus for performing fast discrete cosine transforms and fast inverse discrete cosine transforms using look-up tables |
NL9400607A (nl) * | 1994-04-15 | 1995-11-01 | Arcobel Graphics Bv | Dataverwerkingscircuit, vermenigvuldigingseenheid met pijplijn, ALU en schuifregistereenheid ten gebruike bij een dataverwerkingscircuit. |
US6738793B2 (en) * | 1994-12-01 | 2004-05-18 | Intel Corporation | Processor capable of executing packed shift operations |
ZA9510127B (en) * | 1994-12-01 | 1996-06-06 | Intel Corp | Novel processor having shift operations |
US6275834B1 (en) * | 1994-12-01 | 2001-08-14 | Intel Corporation | Apparatus for performing packed shift operations |
IL116210A0 (en) * | 1994-12-02 | 1996-01-31 | Intel Corp | Microprocessor having a compare operation and a method of comparing packed data in a processor |
EP1265132A3 (de) * | 1994-12-02 | 2005-02-09 | Intel Corporation | Mikroprozessor mit Packfunktion für zusammengesetzte Operanden |
GB9509989D0 (en) * | 1995-05-17 | 1995-07-12 | Sgs Thomson Microelectronics | Manipulation of data |
US5815421A (en) * | 1995-12-18 | 1998-09-29 | Intel Corporation | Method for transposing a two-dimensional array |
US6036350A (en) * | 1995-12-20 | 2000-03-14 | Intel Corporation | Method of sorting signed numbers and solving absolute differences using packed instructions |
US5907842A (en) * | 1995-12-20 | 1999-05-25 | Intel Corporation | Method of sorting numbers to obtain maxima/minima values with ordering |
US5946222A (en) * | 1996-12-20 | 1999-08-31 | Oak Technology, Inc. | Method and apparatus for performing a masked byte addition operation |
US6006316A (en) * | 1996-12-20 | 1999-12-21 | International Business Machines, Corporation | Performing SIMD shift and arithmetic operation in non-SIMD architecture by operation on packed data of sub-operands and carry over-correction |
US5901306A (en) * | 1997-06-23 | 1999-05-04 | Sun Microsystems, Inc. | Method and apparatus for reducing a computational result to the range boundaries of a signed 8-bit integer in case of overflow |
US5887181A (en) * | 1997-06-23 | 1999-03-23 | Sun Microsystems, Inc. | Method and apparatus for reducing a computational result to the range boundaries of an unsigned 8-bit integer in case of overflow |
US6041404A (en) | 1998-03-31 | 2000-03-21 | Intel Corporation | Dual function system and method for shuffling packed data elements |
US6338135B1 (en) | 1998-11-20 | 2002-01-08 | Arm Limited | Data processing system and method for performing an arithmetic operation on a plurality of signed data values |
US6425003B1 (en) * | 1999-01-22 | 2002-07-23 | Cisco Technology, Inc. | Method and apparatus for DNS resolution |
US6463521B1 (en) | 1999-06-23 | 2002-10-08 | Sun Microsystems, Inc. | Opcode numbering for meta-data encoding |
US7207037B2 (en) * | 1999-11-12 | 2007-04-17 | Sun Microsystems, Inc. | Overflow sensitive arithmetic instruction optimization using chaining |
US7107581B2 (en) * | 1999-11-12 | 2006-09-12 | Sun Microsystems, Inc. | Overflow predictive arithmetic instruction optimization using chaining |
US7010786B2 (en) | 1999-11-12 | 2006-03-07 | Sun Microsystems, Inc. | Predictive arithmetic overflow detection |
US8453133B2 (en) * | 1999-11-12 | 2013-05-28 | Oracle America, Inc. | Optimization of N-base typed arithmetic instructions via rework |
US6363523B1 (en) | 1999-11-12 | 2002-03-26 | Sun Microsystems, Inc. | Optimization of N-base typed arithmetic expressions |
GB2362731B (en) | 2000-05-23 | 2004-10-06 | Advanced Risc Mach Ltd | Parallel processing of multiple data values within a data word |
US7039906B1 (en) | 2000-09-29 | 2006-05-02 | International Business Machines Corporation | Compiler for enabling multiple signed independent data elements per register |
US6834337B1 (en) | 2000-09-29 | 2004-12-21 | International Business Machines Corporation | System and method for enabling multiple signed independent data elements per register |
US7155601B2 (en) * | 2001-02-14 | 2006-12-26 | Intel Corporation | Multi-element operand sub-portion shuffle instruction execution |
US7624138B2 (en) | 2001-10-29 | 2009-11-24 | Intel Corporation | Method and apparatus for efficient integer transform |
US7725521B2 (en) * | 2001-10-29 | 2010-05-25 | Intel Corporation | Method and apparatus for computing matrix transformations |
US20040054877A1 (en) * | 2001-10-29 | 2004-03-18 | Macy William W. | Method and apparatus for shuffling data |
US7631025B2 (en) * | 2001-10-29 | 2009-12-08 | Intel Corporation | Method and apparatus for rearranging data between multiple registers |
US7739319B2 (en) * | 2001-10-29 | 2010-06-15 | Intel Corporation | Method and apparatus for parallel table lookup using SIMD instructions |
US7685212B2 (en) * | 2001-10-29 | 2010-03-23 | Intel Corporation | Fast full search motion estimation with SIMD merge instruction |
US7818356B2 (en) | 2001-10-29 | 2010-10-19 | Intel Corporation | Bitstream buffer manipulation with a SIMD merge instruction |
JP3779602B2 (ja) * | 2001-11-28 | 2006-05-31 | 松下電器産業株式会社 | Simd演算方法およびsimd演算装置 |
US7047383B2 (en) * | 2002-07-11 | 2006-05-16 | Intel Corporation | Byte swap operation for a 64 bit operand |
GB2409059B (en) * | 2003-12-09 | 2006-09-27 | Advanced Risc Mach Ltd | A data processing apparatus and method for moving data between registers and memory |
GB2411973B (en) * | 2003-12-09 | 2006-09-27 | Advanced Risc Mach Ltd | Constant generation in SMD processing |
GB2409062C (en) * | 2003-12-09 | 2007-12-11 | Advanced Risc Mach Ltd | Aliasing data processing registers |
GB2409065B (en) * | 2003-12-09 | 2006-10-25 | Advanced Risc Mach Ltd | Multiplexing operations in SIMD processing |
GB2409060B (en) * | 2003-12-09 | 2006-08-09 | Advanced Risc Mach Ltd | Moving data between registers of different register data stores |
GB2409063B (en) * | 2003-12-09 | 2006-07-12 | Advanced Risc Mach Ltd | Vector by scalar operations |
GB2411976B (en) * | 2003-12-09 | 2006-07-19 | Advanced Risc Mach Ltd | A data processing apparatus and method for moving data between registers and memory |
GB2409066B (en) * | 2003-12-09 | 2006-09-27 | Advanced Risc Mach Ltd | A data processing apparatus and method for moving data between registers and memory |
GB2409061B (en) * | 2003-12-09 | 2006-09-13 | Advanced Risc Mach Ltd | Table lookup operation within a data processing system |
GB2411975B (en) * | 2003-12-09 | 2006-10-04 | Advanced Risc Mach Ltd | Data processing apparatus and method for performing arithmetic operations in SIMD data processing |
GB2409064B (en) * | 2003-12-09 | 2006-09-13 | Advanced Risc Mach Ltd | A data processing apparatus and method for performing in parallel a data processing operation on data elements |
GB2409067B (en) * | 2003-12-09 | 2006-12-13 | Advanced Risc Mach Ltd | Endianess compensation within a SIMD data processing system |
GB2409068A (en) * | 2003-12-09 | 2005-06-15 | Advanced Risc Mach Ltd | Data element size control within parallel lanes of processing |
GB2411974C (en) * | 2003-12-09 | 2009-09-23 | Advanced Risc Mach Ltd | Data shift operations |
GB2410097B (en) * | 2004-01-13 | 2006-11-01 | Advanced Risc Mach Ltd | A data processing apparatus and method for performing data processing operations on floating point data elements |
GB2411978B (en) * | 2004-03-10 | 2007-04-04 | Advanced Risc Mach Ltd | Inserting bits within a data word |
US9557994B2 (en) | 2004-07-13 | 2017-01-31 | Arm Limited | Data processing apparatus and method for performing N-way interleaving and de-interleaving operations where N is an odd plural number |
US7958181B2 (en) | 2006-09-21 | 2011-06-07 | Intel Corporation | Method and apparatus for performing logical compare operations |
US8078836B2 (en) | 2007-12-30 | 2011-12-13 | Intel Corporation | Vector shuffle instructions operating on multiple lanes each having a plurality of data elements using a common set of per-lane control bits |
KR102072543B1 (ko) | 2013-01-28 | 2020-02-03 | 삼성전자 주식회사 | 복수 데이터 형식을 지원하는 가산기 및 그 가산기를 이용한 복수 데이터 형식의 가감 연산 지원 방법 |
US11620169B2 (en) * | 2020-03-13 | 2023-04-04 | Nvidia Corporation | Barrierless and fenceless shared memory synchronization with write flag toggling |
EP4235399A1 (de) * | 2022-02-28 | 2023-08-30 | Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CMS) | Verfahren zur berechnung einer linearen algebra mit schmaler bitbreite |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5765194A (en) * | 1980-10-09 | 1982-04-20 | Daicel Chem Ind Ltd | Microbial preparation of unsaturated dicarboxylic acid |
US4742552A (en) * | 1983-09-27 | 1988-05-03 | The Boeing Company | Vector image processing system |
US4608659A (en) * | 1983-09-30 | 1986-08-26 | Honeywell Information Systems Inc. | Arithmetic logic unit with outputs indicating invalid computation results caused by invalid operands |
US4722066A (en) * | 1985-07-30 | 1988-01-26 | Rca Corporation | Digital signal overflow correction apparatus |
US4764887A (en) * | 1985-08-02 | 1988-08-16 | Advanced Micro Devices, Inc. | Carry-bypass arithmetic logic unit |
US5129092A (en) * | 1987-06-01 | 1992-07-07 | Applied Intelligent Systems,Inc. | Linear chain of parallel processors and method of using same |
JP2600293B2 (ja) * | 1988-06-10 | 1997-04-16 | 日本電気株式会社 | オーバーフロー補正回路 |
US4975868A (en) * | 1989-04-17 | 1990-12-04 | International Business Machines Corporation | Floating-point processor having pre-adjusted exponent bias for multiplication and division |
JP2523222B2 (ja) * | 1989-12-08 | 1996-08-07 | ゼロックス コーポレーション | 画像縮小/拡大方法及び装置 |
US5280547A (en) * | 1990-06-08 | 1994-01-18 | Xerox Corporation | Dense aggregative hierarhical techniques for data analysis |
JPH0454679A (ja) * | 1990-06-25 | 1992-02-21 | Nec Corp | 演算装置 |
JP2601960B2 (ja) * | 1990-11-15 | 1997-04-23 | インターナショナル・ビジネス・マシーンズ・コーポレイション | データ処理方法及びその装置 |
-
1992
- 1992-12-18 US US07/993,925 patent/US5408670A/en not_active Expired - Fee Related
-
1993
- 1993-12-08 DE DE69326314T patent/DE69326314T2/de not_active Expired - Fee Related
- 1993-12-08 EP EP93309863A patent/EP0602888B1/de not_active Expired - Lifetime
- 1993-12-17 JP JP5317778A patent/JPH06222908A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0602888B1 (de) | 1999-09-08 |
JPH06222908A (ja) | 1994-08-12 |
US5408670A (en) | 1995-04-18 |
EP0602888A1 (de) | 1994-06-22 |
DE69326314T2 (de) | 2000-02-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |