DE69227666T2 - Verfahren zur herstellung integrierter schaltungen mit nebeneinander geformten elektroden - Google Patents

Verfahren zur herstellung integrierter schaltungen mit nebeneinander geformten elektroden

Info

Publication number
DE69227666T2
DE69227666T2 DE69227666T DE69227666T DE69227666T2 DE 69227666 T2 DE69227666 T2 DE 69227666T2 DE 69227666 T DE69227666 T DE 69227666T DE 69227666 T DE69227666 T DE 69227666T DE 69227666 T2 DE69227666 T2 DE 69227666T2
Authority
DE
Germany
Prior art keywords
integrated circuits
producing integrated
shaped together
electrodes shaped
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69227666T
Other languages
English (en)
Other versions
DE69227666D1 (de
Inventor
Pierre Blanchard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teledyne e2v Semiconductors SAS
Original Assignee
Thomson SCF Semiconducteurs Specifiques
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson SCF Semiconducteurs Specifiques filed Critical Thomson SCF Semiconducteurs Specifiques
Publication of DE69227666D1 publication Critical patent/DE69227666D1/de
Application granted granted Critical
Publication of DE69227666T2 publication Critical patent/DE69227666T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897—Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28525—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising semiconducting material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42396—Gate electrodes for field effect devices for charge coupled devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66946—Charge transfer devices
    • H01L29/66954—Charge transfer devices with an insulated gate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/981—Utilizing varying dielectric thickness

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
DE69227666T 1991-07-16 1992-07-10 Verfahren zur herstellung integrierter schaltungen mit nebeneinander geformten elektroden Expired - Fee Related DE69227666T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9108953A FR2679380B1 (fr) 1991-07-16 1991-07-16 Procede de fabrication de circuits integres avec electrodes juxtaposees et circuit integre correspondant.
PCT/FR1992/000673 WO1993002469A1 (fr) 1991-07-16 1992-07-10 Procede de fabrication de circuits integres avec electrodes juxtaposees et circuit integre correspondant

Publications (2)

Publication Number Publication Date
DE69227666D1 DE69227666D1 (de) 1999-01-07
DE69227666T2 true DE69227666T2 (de) 1999-04-22

Family

ID=9415158

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69227666T Expired - Fee Related DE69227666T2 (de) 1991-07-16 1992-07-10 Verfahren zur herstellung integrierter schaltungen mit nebeneinander geformten elektroden

Country Status (6)

Country Link
US (1) US5457332A (de)
EP (1) EP0548351B1 (de)
JP (1) JPH06503926A (de)
DE (1) DE69227666T2 (de)
FR (1) FR2679380B1 (de)
WO (1) WO1993002469A1 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5489792A (en) * 1994-04-07 1996-02-06 Regents Of The University Of California Silicon-on-insulator transistors having improved current characteristics and reduced electrostatic discharge susceptibility
JPH08204173A (ja) * 1995-01-25 1996-08-09 Sony Corp 電荷転送装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4251571A (en) * 1978-05-02 1981-02-17 International Business Machines Corporation Method for forming semiconductor structure with improved isolation between two layers of polycrystalline silicon
DE2939456A1 (de) * 1979-09-28 1981-04-16 Siemens AG, 1000 Berlin und 8000 München Verfahren zur herstellung von integrierten halbleiterschaltungen, insbesondere ccd-schaltungen, mit selbstjustierten, nichtueberlappenden poly-silizium-elektroden
JPS5947470B2 (ja) * 1981-06-09 1984-11-19 三洋電機株式会社 電荷結合素子の製造方法
FR2533371B1 (fr) * 1982-09-21 1985-12-13 Thomson Csf Structure de grille pour circuit integre comportant des elements du type grille-isolant-semi-conducteur et procede de realisation d'un circuit integre utilisant une telle structure
FR2583573B1 (fr) * 1985-06-18 1988-04-08 Thomson Csf Procede de realisation d'un dispositif semi-conducteur a plusieurs niveaux de grille.
WO1990013916A1 (en) * 1989-05-10 1990-11-15 Oki Electric Industry Co., Ltd. Method of fabricating semiconductor devices
JPH03198371A (ja) * 1989-12-27 1991-08-29 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPH04284669A (ja) * 1991-03-14 1992-10-09 Fuji Electric Co Ltd 絶縁ゲート制御サイリスタ
US5135889A (en) * 1991-12-09 1992-08-04 Micron Technology, Inc. Method for forming a shielding structure for decoupling signal traces in a semiconductor

Also Published As

Publication number Publication date
JPH06503926A (ja) 1994-04-28
US5457332A (en) 1995-10-10
DE69227666D1 (de) 1999-01-07
WO1993002469A1 (fr) 1993-02-04
EP0548351A1 (de) 1993-06-30
EP0548351B1 (de) 1998-11-25
FR2679380B1 (fr) 1997-11-21
FR2679380A1 (fr) 1993-01-22

Similar Documents

Publication Publication Date Title
DE59206717D1 (de) Verfahren zur herstellung von halbleiterbauelementen
DE69116058D1 (de) Verfahren zur Herstellung integrierter Schaltungen
DE69232066D1 (de) Verfahren zur herstellung von fullerenen
DE69228242D1 (de) Verfahren zur herstellung von pentafluorethan
DE3888696D1 (de) Verfahren zur herstellung durchkontaktierter leiterplatten.
DE69215070D1 (de) Verfahren zur herstellung von 3-dpa-lacton
DE3878090T2 (de) Verfahren zur herstellung von supraleitenden schaltungen.
DE68928951D1 (de) Verfahren zur Herstellung einer integrierten Schaltung mit Bipolartransistoren
DE69126141D1 (de) Verfahren zur herstellung von 4-hydroxy-l-prolin
DE69216643T2 (de) Verfahren zur herstellung von chlordioxid
DE69629974D1 (de) Verfahren zur Herstellung einer integrierten Schaltung mit komplementären Bipolartransistoren
DE69216977D1 (de) Verfahren zur herstellung von hydrochlormethanen
DE69116895T2 (de) Verfahren zur herstellung von dinitrotoluol
DE69322965T2 (de) Verfahren zur herstellung von rohrförmigen elementen mit integralen äusserlichen vorsprüngen
DE69227666T2 (de) Verfahren zur herstellung integrierter schaltungen mit nebeneinander geformten elektroden
DE69120394D1 (de) Verfahren zur herstellung von dichlorpentafluorpropan
ATA251891A (de) Verfahren zur herstellung von zellstoff
DE69230283D1 (de) Verfahren zur herstellung von spiroketalen
ATA208790A (de) Verfahren zur herstellung von polysiloxanimiden
ATA13292A (de) Verfahren zur herstellung von ceftriaxondinatrium-salzhemiheptahydrat
ATA235592A (de) Verfahren zur herstellung von arylhydantoinen
DE59303736D1 (de) Verfahren zur herstellung gesinterter bauteile
DE59206617D1 (de) Verfahren zur herstellung von 3-s-furanderivaten
DE59405861D1 (de) Verfahren zur herstellung von sinterteilen
DE69220952T2 (de) VERFAHREN ZUR HERSTELLUNG VON Mo4S4L6

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee