DE69223304D1 - Arbitrierungsverriegelungverfahren und -vorrichtung für einen entfernten Bus - Google Patents

Arbitrierungsverriegelungverfahren und -vorrichtung für einen entfernten Bus

Info

Publication number
DE69223304D1
DE69223304D1 DE69223304T DE69223304T DE69223304D1 DE 69223304 D1 DE69223304 D1 DE 69223304D1 DE 69223304 T DE69223304 T DE 69223304T DE 69223304 T DE69223304 T DE 69223304T DE 69223304 D1 DE69223304 D1 DE 69223304D1
Authority
DE
Germany
Prior art keywords
remote bus
lockout method
arbitration
arbitration lockout
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69223304T
Other languages
English (en)
Other versions
DE69223304T2 (de
Inventor
Charles E Narad
Neil Macavoy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of DE69223304D1 publication Critical patent/DE69223304D1/de
Publication of DE69223304T2 publication Critical patent/DE69223304T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/17—Interprocessor communication using an input/output type connection, e.g. channel, I/O port
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)
DE69223304T 1991-09-27 1992-09-15 Arbitrierungsverriegelungverfahren und -vorrichtung für einen entfernten Bus Expired - Fee Related DE69223304T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76683491A 1991-09-27 1991-09-27

Publications (2)

Publication Number Publication Date
DE69223304D1 true DE69223304D1 (de) 1998-01-08
DE69223304T2 DE69223304T2 (de) 1998-06-18

Family

ID=25077663

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69223304T Expired - Fee Related DE69223304T2 (de) 1991-09-27 1992-09-15 Arbitrierungsverriegelungverfahren und -vorrichtung für einen entfernten Bus

Country Status (5)

Country Link
US (1) US5572734A (de)
EP (1) EP0535822B1 (de)
JP (1) JP3388549B2 (de)
KR (1) KR100192529B1 (de)
DE (1) DE69223304T2 (de)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1036736C (zh) * 1993-07-16 1997-12-17 D2B系统有限公司 能缓和从站锁定问题的通信总线系统
US5835742A (en) * 1994-06-14 1998-11-10 Apple Computer, Inc. System and method for executing indivisible memory operations in multiple processor computer systems with multiple busses
FR2726383A1 (fr) * 1994-10-26 1996-05-03 Trt Telecom Radio Electr Systeme de traitement d'informations comportant au moins deux processeurs
JPH0981507A (ja) * 1995-09-08 1997-03-28 Toshiba Corp コンピュータシステム
US5943483A (en) * 1995-12-11 1999-08-24 Lsi Logic Corporation Method and apparatus for controlling access to a bus in a data processing system
US5737545A (en) * 1996-05-21 1998-04-07 Vlsi Technology, Inc. Computer bus mastery system and method having a lock mechanism
US6275890B1 (en) 1998-08-19 2001-08-14 International Business Machines Corporation Low latency data path in a cross-bar switch providing dynamically prioritized bus arbitration
US6323755B1 (en) 1998-08-19 2001-11-27 International Business Machines Corporation Dynamic bus locking in a cross bar switch
US6895456B2 (en) * 1998-12-01 2005-05-17 Hewlett-Packard Development Company, L.P. System supporting multicast master cycles between different busses in a computer system
US6381663B1 (en) 1999-03-26 2002-04-30 Hewlett-Packard Company Mechanism for implementing bus locking with a mixed architecture
KR100338954B1 (ko) * 1999-12-30 2002-05-31 박종섭 멀티-버스 컴퓨터 시스템의 데드록 회피 장치 및 방법
US6587964B1 (en) * 2000-02-18 2003-07-01 Hewlett-Packard Development Company, L.P. Transparent software emulation as an alternative to hardware bus lock
KR100716950B1 (ko) * 2000-08-11 2007-05-10 삼성전자주식회사 버스 시스템
US6658510B1 (en) 2000-10-18 2003-12-02 International Business Machines Corporation Software method to retry access to peripherals that can cause bus timeouts during momentary busy periods
US6754753B2 (en) * 2001-04-27 2004-06-22 International Business Machines Corporation Atomic ownership change operation for input/output (I/O) bridge device in clustered computer system
US6832280B2 (en) * 2001-08-10 2004-12-14 Freescale Semiconductor, Inc. Data processing system having an adaptive priority controller
US7856346B2 (en) * 2002-05-10 2010-12-21 Arm Limited Emulating multiple bus used within a data processing system
US7007122B2 (en) * 2002-11-27 2006-02-28 Lsi Logic Corporation Method for pre-emptive arbitration
US7594053B2 (en) * 2003-12-12 2009-09-22 Alcatel-Lucent Usa Inc. Adaptive object level locking
US20070234006A1 (en) * 2004-04-26 2007-10-04 Koninklijke Philips Electronics, N.V. Integrated Circuit and Metod for Issuing Transactions
US7305510B2 (en) * 2004-06-25 2007-12-04 Via Technologies, Inc. Multiple master buses and slave buses transmitting simultaneously
US20080059674A1 (en) * 2006-09-01 2008-03-06 Jiaxiang Shi Apparatus and method for chained arbitration of a plurality of inputs
US8156273B2 (en) * 2007-05-10 2012-04-10 Freescale Semiconductor, Inc. Method and system for controlling transmission and execution of commands in an integrated circuit device
US8549630B2 (en) * 2010-03-05 2013-10-01 The Regents Of The University Of California Trojan-resistant bus architecture and methods
US20130191572A1 (en) * 2012-01-23 2013-07-25 Qualcomm Incorporated Transaction ordering to avoid bus deadlocks
KR102285749B1 (ko) 2014-11-10 2021-08-05 삼성전자주식회사 세마포어 기능을 갖는 시스템 온 칩 및 그것의 세마포어 구현 방법
KR102649020B1 (ko) 2021-10-08 2024-03-18 한국수력원자력 주식회사 원자력발전소 연계 수소생산시스템 및 운용방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2494010B1 (fr) * 1980-11-07 1986-09-19 Thomson Csf Mat Tel Dispositif d'arbitration decentralisee de plusieurs unites de traitement d'un systeme multiprocesseur
US4586128A (en) * 1983-04-14 1986-04-29 Burroughs Corporation Arbitrator circuit and technique for use in a digital computing system having multiple bus controllers
US4787033A (en) * 1983-09-22 1988-11-22 Digital Equipment Corporation Arbitration mechanism for assigning control of a communications path in a digital computer system
US4633394A (en) * 1984-04-24 1986-12-30 International Business Machines Corp. Distributed arbitration for multiple processors
US4760521A (en) * 1985-11-18 1988-07-26 White Consolidated Industries, Inc. Arbitration system using centralized and decentralized arbitrators to access local memories in a multi-processor controlled machine tool
US4785394A (en) * 1986-09-19 1988-11-15 Datapoint Corporation Fair arbitration technique for a split transaction bus in a multiprocessor computer system
JPS63284660A (ja) * 1987-05-16 1988-11-21 Nec Corp プロセッサ間通信方式
US5168568A (en) * 1989-02-06 1992-12-01 Compaq Computer Corporation Delaying arbitration of bus access in digital computers

Also Published As

Publication number Publication date
EP0535822B1 (de) 1997-11-26
EP0535822A1 (de) 1993-04-07
JPH06266681A (ja) 1994-09-22
DE69223304T2 (de) 1998-06-18
KR100192529B1 (ko) 1999-06-15
KR930006556A (ko) 1993-04-21
US5572734A (en) 1996-11-05
JP3388549B2 (ja) 2003-03-24

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee