DE69024431D1 - Flip-flop circuit - Google Patents
Flip-flop circuitInfo
- Publication number
- DE69024431D1 DE69024431D1 DE69024431T DE69024431T DE69024431D1 DE 69024431 D1 DE69024431 D1 DE 69024431D1 DE 69024431 T DE69024431 T DE 69024431T DE 69024431 T DE69024431 T DE 69024431T DE 69024431 D1 DE69024431 D1 DE 69024431D1
- Authority
- DE
- Germany
- Prior art keywords
- flip
- flop circuit
- flop
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
- H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
- H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3562—Bistable circuits of the master-slave type
- H03K3/35625—Bistable circuits of the master-slave type using complementary field-effect transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
- H03K3/037—Bistable circuits
- H03K3/0372—Bistable circuits of the master-slave type
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
- H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
- H03K3/353—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
- H03K3/356—Bistable circuits
- H03K3/3565—Bistables with hysteresis, e.g. Schmitt trigger
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manipulation Of Pulses (AREA)
- Logic Circuits (AREA)
- Dc Digital Transmission (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1230109A JP2621993B2 (en) | 1989-09-05 | 1989-09-05 | Flip-flop circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69024431D1 true DE69024431D1 (en) | 1996-02-08 |
DE69024431T2 DE69024431T2 (en) | 1996-06-05 |
Family
ID=16902703
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69024431T Expired - Fee Related DE69024431T2 (en) | 1989-09-05 | 1990-09-05 | Flip-flop circuit |
Country Status (5)
Country | Link |
---|---|
US (1) | US5107137A (en) |
EP (1) | EP0416576B1 (en) |
JP (1) | JP2621993B2 (en) |
KR (1) | KR940005506B1 (en) |
DE (1) | DE69024431T2 (en) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5305451A (en) * | 1990-09-05 | 1994-04-19 | International Business Machines Corporation | Single phase clock distribution circuit for providing clock signals to multiple chip integrated circuit systems |
JP2562995B2 (en) * | 1990-11-27 | 1996-12-11 | 三菱電機株式会社 | Data processing circuit control method |
JPH04239810A (en) * | 1991-01-23 | 1992-08-27 | Nec Ic Microcomput Syst Ltd | Single phase static latch circuit |
JP3225528B2 (en) * | 1991-03-26 | 2001-11-05 | 日本電気株式会社 | Register circuit |
JPH04349715A (en) * | 1991-05-28 | 1992-12-04 | Sharp Corp | Timer circuit |
TW198159B (en) * | 1991-05-31 | 1993-01-11 | Philips Gloeicampenfabrieken Nv | |
WO1993019529A1 (en) * | 1992-03-19 | 1993-09-30 | Vlsi Technology Inc. | Asynchronous-to-synchronous synchronizers, particularly cmos synchronizers |
US5194768A (en) * | 1992-03-27 | 1993-03-16 | Advanced Micro Devices, Inc. | Apparatus for filtering noise from a periodic signal |
US5646547A (en) * | 1994-04-28 | 1997-07-08 | Xilinx, Inc. | Logic cell which can be configured as a latch without static one's problem |
JP2985554B2 (en) * | 1993-02-03 | 1999-12-06 | 日本電気株式会社 | Memory circuit |
JP2853726B2 (en) * | 1993-12-29 | 1999-02-03 | 日本電気株式会社 | D-type flip-flop circuit |
CN1076479C (en) * | 1994-07-05 | 2001-12-19 | 皇家菲利浦电子有限公司 | Method of testing and electronic circuit compositing flipelop with master and slave |
JP2713182B2 (en) * | 1994-09-26 | 1998-02-16 | 日本電気株式会社 | Receiver device |
US5612632A (en) * | 1994-11-29 | 1997-03-18 | Texas Instruments Incorporated | High speed flip-flop for gate array |
EP0786170A1 (en) * | 1995-08-14 | 1997-07-30 | Koninklijke Philips Electronics N.V. | Mos master-slave flip-flop with reduced number of pass gates |
US5894434A (en) * | 1995-12-22 | 1999-04-13 | Texas Instruments Incorporated | MOS static memory array |
US6002284A (en) * | 1996-04-24 | 1999-12-14 | Texas Instruments Incorporated | Split-slave dual-path D flip flop |
US5949265A (en) * | 1997-10-31 | 1999-09-07 | International Business Machines Corporation | Soft latch circuit having sharp-cornered hysteresis characteristics |
US6188260B1 (en) * | 1999-01-22 | 2001-02-13 | Agilent Technologies | Master-slave flip-flop and method |
US6417711B2 (en) * | 1999-10-19 | 2002-07-09 | Honeywell Inc. | High speed latch and flip-flop |
JP2001285034A (en) * | 2000-03-29 | 2001-10-12 | Ando Electric Co Ltd | D-ff circuit |
JP4031901B2 (en) * | 2000-07-19 | 2008-01-09 | 株式会社東芝 | Solid-state imaging device |
JP3696501B2 (en) * | 2000-12-08 | 2005-09-21 | シャープ株式会社 | Semiconductor integrated circuit |
JP4218221B2 (en) * | 2001-04-02 | 2009-02-04 | 富士電機デバイステクノロジー株式会社 | Power converter drive circuit |
US6456136B1 (en) * | 2001-04-13 | 2002-09-24 | Sun Microsystems, Inc. | Method and apparatus for latching data within a digital system |
JP2005160088A (en) * | 2003-11-27 | 2005-06-16 | Samsung Electronics Co Ltd | Pulse based flip-flop |
FR2868205B1 (en) * | 2004-03-29 | 2006-05-26 | Soisic Sa | METHOD OF REDUCING THE PHASE NOISE OF A SOI MASTER-SLAVE TYPE CIRCUIT |
TW200535857A (en) * | 2004-04-20 | 2005-11-01 | Innolux Display Corp | Dynamic shift register |
JP2005341354A (en) * | 2004-05-28 | 2005-12-08 | Nec Electronics Corp | Semiconductor integrated circuit |
FR2884988A1 (en) * | 2005-04-22 | 2006-10-27 | St Microelectronics Sa | Flip-flop type latch for integrated circuit chip, has interlocking clusters, each with set of redundant data storage nodes, and buffer circuits, each with writing circuits for separately writing data in each storage node |
WO2007148156A1 (en) * | 2006-06-20 | 2007-12-27 | Freescale Semiconductor, Inc. | Device and method for hadling metastable signals |
JP5211310B2 (en) * | 2007-03-07 | 2013-06-12 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | Semiconductor integrated circuit |
JP2009105848A (en) * | 2007-10-25 | 2009-05-14 | Mitsumi Electric Co Ltd | Logic gate and semiconductor integrated circuit device using the same |
CN104300940B (en) * | 2014-10-01 | 2017-05-03 | 黑龙江大学 | Master-slave follower type single-edge K value trigger constructing method utilizing circuit three-element theory and master-slave follower type single-edge K value trigger circuit |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5877317A (en) * | 1981-11-02 | 1983-05-10 | Matsushita Electric Ind Co Ltd | Schmitt tigger circuit |
US4495628A (en) * | 1982-06-17 | 1985-01-22 | Storage Technology Partners | CMOS LSI and VLSI chips having internal delay testing capability |
US4495629A (en) * | 1983-01-25 | 1985-01-22 | Storage Technology Partners | CMOS scannable latch |
US4539489A (en) * | 1983-06-22 | 1985-09-03 | Motorola, Inc. | CMOS Schmitt trigger circuit |
US4554467A (en) * | 1983-06-22 | 1985-11-19 | Motorola, Inc. | CMOS Flip-flop |
GB2174856A (en) * | 1985-05-08 | 1986-11-12 | Racal Microelect System | Hysteresis latch arrangement |
JPS6295016A (en) * | 1985-10-21 | 1987-05-01 | Mitsubishi Electric Corp | Latching circuit |
JPS63161719A (en) * | 1986-12-24 | 1988-07-05 | Mitsubishi Electric Corp | Latch circuit |
JPH0691431B2 (en) * | 1987-03-02 | 1994-11-14 | 沖電気工業株式会社 | Clock control circuit for flip-flop circuit |
JP2549109B2 (en) * | 1987-03-26 | 1996-10-30 | 株式会社東芝 | Semiconductor circuit |
US4820939A (en) * | 1987-11-24 | 1989-04-11 | National Semiconductor Corporation | Finite metastable time synchronizer |
US5015875A (en) * | 1989-12-01 | 1991-05-14 | Motorola, Inc. | Toggle-free scan flip-flop |
-
1989
- 1989-09-05 JP JP1230109A patent/JP2621993B2/en not_active Expired - Fee Related
-
1990
- 1990-09-04 KR KR1019900013911A patent/KR940005506B1/en not_active IP Right Cessation
- 1990-09-04 US US07/576,940 patent/US5107137A/en not_active Expired - Lifetime
- 1990-09-05 DE DE69024431T patent/DE69024431T2/en not_active Expired - Fee Related
- 1990-09-05 EP EP90117070A patent/EP0416576B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0393310A (en) | 1991-04-18 |
US5107137A (en) | 1992-04-21 |
EP0416576A2 (en) | 1991-03-13 |
KR910007262A (en) | 1991-04-30 |
DE69024431T2 (en) | 1996-06-05 |
JP2621993B2 (en) | 1997-06-18 |
EP0416576B1 (en) | 1995-12-27 |
EP0416576A3 (en) | 1992-04-01 |
KR940005506B1 (en) | 1994-06-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |