DE69009196D1 - EEPROM, its erase gate electrode pattern, the source region pattern, and methods of manufacturing the same. - Google Patents

EEPROM, its erase gate electrode pattern, the source region pattern, and methods of manufacturing the same.

Info

Publication number
DE69009196D1
DE69009196D1 DE69009196T DE69009196T DE69009196D1 DE 69009196 D1 DE69009196 D1 DE 69009196D1 DE 69009196 T DE69009196 T DE 69009196T DE 69009196 T DE69009196 T DE 69009196T DE 69009196 D1 DE69009196 D1 DE 69009196D1
Authority
DE
Germany
Prior art keywords
pattern
eeprom
manufacturing
methods
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69009196T
Other languages
German (de)
Other versions
DE69009196T2 (en
Inventor
Tadayuki C O Intellectua Taura
Masmichi C O Intellectua Asano
Kazunori C O Intellec Kanebako
Hiroshi C O Intellect Iwahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69009196D1 publication Critical patent/DE69009196D1/en
Publication of DE69009196T2 publication Critical patent/DE69009196T2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
DE69009196T 1989-01-13 1990-01-12 EEPROM, its erase gate electrode pattern, the source region pattern, and methods of manufacturing the same. Expired - Fee Related DE69009196T2 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1007433A JP2515009B2 (en) 1989-01-13 1989-01-13 Manufacturing method of nonvolatile semiconductor memory

Publications (2)

Publication Number Publication Date
DE69009196D1 true DE69009196D1 (en) 1994-07-07
DE69009196T2 DE69009196T2 (en) 1994-10-27

Family

ID=11665733

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69009196T Expired - Fee Related DE69009196T2 (en) 1989-01-13 1990-01-12 EEPROM, its erase gate electrode pattern, the source region pattern, and methods of manufacturing the same.

Country Status (5)

Country Link
US (1) US5364805A (en)
EP (1) EP0378227B1 (en)
JP (1) JP2515009B2 (en)
KR (1) KR920009056B1 (en)
DE (1) DE69009196T2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5343063A (en) * 1990-12-18 1994-08-30 Sundisk Corporation Dense vertical programmable read only memory cell structure and processes for making them
US5512505A (en) * 1990-12-18 1996-04-30 Sandisk Corporation Method of making dense vertical programmable read only memory cell structure
JP3104319B2 (en) * 1991-08-29 2000-10-30 ソニー株式会社 Non-volatile storage device
JP3404064B2 (en) * 1993-03-09 2003-05-06 株式会社日立製作所 Semiconductor device and manufacturing method thereof
KR970003845B1 (en) * 1993-10-28 1997-03-22 금성일렉트론 주식회사 Eeprom flash memory cell, memory device and manufacturing method thereof
KR100215883B1 (en) 1996-09-02 1999-08-16 구본준 A flash memory device and manufacturing method thereof
JPH10261775A (en) * 1996-10-29 1998-09-29 Texas Instr Inc <Ti> Method for forming electric isolation between two cells of eprom
US8588000B2 (en) 2010-05-20 2013-11-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor memory device having a reading transistor with a back-gate electrode
JP6901831B2 (en) 2015-05-26 2021-07-14 株式会社半導体エネルギー研究所 Memory system and information processing system
WO2017068478A1 (en) 2015-10-22 2017-04-27 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device or memory device including the semiconductor device
US20240162314A1 (en) * 2022-11-11 2024-05-16 Nxp B.V. Multi-time programmable memory cell and method therefor

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258466A (en) * 1978-11-02 1981-03-31 Texas Instruments Incorporated High density electrically programmable ROM
JPS55156370A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Manufacture of semiconductor device
US4257826A (en) * 1979-10-11 1981-03-24 Texas Instruments Incorporated Photoresist masking in manufacture of semiconductor device
JPS5743470A (en) * 1980-08-29 1982-03-11 Fujitsu Ltd Semiconductor device
DE3175125D1 (en) * 1980-11-20 1986-09-18 Toshiba Kk Semiconductor memory device and method for manufacturing the same
EP0054355B1 (en) * 1980-12-08 1986-04-16 Kabushiki Kaisha Toshiba Semiconductor memory device
DE3171836D1 (en) * 1980-12-08 1985-09-19 Toshiba Kk Semiconductor memory device
JPS6130063A (en) * 1984-07-23 1986-02-12 Nec Corp Nonvolatile semiconductor memory device
EP0253014B1 (en) * 1986-07-18 1990-04-11 Nippondenso Co., Ltd. Method of manufacturing a monvolatile semiconductor memory apparatus with writing and erasing capability
JP2607504B2 (en) * 1987-02-20 1997-05-07 株式会社東芝 Non-volatile semiconductor memory
JPH0640588B2 (en) * 1987-03-13 1994-05-25 株式会社東芝 Semiconductor memory device
US4924437A (en) * 1987-12-09 1990-05-08 Texas Instruments Incorporated Erasable programmable memory including buried diffusion source/drain lines and erase lines
JP2511495B2 (en) * 1988-05-23 1996-06-26 沖電気工業株式会社 Nonvolatile semiconductor memory device
US5219533A (en) * 1991-11-18 1993-06-15 General Electric Company Apparatus for solvent extraction process

Also Published As

Publication number Publication date
KR920009056B1 (en) 1992-10-13
KR900012281A (en) 1990-08-03
JP2515009B2 (en) 1996-07-10
US5364805A (en) 1994-11-15
DE69009196T2 (en) 1994-10-27
EP0378227A1 (en) 1990-07-18
JPH02187070A (en) 1990-07-23
EP0378227B1 (en) 1994-06-01

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee