DE60312014D1 - METHOD FOR PRODUCING A FERROELECTRIC STORAGE CELL IN A FERROELECTRIC STORAGE COMPONENT AND FERROELECTRIC STORAGE COMPONENT - Google Patents

METHOD FOR PRODUCING A FERROELECTRIC STORAGE CELL IN A FERROELECTRIC STORAGE COMPONENT AND FERROELECTRIC STORAGE COMPONENT

Info

Publication number
DE60312014D1
DE60312014D1 DE60312014T DE60312014T DE60312014D1 DE 60312014 D1 DE60312014 D1 DE 60312014D1 DE 60312014 T DE60312014 T DE 60312014T DE 60312014 T DE60312014 T DE 60312014T DE 60312014 D1 DE60312014 D1 DE 60312014D1
Authority
DE
Germany
Prior art keywords
ferroelectric
layer
electrode
ferroelectric storage
electrodes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60312014T
Other languages
German (de)
Inventor
Henrik Ljungcrantz
Niclas Edvardsson
Johan Carlsson
Goeran Gustafsson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ensurge Micropower ASA
Original Assignee
Thin Film Electronics ASA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thin Film Electronics ASA filed Critical Thin Film Electronics ASA
Application granted granted Critical
Publication of DE60312014D1 publication Critical patent/DE60312014D1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32051—Deposition of metallic or metal-silicide layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Physical Vapour Deposition (AREA)

Abstract

In a method for making ferroelectric memory cells in a ferroelectric memory device a first electrode comprising at least one metal layer and optionally at least one metal oxide layer is formed on a silicon substrate which has an optional insulating layer of silicon dioxide. A ferroelectric layer consisting of a thin film of ferroelectric polymer is formed on the top of the first electrode layer and at least a second electrode comprising at least one metal layer and at least one metal oxide layer is formed on the ferroelectric layer. The second electrode is deposited by thermal evaporation of a high-purity evaporation source from an effusion cell onto the ferroelectric layer in a vacuum chamber filled with a gas or a gas mixture. A ferroelectric memory device wherein the memory cell has been made with the above method, comprises at least a first and a second set of respectively parallel electrodes, wherein the electrodes in a set are provided orthogonally to the electrodes of a nearest following set and with memory cells formed in a ferroelectric layer provided between successive electrode sets, such that memory cells are defined in the crossings between the electrodes which contact the ferroelectric layer on each side thereof.
DE60312014T 2002-06-18 2003-06-16 METHOD FOR PRODUCING A FERROELECTRIC STORAGE CELL IN A FERROELECTRIC STORAGE COMPONENT AND FERROELECTRIC STORAGE COMPONENT Expired - Lifetime DE60312014D1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NO20022910A NO322192B1 (en) 2002-06-18 2002-06-18 Process for producing electrode layers of ferroelectric memory cells in a ferroelectric memory device, as well as ferroelectric memory device
PCT/NO2003/000198 WO2003107351A1 (en) 2002-06-18 2003-06-16 A method for making a ferroelectric memory cell in a ferroelectric memory device, and a ferroelectric memory device

Publications (1)

Publication Number Publication Date
DE60312014D1 true DE60312014D1 (en) 2007-04-05

Family

ID=19913735

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60312014T Expired - Lifetime DE60312014D1 (en) 2002-06-18 2003-06-16 METHOD FOR PRODUCING A FERROELECTRIC STORAGE CELL IN A FERROELECTRIC STORAGE COMPONENT AND FERROELECTRIC STORAGE COMPONENT

Country Status (11)

Country Link
US (2) US20040209420A1 (en)
EP (1) EP1550133B1 (en)
JP (1) JP2006510193A (en)
CN (1) CN1662994A (en)
AT (1) ATE354851T1 (en)
AU (1) AU2003263671A1 (en)
CA (1) CA2488829A1 (en)
DE (1) DE60312014D1 (en)
NO (1) NO322192B1 (en)
RU (1) RU2281567C2 (en)
WO (1) WO2003107351A1 (en)

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US7170122B2 (en) * 2003-09-30 2007-01-30 Intel Corporation Ferroelectric polymer memory with a thick interface layer
JP2005136071A (en) * 2003-10-29 2005-05-26 Seiko Epson Corp Cross point type ferroelectric memory
US20050139879A1 (en) * 2003-12-24 2005-06-30 Diana Daniel C. Ion implanting conductive electrodes of polymer memories
US6974984B2 (en) * 2003-12-31 2005-12-13 Intel Corporation Method to sputter deposit metal on a ferroelectric polymer
US7205595B2 (en) * 2004-03-31 2007-04-17 Intel Corporation Polymer memory device with electron traps
KR100626912B1 (en) * 2004-04-23 2006-09-20 주식회사 하이닉스반도체 FeRAM cell having a perpendicular electrode, FeRAM having the cell and manufacturing method of the cell
NO20041733L (en) * 2004-04-28 2005-10-31 Thin Film Electronics Asa Organic electronic circuit with functional interlayer and process for its manufacture.
KR100612867B1 (en) * 2004-11-02 2006-08-14 삼성전자주식회사 Resistive memory device with probe array and manufacturing method the same
US7344897B2 (en) * 2005-05-04 2008-03-18 Intel Corporation Ferroelectric polymer memory structure and method therefor
NO324539B1 (en) * 2005-06-14 2007-11-19 Thin Film Electronics Asa Process in the manufacture of a ferroelectric memory device
US7706165B2 (en) * 2005-12-20 2010-04-27 Agfa-Gevaert Nv Ferroelectric passive memory cell, device and method of manufacture thereof
US7562285B2 (en) 2006-01-11 2009-07-14 Rambus Inc. Unidirectional error code transfer for a bidirectional data link
SG135079A1 (en) * 2006-03-02 2007-09-28 Sony Corp Memory device which comprises a multi-layer capacitor
GB2436893A (en) * 2006-03-31 2007-10-10 Seiko Epson Corp Inkjet printing of cross point passive matrix devices
US8352805B2 (en) 2006-05-18 2013-01-08 Rambus Inc. Memory error detection
US20070271495A1 (en) * 2006-05-18 2007-11-22 Ian Shaeffer System to detect and identify errors in control information, read data and/or write data
US7579197B1 (en) * 2008-03-04 2009-08-25 Qualcomm Incorporated Method of forming a magnetic tunnel junction structure
US8634231B2 (en) 2009-08-24 2014-01-21 Qualcomm Incorporated Magnetic tunnel junction structure
EP2194055B1 (en) 2008-12-03 2012-04-04 Novaled AG Bridged pyridoquinazoline or phenanthroline compounds and organic semiconducting material comprising that compound
US8284601B2 (en) * 2009-04-01 2012-10-09 Samsung Electronics Co., Ltd. Semiconductor memory device comprising three-dimensional memory cell array
EP2246862A1 (en) 2009-04-27 2010-11-03 Novaled AG Organic electronic device comprising an organic semiconducting material
WO2011063927A1 (en) 2009-11-24 2011-06-03 Novaled Ag Organic electronic device comprising an organic semiconducting material
JP6048526B2 (en) * 2015-03-26 2016-12-21 Tdk株式会社 Transparent conductor and touch panel
US9460770B1 (en) 2015-09-01 2016-10-04 Micron Technology, Inc. Methods of operating ferroelectric memory cells, and related ferroelectric memory cells
JP6601199B2 (en) 2015-12-11 2019-11-06 Ｔｄｋ株式会社 Transparent conductor
KR20190008050A (en) * 2017-07-14 2019-01-23 에스케이하이닉스 주식회사 Ferroelectric Memory Device
WO2019190866A1 (en) 2018-03-26 2019-10-03 Rambus Inc. Command/address channel error detection
CN117241589A (en) * 2022-06-02 2023-12-15 华为技术有限公司 Ferroelectric memory, preparation method thereof and electronic equipment

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US5167984A (en) * 1990-12-06 1992-12-01 Xerox Corporation Vacuum deposition process
JPH06243519A (en) * 1993-02-19 1994-09-02 Shigeru Sakai Three-dimensional optical memory consisting of ferroelectric high-polymer film
US6030453A (en) * 1997-03-04 2000-02-29 Motorola, Inc. III-V epitaxial wafer production
JPH11195768A (en) * 1997-10-22 1999-07-21 Fujitsu Ltd Electronic device including perovskite-type oxide film, manufacture thereof and ferroelectric capacitor
US6541375B1 (en) * 1998-06-30 2003-04-01 Matsushita Electric Industrial Co., Ltd. DC sputtering process for making smooth electrodes and thin film ferroelectric capacitors having improved memory retention
KR100343287B1 (en) * 1999-09-21 2002-07-15 윤종용 Method for fabricating a high density ferroelectric memory device
US6359289B1 (en) * 2000-04-19 2002-03-19 International Business Machines Corporation Magnetic tunnel junction device with improved insulating tunnel barrier
KR100382719B1 (en) * 2000-08-25 2003-05-09 삼성전자주식회사 Semiconductor device comprising ferroelectric capacitor and method of manufacturing the same
NO20005980L (en) * 2000-11-27 2002-05-28 Thin Film Electronics Ab Ferroelectric memory circuit and method of its manufacture
US6489645B1 (en) * 2001-07-03 2002-12-03 Matsushita Electric Industrial Co., Ltd. Integrated circuit device including a layered superlattice material with an interface buffer layer
KR20030039893A (en) * 2001-11-16 2003-05-22 주식회사 하이닉스반도체 Capacitor in semiconductor device and the method for fabricating thereof

Also Published As

Publication number Publication date
US20040209420A1 (en) 2004-10-21
RU2005100834A (en) 2005-07-10
AU2003263671A1 (en) 2003-12-31
ATE354851T1 (en) 2007-03-15
JP2006510193A (en) 2006-03-23
CA2488829A1 (en) 2003-12-24
RU2281567C2 (en) 2006-08-10
NO20022910D0 (en) 2002-06-18
EP1550133B1 (en) 2007-02-21
NO20022910L (en) 2003-12-19
WO2003107351A1 (en) 2003-12-24
CN1662994A (en) 2005-08-31
NO322192B1 (en) 2006-08-28
EP1550133A1 (en) 2005-07-06
US20060073658A1 (en) 2006-04-06

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