DE60239520D1 - Verschlüsselungsvorrichtung und -verfahren mit Beständigkeit gegen Seitenkanalangriffe - Google Patents

Verschlüsselungsvorrichtung und -verfahren mit Beständigkeit gegen Seitenkanalangriffe

Info

Publication number
DE60239520D1
DE60239520D1 DE60239520T DE60239520T DE60239520D1 DE 60239520 D1 DE60239520 D1 DE 60239520D1 DE 60239520 T DE60239520 T DE 60239520T DE 60239520 T DE60239520 T DE 60239520T DE 60239520 D1 DE60239520 D1 DE 60239520D1
Authority
DE
Germany
Prior art keywords
side channel
encryption device
channel attack
attack resistance
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60239520T
Other languages
English (en)
Inventor
Jun Yajima
Kouichi Itoh
Masahiko Takenaka
Naoya Torii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE60239520D1 publication Critical patent/DE60239520D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/723—Modular exponentiation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/60—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers
    • G06F7/72—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic
    • G06F7/728—Methods or arrangements for performing computations using a digital non-denominational number representation, i.e. number representation without radix; Computing devices using combinations of denominational and non-denominational quantity representations, e.g. using difunction pulse trains, STEELE computers, phase computers using residue arithmetic using Montgomery reduction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
    • G06F2207/7219—Countermeasures against side channel or fault attacks
    • G06F2207/7223—Randomisation as countermeasure against side channel attacks
    • G06F2207/7233—Masking, e.g. (A**e)+r mod n
    • G06F2207/7238—Operand masking, i.e. message blinding, e.g. (A+r)**e mod n; k.(P+R)

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Physics (AREA)
  • General Engineering & Computer Science (AREA)
  • Storage Device Security (AREA)
DE60239520T 2002-01-15 2002-10-25 Verschlüsselungsvorrichtung und -verfahren mit Beständigkeit gegen Seitenkanalangriffe Expired - Lifetime DE60239520D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002006404A JP4086503B2 (ja) 2002-01-15 2002-01-15 暗号演算装置及び方法並びにプログラム

Publications (1)

Publication Number Publication Date
DE60239520D1 true DE60239520D1 (de) 2011-05-05

Family

ID=19191221

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60239520T Expired - Lifetime DE60239520D1 (de) 2002-01-15 2002-10-25 Verschlüsselungsvorrichtung und -verfahren mit Beständigkeit gegen Seitenkanalangriffe

Country Status (4)

Country Link
US (1) US7065788B2 (de)
EP (1) EP1327932B1 (de)
JP (1) JP4086503B2 (de)
DE (1) DE60239520D1 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4284867B2 (ja) * 2001-01-18 2009-06-24 株式会社日立製作所 標準モデル上で適応的選択暗号文攻撃に対して安全な公開鍵暗号方法
FR2838210B1 (fr) * 2002-04-03 2005-11-04 Gemplus Card Int Procede cryptographique protege contre les attaques de type a canal cache
US7529471B2 (en) * 2002-06-25 2009-05-05 International Business Machines Corporation Personal video recording with storage space loans
JP4626148B2 (ja) * 2004-01-07 2011-02-02 株式会社日立製作所 復号または署名作成におけるべき乗剰余算の計算方法
US7477741B1 (en) 2004-10-01 2009-01-13 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Analysis resistant cipher method and apparatus
KR100855958B1 (ko) 2004-11-24 2008-09-02 삼성전자주식회사 해밍거리를 이용한 부가 채널 공격에 안전한 암호화시스템 및 방법
US7610628B2 (en) * 2005-03-01 2009-10-27 Infineon Technologies Ag Apparatus and method for calculating a representation of a result operand
KR100708162B1 (ko) * 2005-04-25 2007-04-16 삼성전자주식회사 도메인 관리 방법 및 그를 위한 장치
FR2895609A1 (fr) 2005-12-26 2007-06-29 Gemplus Sa Procede cryptographique comprenant une exponentiation modulaire securisee contre les attaques a canaux caches, cryptoprocesseur pour la mise en oeuvre du procede et carte a puce associee
EP2015171A1 (de) * 2007-06-29 2009-01-14 Gemplus Kryptographieverfahren, das eine gesicherte modulare Potenzierung gegen Angriffe mit verborgenen Kanälen ohne Kenntnis des öffentlichen Exponenten umfasst, Kryptoprozessor zur Umsetzung des Verfahrens und dazugehörige Chipkarte
WO2009095574A2 (fr) * 2008-01-11 2009-08-06 France Telecom Procede et entite de chiffrement symetrique probabiliste
FR2926652B1 (fr) * 2008-01-23 2010-06-18 Inside Contactless Procede et dispositifs de contre-mesure pour cryptographie asymetrique a schema de signature
US8776191B2 (en) * 2008-01-25 2014-07-08 Novell Intellectual Property Holdings, Inc. Techniques for reducing storage space and detecting corruption in hash-based application
WO2009118795A1 (ja) * 2008-03-28 2009-10-01 富士通株式会社 サイドチャネル攻撃に対する耐タンパ性を有する暗号処理方法
JP2010008883A (ja) * 2008-06-30 2010-01-14 Toshiba Corp 暗号用演算装置、暗号用演算方法及びプログラム
JP5407352B2 (ja) 2009-01-19 2014-02-05 富士通株式会社 復号処理装置、復号処理プログラム、復号処理方法
US8527766B2 (en) * 2009-12-30 2013-09-03 Microsoft Corporation Reducing leakage of information from cryptographic systems
KR101105384B1 (ko) 2010-03-04 2012-01-16 부산대학교 산학협력단 키 암호화 및 셔플링이 적용된 부채널 공격에 안전한 키 관리방법
EP2437160A1 (de) * 2010-10-04 2012-04-04 Nagravision S.A. Verschleierte modulare Potenzierung
JP5573964B2 (ja) * 2010-12-27 2014-08-20 富士通株式会社 暗号処理装置および方法
US8799343B2 (en) * 2011-09-22 2014-08-05 Intel Corporation Modular exponentiation with partitioned and scattered storage of Montgomery Multiplication results
WO2013172913A2 (en) 2012-03-07 2013-11-21 The Trustees Of Columbia University In The City Of New York Systems and methods to counter side channels attacks
JP6262085B2 (ja) * 2014-06-25 2018-01-17 ルネサスエレクトロニクス株式会社 データ処理装置及び復号処理方法
EP3220304B1 (de) * 2016-02-22 2018-11-07 Eshard Verfahren zur prüfung des widerstands einer schaltung bei einer seitenkanalanalyse
CN106982114B (zh) * 2017-03-12 2020-11-27 成都信息工程大学 针对sm3密码算法消息扩展的侧信道分析攻击的方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4723284A (en) * 1983-02-14 1988-02-02 Prime Computer, Inc. Authentication system
US4979832A (en) * 1989-11-01 1990-12-25 Ritter Terry F Dynamic substitution combiner and extractor
US5048086A (en) * 1990-07-16 1991-09-10 Hughes Aircraft Company Encryption system based on chaos theory
US5142577A (en) * 1990-12-17 1992-08-25 Jose Pastor Method and apparatus for authenticating messages

Also Published As

Publication number Publication date
US20030133567A1 (en) 2003-07-17
EP1327932A1 (de) 2003-07-16
JP4086503B2 (ja) 2008-05-14
JP2003208097A (ja) 2003-07-25
US7065788B2 (en) 2006-06-20
EP1327932B1 (de) 2011-03-23

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