DE60237708D1 - Ratenanpassung in einer tdm-vermittlung durch verwendung von bit-stopfung - Google Patents
Ratenanpassung in einer tdm-vermittlung durch verwendung von bit-stopfungInfo
- Publication number
- DE60237708D1 DE60237708D1 DE60237708T DE60237708T DE60237708D1 DE 60237708 D1 DE60237708 D1 DE 60237708D1 DE 60237708 T DE60237708 T DE 60237708T DE 60237708 T DE60237708 T DE 60237708T DE 60237708 D1 DE60237708 D1 DE 60237708D1
- Authority
- DE
- Germany
- Prior art keywords
- switch
- bits
- fll circuit
- bit
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
- H04J3/0623—Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Time-Division Multiplex Systems (AREA)
- Communication Control (AREA)
- Dc Digital Transmission (AREA)
- Bidirectional Digital Transmission (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
- Image Analysis (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NO20016328A NO20016328D0 (no) | 2001-12-21 | 2001-12-21 | Fremgangsmåte og arrangement for transmisjon av bitströmmer gjennom en datanode |
PCT/NO2002/000487 WO2003056436A1 (en) | 2001-12-21 | 2002-12-18 | Rate adaptation within a tdm switch using bit stuffing |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60237708D1 true DE60237708D1 (de) | 2010-10-28 |
Family
ID=19913181
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60237708T Expired - Lifetime DE60237708D1 (de) | 2001-12-21 | 2002-12-18 | Ratenanpassung in einer tdm-vermittlung durch verwendung von bit-stopfung |
Country Status (7)
Country | Link |
---|---|
US (1) | US7372862B2 (de) |
EP (2) | EP1459186B1 (de) |
AT (1) | ATE481681T1 (de) |
AU (1) | AU2002353672A1 (de) |
DE (1) | DE60237708D1 (de) |
NO (1) | NO20016328D0 (de) |
WO (1) | WO2003056436A1 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101326750B (zh) * | 2005-12-22 | 2012-06-20 | 日本电信电话株式会社 | 光传输系统及方法 |
US7869343B1 (en) * | 2006-06-05 | 2011-01-11 | Altera Corporation | Field programmable gate array architectures and methods for supporting forward error correction |
US7802013B2 (en) * | 2008-03-19 | 2010-09-21 | Inventec Corporation | Method for transmitting data |
CN107040327B (zh) * | 2017-06-14 | 2019-04-02 | 深圳市华信天线技术有限公司 | 主从机tdma时隙同步校准方法及装置 |
US11388699B2 (en) * | 2020-03-25 | 2022-07-12 | Kabushiki Kaisha Toshiba | Communication between network nodes |
Family Cites Families (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3942883A1 (de) * | 1989-12-23 | 1991-06-27 | Philips Patentverwaltung | Schaltungsanordnung zur bitratenanpassung |
CA2019649C (en) | 1990-06-22 | 2000-05-02 | Denis Gallant | Digital data transmission system |
US5208810A (en) * | 1990-10-10 | 1993-05-04 | Seiko Corp. | Method of data flow control |
US5544324A (en) | 1992-11-02 | 1996-08-06 | National Semiconductor Corporation | Network for transmitting isochronous-source data using a frame structure with variable number of time slots to compensate for timing variance between reference clock and data rate |
US5535218A (en) * | 1994-06-03 | 1996-07-09 | Transwitch Corporation | Apparatus and method for limiting jitter in a telecommunications signal which is being mapped in another such signal by temporarily suspending measurement of available data |
JP3247571B2 (ja) * | 1994-06-09 | 2002-01-15 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 送信されたデータフレームの連続性を保持する方法、通信ノード内のアダプタ装置及びデータフレーム連続性保持装置 |
DE19509484A1 (de) | 1995-03-16 | 1996-09-19 | Deutsche Telekom Ag | Verfahren zur empfangsseitigen Taktrückgewinnung für Digitalsignale |
GB9601348D0 (en) | 1996-01-24 | 1996-03-27 | Madge Networks Ltd | Clock synchronisation |
US5898744A (en) | 1996-10-07 | 1999-04-27 | Motorola, Inc. | Apparatus and method for clock recovery in a communication system |
US6054942A (en) * | 1997-08-14 | 2000-04-25 | Cisco Technology, Inc. | System and method for scaleable encoding and decoding of variable bit frames |
US6266385B1 (en) * | 1997-12-23 | 2001-07-24 | Wireless Facilities, Inc. | Elastic store for wireless communication systems |
US6229863B1 (en) * | 1998-11-02 | 2001-05-08 | Adc Telecommunications, Inc. | Reducing waiting time jitter |
US6233250B1 (en) * | 1998-11-13 | 2001-05-15 | Integrated Telecom Express, Inc. | System and method for reducing latency in software modem for high-speed synchronous transmission |
US6249756B1 (en) * | 1998-12-07 | 2001-06-19 | Compaq Computer Corp. | Hybrid flow control |
IL131461A0 (en) * | 1999-08-18 | 2001-01-28 | Eci Telecom Ltd | Inter-chip port and method for supporting high rate data streams in sdh and sonet transport networks |
US6819725B1 (en) * | 2000-08-21 | 2004-11-16 | Pmc-Sierra, Inc. | Jitter frequency shifting Δ-Σ modulated signal synchronization mapper |
DE10062640B4 (de) * | 2000-12-15 | 2006-11-02 | Infineon Technologies Ag | Verfahren zur zeitlichen Steuerung der Ausgabe von Datenpaketen aus Netzknoten, Netzknoten und konfiguriertes Netz |
US7366270B2 (en) * | 2000-12-20 | 2008-04-29 | Primarion, Inc. | PLL/DLL dual loop data synchronization utilizing a granular FIFO fill level indicator |
US7230917B1 (en) * | 2001-02-22 | 2007-06-12 | Cisco Technology, Inc. | Apparatus and technique for conveying per-channel flow control information to a forwarding engine of an intermediate network node |
US6510166B2 (en) * | 2001-03-31 | 2003-01-21 | Redback Networks, Inc. | Stuffing filter mechanism for data transmission signals |
US7149186B1 (en) * | 2001-12-20 | 2006-12-12 | Cisco Technology, Inc. | Apparatus and method for rate adaptation control |
-
2001
- 2001-12-21 NO NO20016328A patent/NO20016328D0/no unknown
-
2002
- 2002-12-18 US US10/497,858 patent/US7372862B2/en not_active Expired - Fee Related
- 2002-12-18 EP EP02789031A patent/EP1459186B1/de not_active Expired - Lifetime
- 2002-12-18 AT AT02789031T patent/ATE481681T1/de not_active IP Right Cessation
- 2002-12-18 EP EP09173943A patent/EP2169858A3/de not_active Withdrawn
- 2002-12-18 DE DE60237708T patent/DE60237708D1/de not_active Expired - Lifetime
- 2002-12-18 AU AU2002353672A patent/AU2002353672A1/en not_active Abandoned
- 2002-12-18 WO PCT/NO2002/000487 patent/WO2003056436A1/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
AU2002353672A1 (en) | 2003-07-15 |
NO20016328D0 (no) | 2001-12-21 |
EP1459186A1 (de) | 2004-09-22 |
EP2169858A2 (de) | 2010-03-31 |
EP1459186B1 (de) | 2010-09-15 |
EP2169858A3 (de) | 2010-05-12 |
WO2003056436A1 (en) | 2003-07-10 |
US20050002336A1 (en) | 2005-01-06 |
ATE481681T1 (de) | 2010-10-15 |
US7372862B2 (en) | 2008-05-13 |
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