DE60226634D1 - Segmentierte schreibleitungsarchitektur - Google Patents

Segmentierte schreibleitungsarchitektur

Info

Publication number
DE60226634D1
DE60226634D1 DE60226634T DE60226634T DE60226634D1 DE 60226634 D1 DE60226634 D1 DE 60226634D1 DE 60226634 T DE60226634 T DE 60226634T DE 60226634 T DE60226634 T DE 60226634T DE 60226634 D1 DE60226634 D1 DE 60226634D1
Authority
DE
Germany
Prior art keywords
segmented writing
writing architecture
architecture
segmented
writing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60226634T
Other languages
English (en)
Inventor
Christian Arndt
Stefan Lammers
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Qimonda AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qimonda AG filed Critical Qimonda AG
Application granted granted Critical
Publication of DE60226634D1 publication Critical patent/DE60226634D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1657Word-line or row circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1659Cell access
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1675Writing or programming circuits or methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)
DE60226634T 2001-12-13 2002-12-13 Segmentierte schreibleitungsarchitektur Expired - Fee Related DE60226634D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/016,859 US6594191B2 (en) 2001-12-13 2001-12-13 Segmented write line architecture
PCT/EP2002/014230 WO2003050817A2 (en) 2001-12-13 2002-12-13 Segmented write line architecture

Publications (1)

Publication Number Publication Date
DE60226634D1 true DE60226634D1 (de) 2008-06-26

Family

ID=21779381

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60226634T Expired - Fee Related DE60226634D1 (de) 2001-12-13 2002-12-13 Segmentierte schreibleitungsarchitektur

Country Status (8)

Country Link
US (1) US6594191B2 (de)
EP (1) EP1454324B1 (de)
JP (1) JP3905084B2 (de)
KR (1) KR100614716B1 (de)
CN (1) CN1605106A (de)
DE (1) DE60226634D1 (de)
TW (1) TWI225653B (de)
WO (1) WO2003050817A2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6903982B2 (en) * 2002-10-10 2005-06-07 Infineon Technologies Ag Bit line segmenting in random access memories
US6791873B1 (en) * 2003-09-08 2004-09-14 Hewlett-Packard Development Company, L.P. Apparatus and method for generating a write current for a magnetic memory cell
US6972989B2 (en) * 2003-10-10 2005-12-06 Infincon Technologies Ag Reference current distribution in MRAM devices
US7166881B2 (en) * 2003-10-13 2007-01-23 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-sensing level MRAM structures
US7495722B2 (en) * 2003-12-15 2009-02-24 Genoa Color Technologies Ltd. Multi-color liquid crystal display
US6946698B1 (en) 2004-04-02 2005-09-20 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM device having low-k inter-metal dielectric
US7099176B2 (en) * 2004-04-19 2006-08-29 Taiwan Semiconductor Manufacturing Company, Ltd. Non-orthogonal write line structure in MRAM
US7265053B2 (en) * 2004-04-26 2007-09-04 Taiwan Semiconductor Manufacturing Company, Ltd. Trench photolithography rework for removal of photoresist residue
US20060039183A1 (en) * 2004-05-21 2006-02-23 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-sensing level MRAM structures
US7027324B2 (en) * 2004-06-09 2006-04-11 Headway Technologies, Inc. Method and system for providing common read and write word lines for a segmented word line MRAM array
US7209383B2 (en) * 2004-06-16 2007-04-24 Stmicroelectronics, Inc. Magnetic random access memory array having bit/word lines for shared write select and read operations
FR2871921A1 (fr) * 2004-06-16 2005-12-23 St Microelectronics Sa Architecture de memoire a lignes d'ecriture segmentees
US7372728B2 (en) * 2004-06-16 2008-05-13 Stmicroelectronics, Inc. Magnetic random access memory array having bit/word lines for shared write select and read operations
US7136298B2 (en) * 2004-06-30 2006-11-14 Stmicroelectronics, Inc. Magnetic random access memory array with global write lines
US7079415B2 (en) * 2004-06-30 2006-07-18 Stmicroelectronics, Inc. Magnetic random access memory element
US7106621B2 (en) * 2004-06-30 2006-09-12 Stmicroelectronics, Inc. Random access memory array with parity bit structure
US7301800B2 (en) * 2004-06-30 2007-11-27 Stmicroelectronics, Inc. Multi-bit magnetic random access memory element
US7221584B2 (en) * 2004-08-13 2007-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM cell having shared configuration
US7170775B2 (en) * 2005-01-06 2007-01-30 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM cell with reduced write current
US7715224B2 (en) 2007-04-16 2010-05-11 Magic Technologies, Inc. MRAM with enhanced programming margin
US7791976B2 (en) 2008-04-24 2010-09-07 Qualcomm Incorporated Systems and methods for dynamic power savings in electronic memory operation

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100451096B1 (ko) * 2000-09-19 2004-10-02 엔이씨 일렉트로닉스 가부시키가이샤 자기메모리셀어레이를 갖는 비휘발성 반도체메모리장치
US6335890B1 (en) * 2000-11-01 2002-01-01 International Business Machines Corporation Segmented write line architecture for writing magnetic random access memories

Also Published As

Publication number Publication date
US20030112654A1 (en) 2003-06-19
EP1454324B1 (de) 2008-05-14
CN1605106A (zh) 2005-04-06
KR100614716B1 (ko) 2006-08-21
TWI225653B (en) 2004-12-21
KR20040068221A (ko) 2004-07-30
JP3905084B2 (ja) 2007-04-18
US6594191B2 (en) 2003-07-15
JP2005512269A (ja) 2005-04-28
WO2003050817A3 (en) 2004-03-04
TW200301899A (en) 2003-07-16
WO2003050817A2 (en) 2003-06-19
EP1454324A2 (de) 2004-09-08

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee