DE60221407D1 - Speichersystem und Speichersubsystem - Google Patents

Speichersystem und Speichersubsystem

Info

Publication number
DE60221407D1
DE60221407D1 DE60221407T DE60221407T DE60221407D1 DE 60221407 D1 DE60221407 D1 DE 60221407D1 DE 60221407 T DE60221407 T DE 60221407T DE 60221407 T DE60221407 T DE 60221407T DE 60221407 D1 DE60221407 D1 DE 60221407D1
Authority
DE
Germany
Prior art keywords
storage
subsystem
storage system
storage subsystem
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60221407T
Other languages
English (en)
Other versions
DE60221407T2 (de
Inventor
Maksim Kuzmenka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Qimonda AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of DE60221407D1 publication Critical patent/DE60221407D1/de
Application granted granted Critical
Publication of DE60221407T2 publication Critical patent/DE60221407T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/147Structural association of two or more printed circuits at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/148Arrangements of two or more hingeably connected rigid printed circuit boards, i.e. connected by flexible means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/04Assemblies of printed circuits
    • H05K2201/044Details of backplane or midplane for mounting orthogonal PCBs
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/222Completing of printed circuits by adding non-printed jumper connections

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
DE60221407T 2002-11-21 2002-11-21 Speichersystem und Speichersubsystem Expired - Fee Related DE60221407T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02026015A EP1422717B1 (de) 2002-11-21 2002-11-21 Speichersystem und Speichersubsystem

Publications (2)

Publication Number Publication Date
DE60221407D1 true DE60221407D1 (de) 2007-09-06
DE60221407T2 DE60221407T2 (de) 2008-08-07

Family

ID=32187184

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60221407T Expired - Fee Related DE60221407T2 (de) 2002-11-21 2002-11-21 Speichersystem und Speichersubsystem

Country Status (3)

Country Link
US (1) US7035116B2 (de)
EP (1) EP1422717B1 (de)
DE (1) DE60221407T2 (de)

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KR100539237B1 (ko) * 2003-06-19 2005-12-27 삼성전자주식회사 메모리 모듈 또는 소켓에 장착되는 종단 제공장치 및 이를이용하는 메모리 시스템
US7227759B2 (en) * 2004-04-01 2007-06-05 Silicon Pipe, Inc. Signal-segregating connector system
US7336098B2 (en) * 2004-06-30 2008-02-26 Intel Corporation High speed memory modules utilizing on-pin capacitors
US7151683B2 (en) * 2004-06-30 2006-12-19 Intel Corporation High speed memory modules utilizing on-trace capacitors
US20060056214A1 (en) * 2004-08-25 2006-03-16 Ocz Technologies, Inc. Memory module with reduced input clock skew
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US7609567B2 (en) 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
JP5242397B2 (ja) 2005-09-02 2013-07-24 メタラム インコーポレイテッド Dramをスタックする方法及び装置
KR101131919B1 (ko) 2005-12-09 2012-04-03 삼성전자주식회사 메모리 시스템 및 이 시스템의 신호 송수신 방법
US7405949B2 (en) * 2005-12-09 2008-07-29 Samsung Electronics Co., Ltd. Memory system having point-to-point (PTP) and point-to-two-point (PTTP) links between devices
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
TWI353810B (en) * 2008-09-17 2011-12-01 Asustek Comp Inc Motherboard
JP2010079445A (ja) * 2008-09-24 2010-04-08 Toshiba Corp Ssd装置
US8503211B2 (en) 2009-05-22 2013-08-06 Mosaid Technologies Incorporated Configurable module and memory subsystem
WO2010144624A1 (en) 2009-06-09 2010-12-16 Google Inc. Programming of dimm termination resistance values
US9475694B2 (en) * 2013-01-14 2016-10-25 Analog Devices Global Two-axis vertical mount package assembly
JP2014157535A (ja) * 2013-02-18 2014-08-28 Micron Technology Inc 半導体装置およびメモリモジュール
CN115757216A (zh) * 2021-09-03 2023-03-07 戴尔产品有限公司 具有电容器模块的存储驱动器

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02250388A (ja) * 1989-03-24 1990-10-08 Nec Corp 混成集積回路
US5355105A (en) * 1993-04-12 1994-10-11 Angelucci Sr Thomas L Multi-layer flexible printed circuit and method of making same
JP4569912B2 (ja) * 2000-03-10 2010-10-27 エルピーダメモリ株式会社 メモリシステム
KR100340285B1 (ko) * 2000-10-24 2002-06-15 윤종용 복수의 인쇄회로기판이 상호 직렬 접속된 메모리 모듈
US6483713B2 (en) * 2001-11-20 2002-11-19 St. Jude Children's Research Hospital Multilayered board comprising folded flexible circuits
US6721189B1 (en) * 2002-03-13 2004-04-13 Rambus, Inc. Memory module

Also Published As

Publication number Publication date
US20040125635A1 (en) 2004-07-01
EP1422717B1 (de) 2007-07-25
US7035116B2 (en) 2006-04-25
EP1422717A1 (de) 2004-05-26
DE60221407T2 (de) 2008-08-07

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

8332 No legal effect for de
8370 Indication of lapse of patent is to be deleted
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee