DE60215833D1 - Mehrkanalschnittstelle für die kommunikation zwischen einrichtungen - Google Patents

Mehrkanalschnittstelle für die kommunikation zwischen einrichtungen

Info

Publication number
DE60215833D1
DE60215833D1 DE60215833T DE60215833T DE60215833D1 DE 60215833 D1 DE60215833 D1 DE 60215833D1 DE 60215833 T DE60215833 T DE 60215833T DE 60215833 T DE60215833 T DE 60215833T DE 60215833 D1 DE60215833 D1 DE 60215833D1
Authority
DE
Germany
Prior art keywords
coupled
facilities
communication
channel interface
channels
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60215833T
Other languages
English (en)
Other versions
DE60215833T2 (de
Inventor
Brian Mears
Mark Fullerton
Nicholas Kohout
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marvell World Trade Ltd
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE60215833D1 publication Critical patent/DE60215833D1/de
Application granted granted Critical
Publication of DE60215833T2 publication Critical patent/DE60215833T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4027Coupling between buses using bus bridges
    • G06F13/4045Coupling between buses using bus bridges where the bus bridge performs an extender function

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Communication Control (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)
  • Time-Division Multiplex Systems (AREA)
DE60215833T 2001-09-21 2002-09-12 Mehrkanalschnittstelle für die kommunikation zwischen einrichtungen Expired - Lifetime DE60215833T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US961024 2001-09-21
US09/961,024 US20030061431A1 (en) 2001-09-21 2001-09-21 Multiple channel interface for communications between devices
PCT/US2002/029075 WO2003027863A2 (en) 2001-09-21 2002-09-12 Multiple channel interface for communications between devices

Publications (2)

Publication Number Publication Date
DE60215833D1 true DE60215833D1 (de) 2006-12-14
DE60215833T2 DE60215833T2 (de) 2007-06-28

Family

ID=25503973

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60215833T Expired - Lifetime DE60215833T2 (de) 2001-09-21 2002-09-12 Mehrkanalschnittstelle für die kommunikation zwischen einrichtungen

Country Status (8)

Country Link
US (1) US20030061431A1 (de)
EP (1) EP1428131B1 (de)
CN (1) CN100345130C (de)
AT (1) ATE344491T1 (de)
AU (1) AU2002343366A1 (de)
DE (1) DE60215833T2 (de)
TW (1) TW565772B (de)
WO (1) WO2003027863A2 (de)

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US8667363B2 (en) * 2004-11-24 2014-03-04 Qualcomm Incorporated Systems and methods for implementing cyclic redundancy checks
US8692838B2 (en) * 2004-11-24 2014-04-08 Qualcomm Incorporated Methods and systems for updating a buffer
US8539119B2 (en) * 2004-11-24 2013-09-17 Qualcomm Incorporated Methods and apparatus for exchanging messages having a digital data interface device message format
US8699330B2 (en) * 2004-11-24 2014-04-15 Qualcomm Incorporated Systems and methods for digital data transmission rate control
US8723705B2 (en) * 2004-11-24 2014-05-13 Qualcomm Incorporated Low output skew double data rate serial encoder
US8873584B2 (en) 2004-11-24 2014-10-28 Qualcomm Incorporated Digital data interface device
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DE102005026436B4 (de) * 2005-06-08 2022-08-18 Austriamicrosystems Ag Schnittstellenanordnung, insbesondere für ein System-on-Chip, und deren Verwendung
US7603575B2 (en) * 2005-06-30 2009-10-13 Woodbridge Nancy G Frequency-dependent voltage control in digital logic
JP4499008B2 (ja) * 2005-09-15 2010-07-07 富士通マイクロエレクトロニクス株式会社 Dma転送システム
US8730069B2 (en) * 2005-11-23 2014-05-20 Qualcomm Incorporated Double data rate serial encoder
US8692839B2 (en) * 2005-11-23 2014-04-08 Qualcomm Incorporated Methods and systems for updating a buffer
US8516163B2 (en) * 2007-02-27 2013-08-20 Integrated Device Technology, Inc. Hardware-based concurrent direct memory access (DMA) engines on serial rapid input/output SRIO interface
US20080209089A1 (en) * 2007-02-27 2008-08-28 Integrated Device Technology, Inc. Packet-Based Parallel Interface Protocol For A Serial Buffer Having A Parallel Processor Port
US8094677B2 (en) * 2007-02-27 2012-01-10 Integrated Device Technology, Inc. Multi-bus structure for optimizing system performance of a serial buffer
US7617346B2 (en) * 2007-02-27 2009-11-10 Integrated Device Technology, Inc. Rapid input/output doorbell coalescing to minimize CPU utilization and reduce system interrupt latency
US7870313B2 (en) * 2007-02-27 2011-01-11 Integrated Device Technology, Inc. Method and structure to support system resource access of a serial device implementating a lite-weight protocol
WO2010027442A1 (en) * 2008-08-26 2010-03-11 Becton, Dickinson And Company Assay for chlamydia trachomatis by amplification and detection of chlamydia trachomatis cytotoxin gene
CN101442563A (zh) * 2008-12-17 2009-05-27 杭州华三通信技术有限公司 一种数据通信方法和一种以太网设备
US20100191995A1 (en) * 2009-01-26 2010-07-29 Koby Levy In-Band Sleep Protocol for Embedded Bus
US20120198005A1 (en) * 2011-02-02 2012-08-02 Research In Motion Limited Communication device and method for determining and processing contact profiles
WO2014028069A1 (en) * 2012-08-17 2014-02-20 Flextronics Ap, Llc Epg aggregation from multiple sources
US20150189390A1 (en) 2012-06-14 2015-07-02 Flextronics Ap, Llc Media center
US9747244B2 (en) 2013-11-22 2017-08-29 Qualcomm Incorporated Clockless virtual GPIO
US9619427B2 (en) 2014-04-21 2017-04-11 Qualcomm Incorporated Hybrid virtual GPIO
US10146727B2 (en) 2015-04-14 2018-12-04 Qualcomm Incorporated Enhanced virtual GPIO with multi-mode modulation
US10241953B2 (en) * 2015-08-07 2019-03-26 Qualcomm Incorporated Dynamic data-link selection over common physical interface
CN105975048A (zh) * 2016-05-05 2016-09-28 高靳旭 一种dsp芯片及其构造方法
US20180357076A1 (en) * 2017-06-12 2018-12-13 Qualcomm Incorporated Method to establish operating configuration in a vgmi interface
US10515044B2 (en) * 2017-11-01 2019-12-24 Qualcomm Incorporated Communicating heterogeneous virtual general-purpose input/output messages over an I3C bus
CN112821156B (zh) * 2021-02-02 2023-01-06 深圳慧能泰半导体科技有限公司 一种电子标签芯片与type-c数据线
CN115632903B (zh) * 2022-09-22 2024-05-31 珠海格力电器股份有限公司 一种虚拟外设通信总线控制方法、装置及计算机设备

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Also Published As

Publication number Publication date
WO2003027863A3 (en) 2003-07-31
EP1428131A2 (de) 2004-06-16
US20030061431A1 (en) 2003-03-27
EP1428131B1 (de) 2006-11-02
CN1556956A (zh) 2004-12-22
AU2002343366A1 (en) 2003-04-07
TW565772B (en) 2003-12-11
CN100345130C (zh) 2007-10-24
ATE344491T1 (de) 2006-11-15
WO2003027863A2 (en) 2003-04-03
DE60215833T2 (de) 2007-06-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: MARVELL WORLD TRADE LTD., ST. MICHAEL, BB