DE602004012096D1 - Verfahren und vorrichtung für eine hadwareimplementierung der schlüsselexpansionsfunktion mit wenig speicher - Google Patents

Verfahren und vorrichtung für eine hadwareimplementierung der schlüsselexpansionsfunktion mit wenig speicher

Info

Publication number
DE602004012096D1
DE602004012096D1 DE602004012096T DE602004012096T DE602004012096D1 DE 602004012096 D1 DE602004012096 D1 DE 602004012096D1 DE 602004012096 T DE602004012096 T DE 602004012096T DE 602004012096 T DE602004012096 T DE 602004012096T DE 602004012096 D1 DE602004012096 D1 DE 602004012096D1
Authority
DE
Germany
Prior art keywords
key
key expansion
memory
expansion function
expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004012096T
Other languages
English (en)
Other versions
DE602004012096T2 (de
Inventor
Bonnie C Sexton
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Publication of DE602004012096D1 publication Critical patent/DE602004012096D1/de
Application granted granted Critical
Publication of DE602004012096T2 publication Critical patent/DE602004012096T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H04L2209/122—Hardware reduction or efficient architectures
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry
    • H04L2209/125—Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Communication Control (AREA)
  • Input From Keyboards Or The Like (AREA)
DE602004012096T 2003-05-23 2004-05-19 Verfahren und vorrichtung für eine hadwareimplementierung der schlüsselexpansionsfunktion mit wenig speicher Expired - Lifetime DE602004012096T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US47320903P 2003-05-23 2003-05-23
US473209P 2003-05-23
PCT/IB2004/001690 WO2004105306A1 (en) 2003-05-23 2004-05-19 Method and apparatus for a low memory hardware implementation of the key expansion function

Publications (2)

Publication Number Publication Date
DE602004012096D1 true DE602004012096D1 (de) 2008-04-10
DE602004012096T2 DE602004012096T2 (de) 2009-03-26

Family

ID=33476990

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004012096T Expired - Lifetime DE602004012096T2 (de) 2003-05-23 2004-05-19 Verfahren und vorrichtung für eine hadwareimplementierung der schlüsselexpansionsfunktion mit wenig speicher

Country Status (7)

Country Link
EP (1) EP1629626B1 (de)
JP (1) JP2007500376A (de)
KR (1) KR20060014420A (de)
CN (1) CN1795637B (de)
AT (1) ATE387773T1 (de)
DE (1) DE602004012096T2 (de)
WO (1) WO2004105306A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20050087271A (ko) * 2004-02-26 2005-08-31 삼성전자주식회사 가변 키 길이를 가지는 초기 라운드 키에 대응하는 암호라운드 키와 복호 라운드 키를 선택적으로 발생하는 키스케쥴 장치
JP4939305B2 (ja) * 2007-05-25 2012-05-23 ルネサスエレクトロニクス株式会社 暗号／復号装置
KR100949538B1 (ko) 2008-09-09 2010-03-25 한국전자통신연구원 Ａｅｓ 라인달 알고리즘을 이용하는 암호화 및 복호화 장치와 그 방법
CN101478392B (zh) * 2009-01-19 2010-12-08 山东大学 利用vlsi实现128位密钥长度aes算法的装置
KR101315683B1 (ko) * 2012-03-12 2013-12-13 이니텍(주) 데이터 사이즈 및 형태 변경이 없는 암호화 인코딩 및 복호화 인코딩 방법
US11838402B2 (en) 2019-03-13 2023-12-05 The Research Foundation For The State University Of New York Ultra low power core for lightweight encryption

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6947560B1 (en) * 1999-04-26 2005-09-20 Telefonaktiebolaget L M Ericsson (Publ) Method and device for effective key length control
KR100525389B1 (ko) * 2001-01-17 2005-11-02 엘지전자 주식회사 실시간 입력 스트림의 암호화／복호화 장치
EP1246389B1 (de) * 2001-03-27 2005-01-05 Amphion Semiconductor Limited Vorrichtung zur wählbaren Ver- bzw. Entschlüsselung von Daten
GB0121793D0 (en) * 2001-09-08 2001-10-31 Amphion Semiconductor Ltd An apparatus for generating encryption/decryption keys

Also Published As

Publication number Publication date
EP1629626A1 (de) 2006-03-01
DE602004012096T2 (de) 2009-03-26
ATE387773T1 (de) 2008-03-15
CN1795637A (zh) 2006-06-28
WO2004105306A1 (en) 2004-12-02
JP2007500376A (ja) 2007-01-11
CN1795637B (zh) 2011-06-01
KR20060014420A (ko) 2006-02-15
EP1629626B1 (de) 2008-02-27

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