DE602004008904D1 - Vorrichtung zur digitalen Signalverarbeitung unter Verwendung der CSD Darstellung - Google Patents
Vorrichtung zur digitalen Signalverarbeitung unter Verwendung der CSD DarstellungInfo
- Publication number
- DE602004008904D1 DE602004008904D1 DE602004008904T DE602004008904T DE602004008904D1 DE 602004008904 D1 DE602004008904 D1 DE 602004008904D1 DE 602004008904 T DE602004008904 T DE 602004008904T DE 602004008904 T DE602004008904 T DE 602004008904T DE 602004008904 D1 DE602004008904 D1 DE 602004008904D1
- Authority
- DE
- Germany
- Prior art keywords
- signal processing
- digital signal
- csd representation
- csd
- representation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/52—Multiplying; Dividing
- G06F7/523—Multiplying only
- G06F7/533—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even
- G06F7/5332—Reduction of the number of iteration steps or stages, e.g. using the Booth algorithm, log-sum, odd-even by skipping over strings of zeroes or ones, e.g. using the Booth Algorithm
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/4824—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices using signed-digit representation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/02—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word
- H03M7/04—Conversion to or from weighted codes, i.e. the weight given to a digit depending on the position of the digit within the block or code word the radix thereof being two
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/499—Denomination or exception handling, e.g. rounding or overflow
- G06F7/49994—Sign extension
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
- G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
- G06F7/50—Adding; Subtracting
- G06F7/505—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination
- G06F7/506—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages
- G06F7/508—Adding; Subtracting in bit-parallel fashion, i.e. having a different digit-handling circuit for each denomination with simultaneous carry generation for, or propagation over, two or more stages using carry look-ahead circuits
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04016429A EP1617324B1 (de) | 2004-07-13 | 2004-07-13 | Vorrichtung zur digitalen Signalverarbeitung unter Verwendung der CSD Darstellung |
Publications (1)
Publication Number | Publication Date |
---|---|
DE602004008904D1 true DE602004008904D1 (de) | 2007-10-25 |
Family
ID=34925735
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE602004008904T Active DE602004008904D1 (de) | 2004-07-13 | 2004-07-13 | Vorrichtung zur digitalen Signalverarbeitung unter Verwendung der CSD Darstellung |
Country Status (3)
Country | Link |
---|---|
US (1) | US7711761B2 (de) |
EP (1) | EP1617324B1 (de) |
DE (1) | DE602004008904D1 (de) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006102259A2 (en) * | 2005-03-23 | 2006-09-28 | Shell Internationale Research Maatschappij B.V. | Underwater structure monitoring systems and methods |
DE602006007828D1 (de) * | 2005-03-31 | 2009-08-27 | Nxp Bv | Kanonisch gezeichneter digitaler multiplikator |
FR2908905A1 (fr) * | 2006-11-20 | 2008-05-23 | R L Daniel Torno Sa | Procede et circuit multiplieur de nombres binaires |
KR100852220B1 (ko) * | 2006-12-08 | 2008-08-13 | 한국전자통신연구원 | 가변길이 다중비트 코딩을 이용하여 최소 부호수를 구하는방법 |
RU2455760C2 (ru) * | 2010-08-03 | 2012-07-10 | Лев Петрович Петренко | СПОСОБ ПРЕОБРАЗОВАНИЯ ПОЗИЦИОННО-ЗНАКОВЫХ СТРУКТУР +[ni]f(2n) И -[ni]f(2n) АРГУМЕНТОВ АНАЛОГОВЫХ СИГНАЛОВ В СТРУКТУРУ АРГУМЕНТОВ АНАЛОГОВЫХ СИГНАЛОВ ±[ni]f(2n) - "ДОПОЛНИТЕЛЬНЫЙ КОД" С ПРИМЕНЕНИЕМ АРИФМЕТИЧЕСКИХ АКСИОМ ТРОИЧНОЙ СИСТЕМЫ СЧИСЛЕНИЯ f(+1, 0, -1) (ВАРИАНТЫ РУССКОЙ ЛОГИКИ) |
RU2503123C1 (ru) * | 2012-05-21 | 2013-12-27 | Лев Петрович Петренко | СПОСОБ ПРЕОБРАЗОВАНИЯ «-/+»[mj]f(+/-) → ±[mj]f(+/-)min СТРУКТУРЫ АРГУМЕНТОВ АНАЛОГОВЫХ ЛОГИЧЕСКИХ СИГНАЛОВ «-/+»[mj]f(+/-) - "ДОПОЛНИТЕЛЬНЫЙ КОД" В УСЛОВНО МИНИМИЗИРОВАННУЮ ПОЗИЦИОННО-ЗНАКОВУЮ СТРУКТУРУ АРГУМЕНТОВ ±[mj]f(+/-)min ТРОИЧНОЙ СИСТЕМЫ СЧИСЛЕНИЯ f(+1,0,-1) И ФУНКЦИОНАЛЬНАЯ СТРУКТУРА ДЛЯ ЕГО РЕАЛИЗАЦИИ (ВАРИАНТЫ РУССКОЙ ЛОГИКИ) |
RU2503124C1 (ru) * | 2012-05-21 | 2013-12-27 | Лев Петрович Петренко | СПОСОБ ФОРМИРОВАНИЯ В "k" "ЗОНЕ МИНИМИЗАЦИИ" РЕЗУЛЬТИРУЮЩЕГО АРГУМЕНТА +1mk СКВОЗНОЙ АКТИВИЗАЦИИ f1( 00)min → +1mk ДЛЯ ПРЕОБРАЗОВАНИЯ В СООТВЕТСТВИИ С АРИФМЕТИЧЕСКИМИ АКСИОМАМИ ТРОИЧНОЙ СИСТЕМЫ СЧИСЛЕНИЯ f(+1,0,-1) СТРУКТУРЫ АРГУМЕНТОВ АНАЛОГОВЫХ СИГНАЛОВ «-/+»[mj]f(+/-), "ДОПОЛНИТЕЛЬНЫЙ КОД" В СТРУКТУРУ УСЛОВНО МИНИМИЗИРОВАННЫХ ПОЗИЦИОННО-ЗНАКОВЫХ АРГУМЕНТОВ АНАЛОГОВЫХ СИГНАЛОВ ±[mj]fусл(+/-)min И ФУНКЦИОНАЛЬНАЯ СТРУКТУРА ДЛЯ ЕГО РЕАЛИЗАЦИИ (ВАРИАНТЫ РУССКОЙ ЛОГИКИ) |
RU2507682C2 (ru) * | 2012-05-21 | 2014-02-20 | Лев Петрович Петренко | СПОСОБ СКВОЗНОЙ АКТИВИЗАЦИИ f1( 11)min → ±0mk НЕАКТИВНЫХ АРГУМЕНТОВ "±0" → "+1/-1" АНАЛОГОВЫХ СИГНАЛОВ В "ЗОНАХ МИНИМИЗАЦИИ" СТРУКТУРЫ "-/+" [mj]f(+/-) - "ДОПОЛНИТЕЛЬНЫЙ КОД" В СООТВЕТСТВИИ С АРИФМЕТИЧЕСКОЙ АКСИОМОЙ ТРОИЧНОЙ СИСТЕМЫ СЧИСЛЕНИЯ f(+1,0,-1) ПРИ ФОРМИРОВАНИИ АРГУМЕНТОВ АНАЛОГОВЫХ СИГНАЛОВ В ПОЗИЦИОННО-ЗНАКОВОЙ УСЛОВНО МИНИМИЗИРОВАННОЙ ЕЕ СТРУКТУРЕ ±[mj]fусл(+/-)min (ВАРИАНТЫ РУССКОЙ ЛОГИКИ) |
RU2502184C1 (ru) * | 2012-05-21 | 2013-12-20 | Лев Петрович Петренко | СПОСОБ ПРЕОБРАЗОВАНИЯ СТРУКТУРЫ АРГУМЕНТОВ АНАЛОГОВЫХ ЛОГИЧЕСКИХ НАПРЯЖЕНИЙ «-/+»[mj]f(+/-) - "ДОПОЛНИТЕЛЬНЫЙ КОД" В ПОЗИЦИОННО-ЗНАКОВУЮ СТРУКТУРУ МИНИМИЗИРОВАННЫХ АРГУМЕНТОВ ЛОГИЧЕСКИХ НАПРЯЖЕНИЙ ±[mj]f(+/-)min И ФУНКЦИОНАЛЬНАЯ СТРУКТУРА ДЛЯ ЕГО РЕАЛИЗАЦИИ (ВАРИАНТЫ РУССКОЙ ЛОГИКИ) |
JP6324264B2 (ja) * | 2014-08-22 | 2018-05-16 | ルネサスエレクトロニクス株式会社 | 三値内積演算回路、三値内積演算処理プログラム、及び、三値内積演算回路による演算処理方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01195574A (ja) * | 1988-01-29 | 1989-08-07 | Nec Corp | ディジタル信号処理装置 |
KR100248021B1 (ko) * | 1995-09-30 | 2000-03-15 | 윤종용 | Csd 필터의 신호처리방법과 그 회로 |
DE60021623T2 (de) * | 2000-10-16 | 2006-06-01 | Nokia Corp. | Multiplizierer und verschiebungsanordnung mit benutzung von vorzeichenzifferzahlen darstellung |
-
2004
- 2004-07-13 DE DE602004008904T patent/DE602004008904D1/de active Active
- 2004-07-13 EP EP04016429A patent/EP1617324B1/de not_active Expired - Fee Related
-
2005
- 2005-07-11 US US11/179,027 patent/US7711761B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20060020653A1 (en) | 2006-01-26 |
EP1617324B1 (de) | 2007-09-12 |
US7711761B2 (en) | 2010-05-04 |
EP1617324A1 (de) | 2006-01-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de |