DE60125360D1 - Abfrageprüfgerät, das Überabtastung zur Synchronisierung verwendet - Google Patents

Abfrageprüfgerät, das Überabtastung zur Synchronisierung verwendet

Info

Publication number
DE60125360D1
DE60125360D1 DE60125360T DE60125360T DE60125360D1 DE 60125360 D1 DE60125360 D1 DE 60125360D1 DE 60125360 T DE60125360 T DE 60125360T DE 60125360 T DE60125360 T DE 60125360T DE 60125360 D1 DE60125360 D1 DE 60125360D1
Authority
DE
Germany
Prior art keywords
synchronization
uses oversampling
query checker
checker
query
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60125360T
Other languages
English (en)
Inventor
Robert Geoffrey Warren
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics Ltd Great Britain
Original Assignee
SGS Thomson Microelectronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics Ltd filed Critical SGS Thomson Microelectronics Ltd
Application granted granted Critical
Publication of DE60125360D1 publication Critical patent/DE60125360D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318552—Clock circuits details
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
DE60125360T 2001-09-18 2001-09-18 Abfrageprüfgerät, das Überabtastung zur Synchronisierung verwendet Expired - Lifetime DE60125360D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01307925A EP1293790B1 (de) 2001-09-18 2001-09-18 Abfrageprüfgerät, das Überabtastung zur Synchronisierung verwendet

Publications (1)

Publication Number Publication Date
DE60125360D1 true DE60125360D1 (de) 2007-02-01

Family

ID=8182273

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60125360T Expired - Lifetime DE60125360D1 (de) 2001-09-18 2001-09-18 Abfrageprüfgerät, das Überabtastung zur Synchronisierung verwendet

Country Status (3)

Country Link
US (1) US7489724B2 (de)
EP (1) EP1293790B1 (de)
DE (1) DE60125360D1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1544632B1 (de) * 2003-12-17 2008-08-27 STMicroelectronics (Research & Development) Limited TAP-Daten-Transfer mit doppelter Daten-Rate
US7071738B1 (en) * 2004-06-24 2006-07-04 Xilinx, Inc. Glitchless clock selection circuit using phase detection switching
EP1912411B1 (de) * 2006-10-12 2010-03-31 Koninklijke KPN N.V. Verfahren und System zur Vorbereitung von Dienstleistungen von einer Zugangsvorrichtung in einem heimischen Netzwerk
TW200835178A (en) * 2007-02-02 2008-08-16 Smedia Technology Corp Multi-sampling data recovery circuit and method applicable to receiver
US7949917B2 (en) * 2007-12-13 2011-05-24 Texas Instruments Incorporated Maintaining data coherency in multi-clock systems
JP2009147869A (ja) * 2007-12-18 2009-07-02 Ricoh Co Ltd 同期化回路
US8248105B2 (en) * 2010-02-16 2012-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Smart edge detector

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1014585B (it) * 1974-04-11 1977-04-30 Sits Soc It Telecom Siemens Disposizione circuitale per la cor rezione dell errore di scorrimento nei sistemi di trasmissione a codi ce di impulsi
US3974333A (en) * 1975-09-24 1976-08-10 Bell Telephone Laboratories, Incorporated Adaptive synchronization system
FR2685594B1 (fr) * 1991-12-19 1994-01-28 Alcatel Telspace Dispositif de recuperation de rythme pour installation de reception utilisant l'egalisation auto-adaptative a sur-echantillonnage associee a la demodulation differentiellement coherente.
WO1995001021A1 (en) * 1993-06-25 1995-01-05 Xircom, Incorporated Nrz clock recovery with instant lock
US5714904A (en) * 1994-06-06 1998-02-03 Sun Microsystems, Inc. High speed serial link for fully duplexed data communication
US5529068A (en) * 1994-06-16 1996-06-25 The Regents Of The University Of California Synchronized digital signal processor for MRI reception
US5539784A (en) * 1994-09-30 1996-07-23 At&T Corp. Refined timing recovery circuit
GB9622685D0 (en) 1996-10-31 1997-01-08 Sgs Thomson Microelectronics An integrated circuit device and method of communication therewith
GB9622686D0 (en) 1996-10-31 1997-01-08 Sgs Thomson Microelectronics A test port controller and a method of effecting communication using the same
US6154509A (en) * 1998-01-16 2000-11-28 Natural Microsystems Corp. Data phase recovery system
US6047021A (en) * 1998-04-16 2000-04-04 Grimes; James E. Methods and apparatus for exchanging data
GB9810512D0 (en) * 1998-05-15 1998-07-15 Sgs Thomson Microelectronics Detecting communication errors across a chip boundary
US6463092B1 (en) * 1998-09-10 2002-10-08 Silicon Image, Inc. System and method for sending and receiving data signals over a clock signal line
US6895062B1 (en) * 1999-03-24 2005-05-17 International Business Machines Corporation High speed serial interface
GB9907254D0 (en) 1999-03-29 1999-05-26 Sgs Thomson Microelectronics Synchronous data adaptor
US6651200B1 (en) * 1999-06-04 2003-11-18 Acculogic, Inc. Method and apparatus for adaptive clocking for boundary scan testing and device programming
US6553087B1 (en) * 2000-05-04 2003-04-22 2Wire, Inc. Interpolating bandpass filter for packet-data receiver synchronization
US6714612B1 (en) * 2000-06-08 2004-03-30 Sun Microsystems, Inc. Method and device for synchronization of phase mismatch in communication systems employing a common clock period
KR100346837B1 (ko) * 2000-09-02 2002-08-03 삼성전자 주식회사 클럭 스큐에 의한 에러를 최소화하는 데이타 복원 장치 및그 방법
US6907096B1 (en) * 2000-09-29 2005-06-14 Intel Corporation Data recovery method and apparatus
US6704882B2 (en) * 2001-01-22 2004-03-09 Mayo Foundation For Medical Education And Research Data bit-to-clock alignment circuit with first bit capture capability

Also Published As

Publication number Publication date
US20030068000A1 (en) 2003-04-10
EP1293790B1 (de) 2006-12-20
US7489724B2 (en) 2009-02-10
EP1293790A1 (de) 2003-03-19

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Legal Events

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