DE60031101T2 - Tastverhältniskorrektur für einen zufallszahlengenerator - Google Patents

Tastverhältniskorrektur für einen zufallszahlengenerator Download PDF

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Publication number
DE60031101T2
DE60031101T2 DE60031101T DE60031101T DE60031101T2 DE 60031101 T2 DE60031101 T2 DE 60031101T2 DE 60031101 T DE60031101 T DE 60031101T DE 60031101 T DE60031101 T DE 60031101T DE 60031101 T2 DE60031101 T2 DE 60031101T2
Authority
DE
Germany
Prior art keywords
bit
output
pair
circuit
bits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE60031101T
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German (de)
English (en)
Other versions
DE60031101D1 (de
Inventor
E. Steven El Dorado Hills WELLS
A. David Sacramento WARD
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of DE60031101D1 publication Critical patent/DE60031101D1/de
Publication of DE60031101T2 publication Critical patent/DE60031101T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/065—Encryption by serially and continuously modifying data stream elements, e.g. stream cipher systems, RC4, SEAL or A5/3
    • H04L9/0656—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher
    • H04L9/0662—Pseudorandom key sequence combined element-for-element with data sequence, e.g. one-time-pad [OTP] or Vernam's cipher with particular pseudorandom sequence generator
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/12—Details relating to cryptographic hardware or logic circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Storage Device Security (AREA)
  • Error Detection And Correction (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
DE60031101T 1999-03-31 2000-03-16 Tastverhältniskorrektur für einen zufallszahlengenerator Expired - Fee Related DE60031101T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US283096 1994-07-29
US09/283,096 US6643374B1 (en) 1999-03-31 1999-03-31 Duty cycle corrector for a random number generator
PCT/US2000/006916 WO2000059153A2 (en) 1999-03-31 2000-03-16 Duty cycle corrector for a random number generator

Publications (2)

Publication Number Publication Date
DE60031101D1 DE60031101D1 (de) 2006-11-16
DE60031101T2 true DE60031101T2 (de) 2007-05-10

Family

ID=23084499

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60031101T Expired - Fee Related DE60031101T2 (de) 1999-03-31 2000-03-16 Tastverhältniskorrektur für einen zufallszahlengenerator

Country Status (8)

Country Link
US (1) US6643374B1 (enExample)
EP (1) EP1166492B1 (enExample)
JP (1) JP4629876B2 (enExample)
AU (1) AU762617B2 (enExample)
DE (1) DE60031101T2 (enExample)
HK (1) HK1039846B (enExample)
TW (1) TW490967B (enExample)
WO (1) WO2000059153A2 (enExample)

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DE19914407A1 (de) * 1999-03-30 2000-10-05 Deutsche Telekom Ag Verfahren zur Ableitung von Identifikationsnummern
US6643374B1 (en) 1999-03-31 2003-11-04 Intel Corporation Duty cycle corrector for a random number generator
US6795837B1 (en) 1999-03-31 2004-09-21 Intel Corporation Programmable random bit source
US6792438B1 (en) 2000-03-31 2004-09-14 Intel Corporation Secure hardware random number generator
US6687721B1 (en) 2000-03-31 2004-02-03 Intel Corporation Random number generator with entropy accumulation
US7350083B2 (en) 2000-12-29 2008-03-25 Intel Corporation Integrated circuit chip having firmware and hardware security primitive device(s)
FR2821181A1 (fr) * 2001-02-22 2002-08-23 Schlumberger Systems & Service Procede de creation de valeurs aleatoires par un module associe a un microprocesseur
JP3732188B2 (ja) 2003-03-31 2006-01-05 Ｎｅｃマイクロシステム株式会社 擬似乱数発生回路
US7177888B2 (en) 2003-08-01 2007-02-13 Intel Corporation Programmable random bit source
US8229108B2 (en) * 2003-08-15 2012-07-24 Broadcom Corporation Pseudo-random number generation based on periodic sampling of one or more linear feedback shift registers
ATE374967T1 (de) 2003-08-22 2007-10-15 Univ Northwest Hardware-generator mit analogen und digitalen korrekturschaltungen zur erzeugung von gleichförmigen und gaussverteilten echten zufallszahlen
US7876866B1 (en) * 2005-01-27 2011-01-25 Pmc-Sierra Us, Inc. Data subset selection algorithm for reducing data-pattern autocorrelations
DE102005042135B3 (de) * 2005-09-05 2006-08-31 Infineon Technologies Ag Vorrichtung und Verfahren mit Computerprogramm zur Zufallszahlenerzeugung mit Schiefenregelung und algorithmischer Nachbearbeitung
US20090161246A1 (en) * 2007-12-23 2009-06-25 Hitachi Global Storage Technologies Netherlands, B.V. Random Number Generation Using Hard Disk Drive Information
MY146159A (en) * 2008-10-20 2012-06-29 Mimos Berhad Autocorrelation circuit for random number generator
US8489660B2 (en) 2009-06-26 2013-07-16 Intel Corporation Digital random number generator using partially entropic data
KR101139630B1 (ko) * 2010-12-09 2012-05-30 한양대학교 산학협력단 식별키 생성 장치 및 방법
US8788551B2 (en) 2011-11-15 2014-07-22 Seagate Technology Llc Random number generation using switching regulators
US9201630B2 (en) 2012-02-10 2015-12-01 Seagate Technology Llc Random number generation using startup variances
US11394530B2 (en) * 2017-11-01 2022-07-19 Gideon Samid RandoSol: randomness solutions

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Publication number Priority date Publication date Assignee Title
US3706941A (en) * 1970-10-28 1972-12-19 Atomic Energy Commission Random number generator
US3790768A (en) 1972-09-28 1974-02-05 Prayfel Inc Random number generator
US4355366A (en) * 1980-11-28 1982-10-19 Ncr Corporation Circuitry for minimizing auto-correlation and bias in a random number generator
US4694412A (en) 1982-09-22 1987-09-15 Intel Corporation Random number generator for use in an authenticated read-only memory
US4578649A (en) 1985-02-04 1986-03-25 Motorola, Inc. Random voltage source with substantially uniform distribution
US4791594A (en) 1986-03-28 1988-12-13 Technology Inc. 64 Random-access psuedo random number generator
US4810975A (en) 1987-08-10 1989-03-07 Dallas Semiconductor Corp. Random number generator using sampled output of variable frequency oscillator
US4855690A (en) 1987-08-10 1989-08-08 Dallas Semiconductor Corporation Integrated circuit random number generator using sampled output of variable frequency oscillator
DE4006251C1 (en) * 1990-02-28 1991-04-11 Ant Nachrichtentechnik Gmbh, 7150 Backnang, De Recognising periodicity in pseudo-stochastic sequence of bits - using comparison registers charged with different cycle and generating alarm if last bits of series correspond
US5007087A (en) * 1990-04-16 1991-04-09 Loral Aerospace Corp. Method and apparatus for generating secure random numbers using chaos
US5539828A (en) 1994-05-31 1996-07-23 Intel Corporation Apparatus and method for providing secured communications
US5473692A (en) 1994-09-07 1995-12-05 Intel Corporation Roving software license for a hardware agent
US5627775A (en) 1995-04-18 1997-05-06 Applied Computing Systems, Inc. Method and apparatus for generating random numbers using electrical noise
US5835594A (en) 1996-02-09 1998-11-10 Intel Corporation Methods and apparatus for preventing unauthorized write access to a protected non-volatile storage
US5706218A (en) 1996-05-15 1998-01-06 Intel Corporation Random number generator
US5778070A (en) 1996-06-28 1998-07-07 Intel Corporation Method and apparatus for protecting flash memory
US5844925A (en) 1996-07-17 1998-12-01 Ericsson Inc. Spiral scrambling
JP2000502822A (ja) 1996-08-16 2000-03-07 ベル コミュニケーションズ リサーチ，インコーポレイテッド 高速で安全な暗号化のための改良された暗号的に安全な疑似ランダム・ビット・ジェネレータ
US5844986A (en) 1996-09-30 1998-12-01 Intel Corporation Secure BIOS
US5828753A (en) 1996-10-25 1998-10-27 Intel Corporation Circuit and method for ensuring interconnect security within a multi-chip integrated circuit package
WO1998033075A2 (en) * 1997-01-13 1998-07-30 Sage Technology, Incorporated Random number generator based on directional randomness associated with naturally occurring random events, and method therefor
US5781458A (en) * 1997-03-05 1998-07-14 Transcrypt International, Inc. Method and apparatus for generating truly random numbers
US6195433B1 (en) 1998-05-08 2001-02-27 Certicom Corp. Private key validity and validation
US6026016A (en) 1998-05-11 2000-02-15 Intel Corporation Methods and apparatus for hardware block locking in a nonvolatile memory
US6643374B1 (en) 1999-03-31 2003-11-04 Intel Corporation Duty cycle corrector for a random number generator

Also Published As

Publication number Publication date
WO2000059153A3 (en) 2001-01-11
WO2000059153A2 (en) 2000-10-05
JP4629876B2 (ja) 2011-02-09
EP1166492A2 (en) 2002-01-02
EP1166492B1 (en) 2006-10-04
HK1039846B (en) 2007-05-04
JP2002540482A (ja) 2002-11-26
TW490967B (en) 2002-06-11
AU762617B2 (en) 2003-07-03
DE60031101D1 (de) 2006-11-16
US6643374B1 (en) 2003-11-04
HK1039846A1 (en) 2002-05-10
AU4797100A (en) 2000-10-16

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee