DE60028549D1 - Busbrücke - Google Patents
BusbrückeInfo
- Publication number
- DE60028549D1 DE60028549D1 DE60028549T DE60028549T DE60028549D1 DE 60028549 D1 DE60028549 D1 DE 60028549D1 DE 60028549 T DE60028549 T DE 60028549T DE 60028549 T DE60028549 T DE 60028549T DE 60028549 D1 DE60028549 D1 DE 60028549D1
- Authority
- DE
- Germany
- Prior art keywords
- bus bridge
- bridge
- bus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/4045—Coupling between buses using bus bridges where the bus bridge performs an extender function
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Information Transfer Systems (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2000/003753 WO2001061513A1 (en) | 2000-02-14 | 2000-02-14 | Bus bridge |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60028549D1 true DE60028549D1 (de) | 2006-07-20 |
DE60028549T2 DE60028549T2 (de) | 2007-06-06 |
Family
ID=21741059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60028549T Expired - Lifetime DE60028549T2 (de) | 2000-02-14 | 2000-02-14 | Busbrücke |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1161727B1 (de) |
JP (1) | JP2003523576A (de) |
KR (1) | KR100757223B1 (de) |
AU (1) | AU751826B2 (de) |
CA (1) | CA2347869C (de) |
DE (1) | DE60028549T2 (de) |
WO (1) | WO2001061513A1 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6594719B1 (en) | 2000-04-19 | 2003-07-15 | Mobility Electronics Inc. | Extended cardbus/pc card controller with split-bridge ™technology |
TWI423972B (zh) * | 2006-09-28 | 2014-01-21 | Biota Scient Management | 治療呼吸系融合細胞病毒感染之多環劑 |
JP2011118732A (ja) * | 2009-12-04 | 2011-06-16 | Yokogawa Electric Corp | I/oノード |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5335329A (en) * | 1991-07-18 | 1994-08-02 | Texas Microsystems, Inc. | Apparatus for providing DMA functionality to devices located in a bus expansion chassis |
US5694556A (en) * | 1995-06-07 | 1997-12-02 | International Business Machines Corporation | Data processing system including buffering mechanism for inbound and outbound reads and posted writes |
US5696949A (en) * | 1995-06-15 | 1997-12-09 | Intel Corporation | System for PCI slots expansion using asynchronous PCI-to-PCI bridge with clock generator for providing clock signal to the expansion mother board and expansion side of bridge |
US5764924A (en) * | 1995-08-24 | 1998-06-09 | Ncr Corporation | Method and apparatus for extending a local PCI bus to a remote I/O backplane |
EP0844567A1 (de) * | 1996-11-21 | 1998-05-27 | Hewlett-Packard Company | PCI-Busbrücke für Fernübertragung |
DE19829212A1 (de) * | 1998-06-30 | 2000-01-05 | Siemens Nixdorf Inf Syst | Einrichtung zur Verbindung eines primären PCI-Busses eines Computersystems mit einem sekundären PCI-Bus |
-
2000
- 2000-02-14 EP EP00908635A patent/EP1161727B1/de not_active Expired - Lifetime
- 2000-02-14 CA CA002347869A patent/CA2347869C/en not_active Expired - Fee Related
- 2000-02-14 AU AU29941/00A patent/AU751826B2/en not_active Ceased
- 2000-02-14 DE DE60028549T patent/DE60028549T2/de not_active Expired - Lifetime
- 2000-02-14 KR KR1020017013158A patent/KR100757223B1/ko not_active IP Right Cessation
- 2000-02-14 WO PCT/US2000/003753 patent/WO2001061513A1/en active IP Right Grant
- 2000-02-14 JP JP2001560831A patent/JP2003523576A/ja not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
DE60028549T2 (de) | 2007-06-06 |
EP1161727A1 (de) | 2001-12-12 |
KR100757223B1 (ko) | 2007-09-11 |
AU751826B2 (en) | 2002-08-29 |
WO2001061513A1 (en) | 2001-08-23 |
CA2347869C (en) | 2004-01-06 |
KR20020005681A (ko) | 2002-01-17 |
AU2994100A (en) | 2001-08-27 |
EP1161727B1 (de) | 2006-06-07 |
CA2347869A1 (en) | 2001-08-14 |
JP2003523576A (ja) | 2003-08-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |