DE60009151T2 - Vorhersage von datenbeförderung von speicher- zum ladebefehl mit untrainierung - Google Patents

Vorhersage von datenbeförderung von speicher- zum ladebefehl mit untrainierung Download PDF

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Publication number
DE60009151T2
DE60009151T2 DE60009151T DE60009151T DE60009151T2 DE 60009151 T2 DE60009151 T2 DE 60009151T2 DE 60009151 T DE60009151 T DE 60009151T DE 60009151 T DE60009151 T DE 60009151T DE 60009151 T2 DE60009151 T2 DE 60009151T2
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DE
Germany
Prior art keywords
store
load
memory
dependency
store operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60009151T
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German (de)
English (en)
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DE60009151D1 (de
Inventor
B. James KELLER
S. Thomas GREEN
Wei-Han Lien
W. Ramsey HADDAD
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of DE60009151D1 publication Critical patent/DE60009151D1/de
Publication of DE60009151T2 publication Critical patent/DE60009151T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/54—Interprogram communication
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3838—Dependency mechanisms, e.g. register scoreboarding
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3856—Reordering of instructions, e.g. using queues or age tags

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE60009151T 2000-01-03 2000-08-08 Vorhersage von datenbeförderung von speicher- zum ladebefehl mit untrainierung Expired - Lifetime DE60009151T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US476937 2000-01-03
US09/476,937 US6651161B1 (en) 2000-01-03 2000-01-03 Store load forward predictor untraining
PCT/US2000/021752 WO2001050252A1 (en) 2000-01-03 2000-08-08 Store to load forwarding predictor with untraining

Publications (2)

Publication Number Publication Date
DE60009151D1 DE60009151D1 (de) 2004-04-22
DE60009151T2 true DE60009151T2 (de) 2004-11-11

Family

ID=23893860

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60009151T Expired - Lifetime DE60009151T2 (de) 2000-01-03 2000-08-08 Vorhersage von datenbeförderung von speicher- zum ladebefehl mit untrainierung

Country Status (7)

Country Link
US (1) US6651161B1 (https=)
EP (1) EP1244961B1 (https=)
JP (1) JP4920156B2 (https=)
KR (1) KR100764920B1 (https=)
CN (1) CN1209706C (https=)
DE (1) DE60009151T2 (https=)
WO (1) WO2001050252A1 (https=)

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US7165167B2 (en) * 2003-06-10 2007-01-16 Advanced Micro Devices, Inc. Load store unit with replay mechanism
US7321964B2 (en) * 2003-07-08 2008-01-22 Advanced Micro Devices, Inc. Store-to-load forwarding buffer using indexed lookup
US7376817B2 (en) * 2005-08-10 2008-05-20 P.A. Semi, Inc. Partial load/store forward prediction
US7590825B2 (en) * 2006-03-07 2009-09-15 Intel Corporation Counter-based memory disambiguation techniques for selectively predicting load/store conflicts
US8099582B2 (en) * 2009-03-24 2012-01-17 International Business Machines Corporation Tracking deallocated load instructions using a dependence matrix
US20100306509A1 (en) * 2009-05-29 2010-12-02 Via Technologies, Inc. Out-of-order execution microprocessor with reduced store collision load replay reduction
US9405542B1 (en) * 2012-04-05 2016-08-02 Marvell International Ltd. Method and apparatus for updating a speculative rename table in a microprocessor
US9128725B2 (en) * 2012-05-04 2015-09-08 Apple Inc. Load-store dependency predictor content management
US9600289B2 (en) 2012-05-30 2017-03-21 Apple Inc. Load-store dependency predictor PC hashing
WO2013188705A2 (en) 2012-06-15 2013-12-19 Soft Machines, Inc. A virtual load store queue having a dynamic dispatch window with a unified structure
KR101996592B1 (ko) 2012-06-15 2019-07-04 인텔 코포레이션 명확화 없는 비순차 load store 큐를 갖는 재정렬된 투기적 명령어 시퀀스들
EP2862084A4 (en) * 2012-06-15 2016-11-30 Soft Machines Inc METHOD AND SYSTEM FOR IMPLEMENTING RECOVERY FROM A SPECULATIVE TRANSMISSION OF FAULT FORECASTS / ERRORS DUE TO THE CHANGE AND OPTIMIZATION OF MEMORY LOADS
TWI646422B (zh) 2012-06-15 2019-01-01 英特爾股份有限公司 在處理器中之免消歧義失序載入／儲存佇列方法、微處理器、和非暫態性電腦可讀取儲存媒體
CN104583956B (zh) 2012-06-15 2019-01-04 英特尔公司 用于实现加载存储重新排序和优化的指令定义
EP2862062B1 (en) 2012-06-15 2024-03-06 Intel Corporation A virtual load store queue having a dynamic dispatch window with a distributed structure
US9158691B2 (en) 2012-12-14 2015-10-13 Apple Inc. Cross dependency checking logic
US9710268B2 (en) 2014-04-29 2017-07-18 Apple Inc. Reducing latency for pointer chasing loads
US10146546B2 (en) * 2014-12-14 2018-12-04 Via Alliance Semiconductor Co., Ltd Load replay precluding mechanism
KR101820221B1 (ko) * 2014-12-14 2018-02-28 비아 얼라이언스 세미컨덕터 씨오., 엘티디. 프로그래머블 로드 리플레이 억제 메커니즘
US9606805B1 (en) * 2015-10-19 2017-03-28 International Business Machines Corporation Accuracy of operand store compare prediction using confidence counter
US9996356B2 (en) 2015-12-26 2018-06-12 Intel Corporation Method and apparatus for recovering from bad store-to-load forwarding in an out-of-order processor
US10514925B1 (en) 2016-01-28 2019-12-24 Apple Inc. Load speculation recovery
US10437595B1 (en) 2016-03-15 2019-10-08 Apple Inc. Load/store dependency predictor optimization for replayed loads
US10331357B2 (en) * 2016-08-19 2019-06-25 Advanced Micro Devices, Inc. Tracking stores and loads by bypassing load store units
US11048506B2 (en) 2016-08-19 2021-06-29 Advanced Micro Devices, Inc. Tracking stores and loads by bypassing load store units
US10684859B2 (en) * 2016-09-19 2020-06-16 Qualcomm Incorporated Providing memory dependence prediction in block-atomic dataflow architectures
US11243774B2 (en) 2019-03-20 2022-02-08 International Business Machines Corporation Dynamic selection of OSC hazard avoidance mechanism
US10929142B2 (en) * 2019-03-20 2021-02-23 International Business Machines Corporation Making precise operand-store-compare predictions to avoid false dependencies
US11113056B2 (en) * 2019-11-27 2021-09-07 Advanced Micro Devices, Inc. Techniques for performing store-to-load forwarding

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Also Published As

Publication number Publication date
JP2003519832A (ja) 2003-06-24
US6651161B1 (en) 2003-11-18
JP4920156B2 (ja) 2012-04-18
KR20020097148A (ko) 2002-12-31
CN1209706C (zh) 2005-07-06
DE60009151D1 (de) 2004-04-22
EP1244961A1 (en) 2002-10-02
KR100764920B1 (ko) 2007-10-09
EP1244961B1 (en) 2004-03-17
CN1415088A (zh) 2003-04-30
WO2001050252A1 (en) 2001-07-12

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