DE60005830D1 - Verfahren und vorrichtung zum steuern eines sprungverzögerungsschlitzes in einem pipelineprozessor - Google Patents
Verfahren und vorrichtung zum steuern eines sprungverzögerungsschlitzes in einem pipelineprozessorInfo
- Publication number
- DE60005830D1 DE60005830D1 DE60005830T DE60005830T DE60005830D1 DE 60005830 D1 DE60005830 D1 DE 60005830D1 DE 60005830 T DE60005830 T DE 60005830T DE 60005830 T DE60005830 T DE 60005830T DE 60005830 D1 DE60005830 D1 DE 60005830D1
- Authority
- DE
- Germany
- Prior art keywords
- instructions
- delay slot
- controlling
- pipeline
- modes
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000000034 method Methods 0.000 title abstract 7
- 230000002194 synthesizing effect Effects 0.000 abstract 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3842—Speculative instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13425399P | 1999-05-13 | 1999-05-13 | |
US134253P | 1999-05-13 | ||
US09/418,663 US6862563B1 (en) | 1998-10-14 | 1999-10-14 | Method and apparatus for managing the configuration and functionality of a semiconductor design |
US418663 | 1999-10-14 | ||
US52387700A | 2000-03-13 | 2000-03-13 | |
US523877 | 2000-03-13 | ||
PCT/US2000/013233 WO2000070447A2 (en) | 1999-05-13 | 2000-05-12 | Method and apparatus for jump delay slot control in a pipelined processor |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60005830D1 true DE60005830D1 (de) | 2003-11-13 |
DE60005830T2 DE60005830T2 (de) | 2004-07-29 |
Family
ID=27384545
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60005830T Expired - Lifetime DE60005830T2 (de) | 1999-05-13 | 2000-05-12 | Verfahren und vorrichtung zum steuern eines sprungverzögerungsschlitzes in einem pipelineprozessor |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP1190305B1 (de) |
CN (1) | CN1155883C (de) |
AT (1) | ATE251776T1 (de) |
AU (1) | AU5013800A (de) |
DE (1) | DE60005830T2 (de) |
TW (1) | TW513665B (de) |
WO (1) | WO2000070447A2 (de) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4604984B2 (ja) * | 2005-11-25 | 2011-01-05 | 株式会社デンソー | 車載機器制御システム |
US8566568B2 (en) | 2006-08-16 | 2013-10-22 | Qualcomm Incorporated | Method and apparatus for executing processor instructions based on a dynamically alterable delay |
US7617385B2 (en) * | 2007-02-15 | 2009-11-10 | International Business Machines Corporation | Method and apparatus for measuring pipeline stalls in a microprocessor |
CN101799793B (zh) * | 2010-03-23 | 2012-06-13 | 深圳市硅格半导体有限公司 | 闪存控制方法及装置 |
US20150227371A1 (en) * | 2014-02-12 | 2015-08-13 | Imagination Technologies Limited | Processors with Support for Compact Branch Instructions & Methods |
CN111078293B (zh) * | 2018-10-19 | 2021-03-16 | 中科寒武纪科技股份有限公司 | 运算方法、装置及相关产品 |
CN111079916B (zh) * | 2018-10-19 | 2021-01-15 | 安徽寒武纪信息科技有限公司 | 运算方法、系统及相关产品 |
IT202100002642A1 (it) * | 2021-02-05 | 2022-08-05 | Sk Hynix Inc | Metodo implementato da un microcontrollore per gestire una istruzione nop e microcontrollore corrispondente |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4974155A (en) * | 1988-08-15 | 1990-11-27 | Evans & Sutherland Computer Corp. | Variable delay branch system |
JP2508907B2 (ja) * | 1990-09-18 | 1996-06-19 | 日本電気株式会社 | 遅延分岐命令の制御方式 |
US5724566A (en) * | 1994-01-11 | 1998-03-03 | Texas Instruments Incorporated | Pipelined data processing including interrupts |
-
2000
- 2000-05-12 WO PCT/US2000/013233 patent/WO2000070447A2/en active IP Right Grant
- 2000-05-12 AU AU50138/00A patent/AU5013800A/en not_active Abandoned
- 2000-05-12 DE DE60005830T patent/DE60005830T2/de not_active Expired - Lifetime
- 2000-05-12 AT AT00932414T patent/ATE251776T1/de not_active IP Right Cessation
- 2000-05-12 EP EP00932414A patent/EP1190305B1/de not_active Expired - Lifetime
- 2000-05-12 CN CNB008084602A patent/CN1155883C/zh not_active Expired - Fee Related
- 2000-07-05 TW TW089109196A patent/TW513665B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE60005830T2 (de) | 2004-07-29 |
WO2000070447A3 (en) | 2001-05-25 |
ATE251776T1 (de) | 2003-10-15 |
AU5013800A (en) | 2000-12-05 |
WO2000070447A2 (en) | 2000-11-23 |
EP1190305A2 (de) | 2002-03-27 |
CN1360693A (zh) | 2002-07-24 |
EP1190305B1 (de) | 2003-10-08 |
TW513665B (en) | 2002-12-11 |
CN1155883C (zh) | 2004-06-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |