DE4433171C2 - Process for assembling semiconductor chips using tape automated bonding technology - Google Patents

Description

The invention relates to a method for assembling Semiconductor chips in the tape automated bonding (TAB) technology according to the generic terms of claims 1 and 2, respectively.

The tape automated bonding technology is a construction and Connection technology for integrated circuits (IC). With the tape Automated bonding (TAB) are the spider-like external contacts of the Integrated circuits, the so-called leads, photo lithographically / galvanically on a Kapton or polyimide film, also TAB Film, applied. The TAB film is for transport on the edge and on the Perforated punching, bending or soldering points of the contact points. The ICs are positioned in the appropriate places on the film, mounted and with the inner connections or inner leads of the metal Film structure bonded by soldering or thermocompression. Before the The external connections are bonded to the contacts of Internal connections or the inner leads electrically checked with the ICs. Then the external connections are punched out and shaped. The Die-cut TAB films with the ICs are on the Carrier substrate structure, e.g. B. the circuit board positioned. The External connections of the TAB film are made with contacts on the Carrier substrate structure by thermocompression or soldering, e.g. B. Laser soldering connected.  

The process is now used in a variety of ways, especially in the Microelectronics in circuits of high complexity, in large Quantities can be manufactured with a high degree of automation.

The advantages of TAB technology are due to the film technology to address easy, fast, rational and precise installation and also the simple serial test, easy Automation option and high reliability. The TAB contacts are shorter than wire bonds and therefore cheaper inductively, they are wider and therefore more adhesive and better heat-conducting. The TAB technology allows higher connection numbers due to smaller distances between the connections, e.g. B. Fine pitch connections. The higher packing densities enable a rational and reliable Processing of highly complex components.

Despite these many advantages, the TAB technology has so far can only be enforced in large series, e.g. B. in the watch and LCD electronics. For small and medium series and for changing chip sizes focus on significant disadvantages. Thermocompression bonding occurs particularly with multi-pole ICs high pressures at high temperatures over several Seconds that can damage the chip and substrate. At only slightly different heights are mechanical Stress peaks are expected to result in material breaks or Can lead to incorrect contacts. These problems would be resolved with the help of the Have laser soldering avoided because there is not at the same time, but sequentially, solder joint after solder joint, is processed. Beyond that but to overcome other difficulties. The TAB technology requires a chain of highly complex, complex, component-specific materials and tools, additional IC Technologies, e.g. B. for the solder bumps, appropriately structured and perforated films, punching and bending tools made by different Manufacturers with often different design techniques Need to become. A redesign, a pre-series and the exact and quick scheduling is difficult, but a prerequisite for one  successful, economical and fast processing of Electronics designs for small and medium-sized productions.

A TAB frame adapter system is known from EP 0 451 363 A1, with the semiconductor chips mounted on a TAB film with a PCB can be mounted. The frame has one on it arranged interconnect structure, by means of interconnects on the PCB with which to be connected on the TAB film. The Production of the contacts circuit board and TAB frame on the one hand and TAB frame and TAB film on the other hand is done by the mechanical Connection of the parts, which is secured by a screw connection.

In "The processing of fine pitch components with tape automated Bonding (TAB) "appeared in F, 1992, Vol. 100, H. 11, pp. 506-510 given a brief summary of the TAB technique. It's over this document is known in particular that on a multi-layer Carrier made of polyimide film and copper foil the internal and external contacts punched out and the semiconductor chips after structuring the Conduits by thermocompression with arranged on them Soldering sticks are connected.

From EP 0 113 895 A1 it is known to use soldered connections a laser through a transparent hold-down with a To solder carrier.

The present invention has for its object a method of to demonstrate the type mentioned at the beginning, with which the TAB technology too optimized for small and medium series and becomes economically advantageous. So should different chip geometries and connection numbers with the same TAB film with identical metal film structure can be processed can.

This task is accomplished through a process with the characteristics of Claims 1 or 2 solved. In the dependent claims are Refinements and developments of the method specified.

In the following description, exemplary embodiments of the Process explained with the inclusion of the figures. Show it:

Fig. 1 is a top view of an embodiment with a chip frame

FIG. 1a is a cross section through the embodiment according to Fig. 1

Fig. 1b shows a cross section according to Fig. 1a with heat-conductive potting

Fig. 2 is a top view of another embodiment with a chip carrier

Fig. 2a shows a cross section through the embodiment shown in FIG. 2

FIG. 2b shows a cross section through the structure of the TAB film

Fig. 3 is a top view of a chip carrier with components in an enlarged view

Fig. 4 is a top view of a chip carrier in an enlarged view.

The general idea of the invention provides the disadvantages of the previous ones TAB technology through standardization using a standardized chip frame or a standardized chip carrier avoid. In both cases, different semiconductor chips or Integrated circuits, or ICs for short, with the same standardized TAB Film and the same machines and tools processed. For this  will either have a chip frame or a chip carrier in place of the chips applied the TAB film. Chip frames or chip carriers have the maximum number of pads or pads and are in TAB Technology associated with the internal connections of the metal film structure. The semiconductor chips and ICs are in wire bonding technology with the Chip frame or the chip carrier connected.

Fig. 1 shows the top view of a TAB film 1 having disposed thereon metal film structure 2, 3. The conductor tracks extending in a spider-like arrangement in such a way from the inside to the outside that increases their mutual distance. On the inside, the interconnects form internal connections 4 , on the outside correspondingly the external connections 5. In general, the internal and external connections are freed from the polyimide carrier film in order to ensure better bondability. As will be shown later, when using laser soldering technologies, the polyimide carrier film can remain on the inner and / or outer connections. In the center of the metal film structure, a window 7 is formed, in which a chip frame 6 is arranged. The internal connections of the metal film structure on the TAB film correspond to the connection or pad structure of the chip frame. The chip frame consists of a silicon, ceramic or plastic frame and is glued or soldered onto the layer structure of the TAB film - as was the case with the chips. The connection or pad structure of the chip frame is bonded to the internal connections of the metal film structure on the TAB film using TAB technology. This happens e.g. B. by thermocompression or laser soldering. This creates a standard TAB arrangement consisting of the TAB film with the metal film structure and the chip frame.

This standard TAB arrangement is punched out in a known manner, the external connections are shaped and then the arrangement is soldered or glued onto a carrier substrate structure 9 (for example a printed circuit board or a hybrid carrier) which has been fitted with the respective semiconductor chips 8 beforehand. The chip 8 to be contacted must be arranged on the carrier substrate structure 9 such that it lies within the chip frame 6 . If the geometry of the chip frame and the semiconductor chips permits, a plurality of chips can also be arranged within the chip frame. The external connections of the metal film structure on the TAB film are bonded 10 in TAB technology with the corresponding connection areas on the carrier substrate structure. This happens e.g. B. by thermocompression or laser soldering. The electrically unused external connections provide additional flexible adhesion, so that no or only lower thermomechanical stresses occur during temperature cycles.

The bond pads arranged on the surfaces of the semiconductor chips are then connected to the metal film structure of the TAB film on the chip frame by means of a wire bonding process. The arrangement present after this method step is shown in cross section in FIG. 1a. The space between the semiconductor chips and the chip frame is poured out and covered with a heat-conducting mass 12 . As a result, the known fine wire connections 11 are protected against mechanical damage and, at the same time, the heat generated during operation of the semiconductor chips 8 is dissipated. FIG. 1b shows the completed assembly also in cross section.

Fig. 2 shows a TAB film having a chip carrier 9 and on the chip carrier 9 mounted semiconductor chips 8 that have been produced by a second method. FIGS. 3 and 4 show the chip carrier with the TAB structure once with and once without the semiconductor chip in an enlarged scale. First, a metal film structure is created on the TAB film 1 .

The interconnects of the metal film structure run in a spider-like arrangement from the inside to the outside. It can be advantageous to arrange the interconnects in such a way that their mutual distance increases in order to compensate for different connection densities of the inner 4 and outer connections 5 . On the inside, the interconnects form the internal connections 4 , on the outside correspondingly the external connections 5. In general, the internal and external connections are freed from the polyimide carrier film in order to ensure better bondability. As will be shown later, when using laser soldering technologies, the polyimide carrier film can remain on the inner and / or outer connections. In the center of the metal film structure, a window 7 is formed, in which a chip carrier 13 is arranged. The internal connections of the metal film structure on the TAB film correspond to the connection structure 14 arranged on the periphery of the chip carrier. The chip carrier consists of a silicon or ceramic substrate with a conductor track structure 16 and a multiplicity of bonding surfaces 14 , 15. The conductor track structure is provided by a dielectric layer covered. The bond areas are arranged on the one hand at a fixed distance from one another on the periphery of the chip carrier and form the connection structure 14 there and on the other hand are regularly distributed on the surface. The bonding areas 14 , 15 remain recessed from the dielectric layer. The bond surfaces 14 arranged on the circumference are correspondingly connected to the 15 distributed on the surface by the interconnect structure 16 .

The chip carrier 13 is glued or soldered onto the layer structure of the TAB film 1 , as was the case with the chips. The connection or pad structure 14 of the chip carrier 13 is bonded to the internal connections 4 of the metal film structure on the TAB film 1 using TAB technology. This happens e.g. B. by thermocompression or laser soldering. In this way, a standard TAB arrangement is created, which consists of the TAB film 1 with a metal film structure and the chip carrier 13 .

The semiconductor chips are then 8 on the chip carrier 13 - z. B. with an insulating adhesive - mounted. The number of semiconductor chips 8 is only limited by the size of the chip carrier 13 and the number of connections available. The bond pads arranged on the surfaces of the semiconductor chips are then connected to the bond areas 14 , 15 of the chip carrier by a wire bonding process.

The arrangement is then punched out in a known manner, the external connections are formed and then the arrangement is soldered or glued onto the carrier substrate structure 9 (for example a printed circuit board or a hybrid carrier) in a precise position. The external connections 5 of the metal film structure on the TAB film are bonded in TAB technology to the corresponding connection areas on the carrier substrate structure 9 . This happens e.g. B. by thermocompression or laser soldering. The electrically unused external connections provide additional flexible adhesion, so that no or only lower thermomechanical stresses occur during temperature cycles ( Fig. 2a).

It is also possible to first connect an empty chip carrier 13 to the carrier substrate structure 9 using TAB technology and only then to assemble and bond the semiconductor chips 8 .

The semiconductor chips and the chip carrier are sealed with a plastic covered. As a result, the known fine wire connections protected against mechanical damage.

FIG. 3 shows the central part of FIG. 2 in an enlarged view. It can clearly be seen that the semiconductor chips are connected on the one hand to the bond areas on the periphery of the chip carrier and on the other hand to the bond areas arranged on the surface of the chip carrier with wire bonds. In the exemplary embodiment shown, three semiconductor chips of different sizes are placed on the chip carrier.

FIG. 4 shows the chip carrier of FIG. 3, however, without the semiconductor chips. The structure of the interconnects and the bond areas, as well as their connection to one another, has proven to be particularly advantageous with regard to testability.

FIG. 2b shows the structure of the polyimide Tägerfilms having disposed thereon metal film structure. The polyimide carrier film has, for example, a thickness of approximately 50 μm, on which a copper layer with a thickness of approximately 25 and a pre-soldering with a thickness of approximately 15-20 μm are applied.

A further simplification is possible if the die is cut out Internal and external connections of the metal film structure can be dispensed with can. This is done by laser beam soldering of the interior and External connections made possible through the carrier film. Hereby a simple punching device and the use of a pulsed, finely focusing laser for subsequent soldering. The Connection structures are passed through the film with the metal Film structure soldered using a temperature controlled laser. Here it is essential that no heat sensitive and laser light absorbing Epoxy resin adhesive between the thin polyimide film and the metal Film structure is used. If the edges of the chip carrier are not insulated is a correspondingly thin coating of the metal film structure required because the film is pressed with the help of a holder and with a high-resolution image processing system is positioned.

The temperature control of the laser guarantees a closely localized Heating, melting and soldering, but prevents damage to the Polyimide carrier film and the chip carrier. Internal and external connections can be soldered with the same laser system.

Claims (7)

1. A method for assembling semiconductor chips ( 8 ) using tape automated bonding (TAB) technology, a TAB film ( 1 ) being provided with a spider-like metal film structure ( 2 , 3 ) which has internal ( 4 ) and external connections ( 5 ) and in the area of the internal connections ( 4 ) the TAB film ( 1 ) is removed from the metal film structure ( 2 , 3 ); characterized by

• 1. that a chip frame ( 6 ), which consists of an insulating material, is mounted on the TAB film ( 1 );
• 2. that the chip frame ( 6 ) has a plurality of connection surfaces, which coincide with the inner connections ( 4 ) of the metal film structure ( 2 , 3 ) and with the inner connections ( 4 ) of the metal film structure ( 2 , 3 ) in TAB technology to be connected;
• 3. that the semiconductor chips ( 8 ) are mounted on a carrier substrate structure ( 9 );
• 4. that the arrangement consisting of TAB film ( 1 ) with metal film structure ( 2 , 3 ) and chip frame ( 6 ) is punched out, the external connections ( 5 ) are formed and then the arrangement is arranged on the carrier substrate structure ( 9 ), that the semiconductor chips ( 8 ) lie within the chip frame ( 6 );
• 5. that the outer connections ( 5 ) of the metal film structure ( 2 , 3 ) with the carrier substrate structure ( 9 ) are connected in TAB technology, and
• 6. that the semiconductor chips ( 8 ) with the metal film structure on the chip frame by wire bonds ( 11 ) are connected.

2. Method for assembling semiconductor chips ( 8 ) in tape automated bonding (TAB) technology, whereby a TAB film ( 1 ) is provided with a spider-like metal film structure which has inner ( 4 ) and outer connections ( 5 ), thereby featured,

• 1. that a chip carrier ( 13 ), which consists of an insulating material, is mounted on the TAB film ( 1 );
• 2. that the chip carrier ( 13 ) on its circumference has a plurality of connection surfaces ( 14 ) which overlap with the inner connections ( 4 ) of the metal film structure and which are connected to the inner connections ( 4 ) of the metal film structure in TAB technology ;
• 3. that the chip carrier ( 13 ) has an interconnect structure ( 16 ) which is covered by a dielectric layer which in turn has a plurality of regularly arranged openings which can serve as bonding surfaces ( 15 ), the interconnect structure ( 16 ) with the Pads ( 14 ) is connected;
• 4. that the semiconductor chips ( 8 ) are mounted on the chip carrier ( 13 );
• 5. that the semiconductor chips ( 8 ) are connected by wire bonds ( 11 ) to the bonding surfaces ( 15 ) of the chip carrier ( 13 );
• 6. that the arrangement consisting of TAB film ( 1 ) with metal film structure ( 2 , 3 ) and chip carrier ( 13 ) is punched out, the external connections ( 5 ) are formed and then the arrangement is arranged on a carrier substrate structure ( 9 ); and
• 7. that the external connections ( 5 ) of the metal film structure are connected to the carrier substrate structure ( 9 ) in TAB technology.

3. The method according to claim 1 or 2, characterized in that the soldering of the external connections using a temperature controlled laser is performed. 4. The method according to any one of claims 1 to 3, characterized characterized in that the soldering of the internal connections by means of a temperature controlled laser is carried out. 5. The method according to any one of claims 1 to 4, characterized characterized in that the TAB film made of polyimide with a thickness of 50 µm and the metal film structure of a Cu structure of 25-50 µm Thickness with pre-soldering or gilding.   6. The method according to any one of claims 1 to 5, characterized characterized that the TAB film structure on the area strips, to lie over the non-passivated edges of the chip carrier come, painted like a strip with a frame stamp. 7. The method according to any one of claims 1 to 6, characterized in that the polyimide carrier film remains on the outer connections ( 5 ) and the outer connections are soldered by a laser through the polyimide carrier film with corresponding connection surfaces.