DE4423007A1 - Generation of test program for checking solder pad data on circuit boards - Google Patents

Generation of test program for checking solder pad data on circuit boards

Info

Publication number
DE4423007A1
DE4423007A1 DE4423007A DE4423007A DE4423007A1 DE 4423007 A1 DE4423007 A1 DE 4423007A1 DE 4423007 A DE4423007 A DE 4423007A DE 4423007 A DE4423007 A DE 4423007A DE 4423007 A1 DE4423007 A1 DE 4423007A1
Authority
DE
Germany
Prior art keywords
test program
data
program
generation
circuit boards
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE4423007A
Other languages
German (de)
Inventor
Karl Heinz Dipl Ing Brinkhues
Willi Dipl Ing Keckstein
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE4423007A priority Critical patent/DE4423007A1/en
Publication of DE4423007A1 publication Critical patent/DE4423007A1/en
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302—Contactless testing
    • G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
    • G01R31/309—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of printed or hybrid circuits or circuit substrates
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/398—Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/163—Monitoring a manufacturing process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
    • H05K3/1216—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns by screen printing or stencil printing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder

Abstract

A computer aided design process converts an electronic circuit design into a printed circuit layout that includes interconnection tracks and soldered connection point for surface mounted devices. The solder is deposited at the designated points using a printing process and the board is checked by an automatic optical scanning process that provides data for comparison with reference data. The reference data for the location of solder pads is defined within the computer aided design program and this is filtered out from the main body of data.

Description

Die Erfindung betrifft ein Verfahren zur Erzeugung eines Prüfprogrammes für die visuelle automatisierte Kontrolle ei­ nes Lotpastendrucks.The invention relates to a method for generating a Test program for the visual automated control solder paste printing.

Es sind zwei Verfahren zur Erzeugung eines derartigen Prüf­ programmes bekannt. Das eine Verfahren besteht darin, daß pro Leiterplattentyp manuell die einzelnen Prüfpunkte auf der Leiterplatte angefahren werden und dann die Koordinaten manu­ ell eingegeben werden, denen dann die aus den Bauunterlagen ermittelten Geometriedaten zugeordnet werden. Ein anderes Verfahren besteht darin, ein Prüfprogramm mittels eines Teach-in-Verfahrens zu ermitteln, d. h. der Automat läuft selbständig die einzelnen Prüfpunkte an und von dem Operateur wird lediglich erwartet, daß er den Prüfpunkt als für das Prüfprogramm in Frage kommenden Punkt bestätigt. Beide Ver­ fahren sind sehr zeitaufwendig.There are two methods of creating such a test programs known. One method is that per PCB type manually the individual test points on the PCB are approached and then the coordinates manu ell are entered, which are then those from the construction documents determined geometry data are assigned. Another The method is to set up a test program using a To determine the teach-in process, d. H. the machine is running independently the individual test points to and from the surgeon it is only expected that the checkpoint as for the Test program in question point confirmed. Both ver driving are very time consuming.

Aufgabe der vorliegenden Erfindung ist es, ein Verfahren der eingangs genannten Art anzugeben, das auf einfache Art und Weise ohne großen Zeitaufwand das Erstellen eines Prüfpro­ grammes ermöglicht.The object of the present invention is a method of Specify the type mentioned above, the simple way and How to create a test pro without much time grammes.

Diese Aufgabe wird für ein Verfahren der eingangs genannten Art dadurch gelöst, daß aus den Prozeßdaten eines computer­ unterstützten Entwicklungssystems zur Leiterplattenentwick­ lung, welche die Leiterplattenbeschreibung beinhalten, mit­ tels geeigneter Programmwerkzeuge, die Daten der SMD-An­ schlußflächen herausgefiltert werden und nach einer entspre­ chenden Koordinatentransformation, die auf einen definierten Nullpunkt des Prüfprogrammes bezogen ist, als SMD-Anschlußda­ ten für die Prüfprogrammsoftware zur Verfügung gestellt wer­ den.This task is for a method of the aforementioned Art solved in that from the process data of a computer supported development system for PCB development with the PCB description suitable program tools, the data of the SMD-An end faces are filtered out and after a match coordinate transformation based on a defined Zero point of the test program is referred to as an SMD connection da provided for the test program software the.

Das erfindungsgemäße Verfahren macht sich die Tatsache zu­ nutze, daß die in Frage kommenden Daten für das Prüfprogramm bereits in einem CAE-Layoutsystem zur Leitenplattenentwick­ lung vorhanden sind. Dadurch, daß das erfindungsgemäße Ver­ fahren auf diese Daten zurückgreift, ermöglicht es eine schnelle Erstellung eines entsprechenden Prüfprogrammes ohne großen Aufwand.The method according to the invention adopts the fact use the data in question for the test program  already in a CAE layout system for PCB development are available. The fact that the Ver drive uses this data, it enables a quick creation of a corresponding test program without great effort.

Zweckmäßige Weiterbildungen des erfindungsgemäßen Verfahrens ergeben sich aus dem Unteranspruch sowie aus der nachfolgen­ den kurzen Beschreibung eines Ausführungsbeispiels.Appropriate developments of the method according to the invention result from the subclaim and from the successor the brief description of an embodiment.

Die Lotpads von SMD-Bauelementen werden vor dem Reflow-Löten mit Lotpaste bedruckt. Grundvoraussetzung für eine gute Löt­ qualität ist die vollständige Bedruckung aller Kontaktflä­ chen. Die Überprüfung der Bedruckung wird mit automatischen optischen Verfahren durchgeführt. Die Grundlagen dazu sind exakte geometrische Beschreibungen der SMD-Lotpads.The solder pads of SMD components are before reflow soldering printed with solder paste. Basic requirement for good soldering quality is the complete printing of all contact surfaces chen. The printing is checked with automatic optical process performed. The basics are exact geometrical descriptions of the SMD solder pads.

Die CAE-Prozeßdaten beschreiben u. a. die Kontaktierungsflä­ chen von SMD-Bauelementen auf einer Leiterplatte. Dazu gehö­ ren Bauteilnahme, Nummer des Anschlußpins, Mittelpunktkoordi­ naten des Anschlußpins, Geometrie und Rotation der Anschluß­ fläche.The CAE process data describe u. a. the contact area Chen SMD components on a circuit board. This includes Ren component name, number of the connecting pin, center point coordinate naten of the connector pin, geometry and rotation of the connector surface.

Bei dem erfindungsgemäßen Verfahren werden die notwendigen Daten für das Prüfprogramm zur Kontrolle des Lotpastendrucks der SMD-Lotpads aus einem CAE-Layoutsystem zur Leiterplatten­ entwicklung gewonnen. Aus der Binärdatei einer Leiterplatten­ beschreibung werden mittels geeigneter Programmwerkzeuge die Daten der SMD-Anschlußflächen herausgeschrieben. Nach einer Koordinatentransformation stehen die Koordinaten und Rotati­ onen bezogen auf einen definierten Nullpunkt des Zielsystems zur Verfügung. Die Daten werden nach ihrer Spezifikation for­ matiert und in eine lesbare ASCII-Datei mit Sachnummernkenn­ zeichnung geschrieben. Dabei werden die Datenverbindungen zu den Vision-Systemen über vorhandene Rechnernetze sicherge­ stellt.In the method according to the invention, the necessary Data for the test program for checking the solder paste pressure the SMD solder pads from a CAE layout system for printed circuit boards development won. From the binary file of a circuit board The description is made using suitable program tools Data of the SMD connection pads written out. After a Coordinate transformation are the coordinates and rotati ons related to a defined zero point of the target system to disposal. The data are according to their specification for matted and into a readable ASCII file with part number identification drawing written. The data connections become too the vision systems via existing computer networks poses.

Claims (2)

1. Verfahren zur Erzeugung eines Prüfprogrammes für die visu­ elle automatisierte Kontrolle eines Lotpastendrucks, dadurch gekennzeichnet, daß aus den Prozeßdaten eines computerunterstützten Entwick­ lungssystems zur Leiterplattenentwicklung, welche die Leiter­ plattenbeschreibung beinhalten, mittels geeigneter Programm­ werkzeuge die Daten der SMD-Anschlußflächen herausgefiltert werden und nach einer entsprechenden Koordinatentransforma­ tion, die auf einen definierten Nullpunkt des Prüfprogrammes bezogen ist, als SMD-Anschlußdaten für die Prüfprogrammsoft­ ware zur Verfügung gestellt werden.1. A method for generating a test program for the visu elle automated control of a solder paste printing, characterized in that from the process data of a computer-aided development system for circuit board development, which include the circuit board description, the program of the SMD pads are filtered out using suitable program tools and after a corresponding coordinate transformation, which relates to a defined zero point of the test program, is made available as SMD connection data for the test program software. 2. Verfahren nach Anspruch 1, dadurch gekennzeichnet, daß die gefilterten Daten entsprechend ihrer jeweiligen Spe­ zifikation formatiert werden und als Datei mit Sachnummern­ kennzeichnungen zur Verfügung stehen.2. The method according to claim 1, characterized, that the filtered data according to their respective Spe be formatted and as a file with part numbers labels are available.
DE4423007A 1994-06-30 1994-06-30 Generation of test program for checking solder pad data on circuit boards Ceased DE4423007A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE4423007A DE4423007A1 (en) 1994-06-30 1994-06-30 Generation of test program for checking solder pad data on circuit boards

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE4423007A DE4423007A1 (en) 1994-06-30 1994-06-30 Generation of test program for checking solder pad data on circuit boards

Publications (1)

Publication Number Publication Date
DE4423007A1 true DE4423007A1 (en) 1996-01-11

Family

ID=6521954

Family Applications (1)

Application Number Title Priority Date Filing Date
DE4423007A Ceased DE4423007A1 (en) 1994-06-30 1994-06-30 Generation of test program for checking solder pad data on circuit boards

Country Status (1)

Country Link
DE (1) DE4423007A1 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4864514A (en) * 1986-09-02 1989-09-05 Kabushiki Kaisha Toshiba Wire-bonding method and apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4864514A (en) * 1986-09-02 1989-09-05 Kabushiki Kaisha Toshiba Wire-bonding method and apparatus

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